Commit Graph

14339 Commits

Author SHA1 Message Date
Evan Cheng 51dbe6e705 Feature bits are 64-bits.
llvm-svn: 134607
2011-07-07 07:45:49 +00:00
Evan Cheng 1a72add615 Compute feature bits at time of MCSubtargetInfo initialization.
llvm-svn: 134606
2011-07-07 07:07:08 +00:00
Bill Wendling 667be58220 Use ArrayRef instead of a std::vector&.
llvm-svn: 134595
2011-07-07 04:42:01 +00:00
Lang Hames 5a00499e87 Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. The
hasPredecessorHelper function allows predecessors to be cached to speed up
repeated invocations. This fixes PR10186.

X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X)

Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with
empty Visited and Worklist sets (i.e. no caching over invocations).

Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited
and Worklist to speed up repeated calls. The Visited set is searched for X
before going to the worklist to further search the DAG if necessary.

llvm-svn: 134592
2011-07-07 04:31:51 +00:00
Bill Wendling b6adf46f62 Add a target hook to encode the compact unwind information.
llvm-svn: 134577
2011-07-07 00:54:13 +00:00
Owen Anderson 145a260f75 Fix a subtle issue in SmallVector. The following code did not work as expected:
vec.insert(vec.begin(), vec[3]);
The issue was that vec[3] returns a reference into the vector, which is invalidated when insert() memmove's the elements down to make space.  The method needs to specifically detect and handle this case to correctly match std::vector's semantics.

Thanks to Howard Hinnant for clarifying the correct behavior, and explaining how std::vector solves this problem.

llvm-svn: 134554
2011-07-06 22:36:59 +00:00
Nick Lewycky b6b067c225 Add ImmutableList::contains(). Patch by Rui Paulo!
llvm-svn: 134545
2011-07-06 21:59:48 +00:00
Jim Grosbach f3fd36e0f5 Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.

llvm-svn: 134539
2011-07-06 21:33:38 +00:00
Devang Patel a3cbf52a57 Simplify. Consolidate dbg.declare handling in AllocaPromoter.
llvm-svn: 134538
2011-07-06 21:09:55 +00:00
Bill Wendling 5ace8edfd6 Constify getCompactUnwindRegNum.
llvm-svn: 134527
2011-07-06 20:33:48 +00:00
Evan Cheng ab37af9af3 createMCInstPrinter doesn't need TargetMachine anymore.
llvm-svn: 134525
2011-07-06 19:45:42 +00:00
Jakub Staszak 3f158fdf6e Introduce "expect" intrinsic instructions.
llvm-svn: 134516
2011-07-06 18:22:43 +00:00
Dan Gohman 024bb8fa07 Remove the ObjC ARC passes from the default optimization list, and add
extension points to be used by clang.

llvm-svn: 134444
2011-07-05 22:01:44 +00:00
Devang Patel 347a112df3 Speculatively revert r134431.
llvm-svn: 134440
2011-07-05 21:16:28 +00:00
Devang Patel e550f25f8a Clear debug loc while updating insert point.
llvm-svn: 134431
2011-07-05 18:58:22 +00:00
Michael J. Spencer dea45cc7cf Fix 80-col.
llvm-svn: 134409
2011-07-05 14:49:08 +00:00
Tobias Grosser d562d30a20 SuccIterator on bbs without terminator insts
Remove the assert that triggers if SuccIterator is constructed for a basic block
without a terminator instruction. Instead of triggering an assert a succ_end()
iterator is returned. This models a basic block with zero successors and allows
us to use F->viewCFG() on incompletely constructed functions.

llvm-svn: 134398
2011-07-04 23:09:02 +00:00
Jakob Stoklund Olesen 25a404eb81 Include a source location when complaining about bad inline assembly.
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

llvm-svn: 134307
2011-07-02 03:53:34 +00:00
Evan Cheng fb71f4260a Add getFeatureBits to extract feature bits for a given CPU.
llvm-svn: 134298
2011-07-02 00:43:44 +00:00
Eric Christopher 1620130729 Remove the confusing getDarwinNumber() api and friends.
Part of rdar://9714064

llvm-svn: 134291
2011-07-02 00:19:55 +00:00
Douglas Gregor de3c92674e Add initial *-*-rtems* target, from Joel Sherrill
llvm-svn: 134282
2011-07-01 22:41:06 +00:00
Evan Cheng 0711c4d489 Add MCSubtargetInfo target registry stuff.
llvm-svn: 134279
2011-07-01 22:25:04 +00:00
Evan Cheng 0d639a28aa Rename TargetSubtarget to TargetSubtargetInfo for consistency.
llvm-svn: 134259
2011-07-01 21:01:15 +00:00
Evan Cheng 54b68e3432 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
2011-07-01 20:45:01 +00:00
Evan Cheng 703a0fbf39 Hide the call to InitMCInstrInfo into tblgen generated ctor.
llvm-svn: 134244
2011-07-01 17:57:27 +00:00
Rafael Espindola 968af4fee2 Fix use after free.
llvm-svn: 134234
2011-07-01 04:40:50 +00:00
Evan Cheng d8e27a584e Switch SubtargetFeatures from std::string to StringRef.
llvm-svn: 134219
2011-07-01 00:23:10 +00:00
Bill Wendling b403f0c4ed Add target a target hook to get the register number used by the compact unwind
encoding for the registers it knows about. Return -1 if it can't handle that
register.

llvm-svn: 134202
2011-06-30 23:20:32 +00:00
Rafael Espindola 070f96c567 Create a isFullCopy predicate.
llvm-svn: 134189
2011-06-30 21:15:52 +00:00
Rafael Espindola b10a0f223a Add r134057 back, but splice the predecessor after the successors phi
nodes.

Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.

llvm-svn: 134182
2011-06-30 20:14:24 +00:00
Evan Cheng fe6e405e8c Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127
2011-06-30 01:53:36 +00:00
Eric Christopher f81292ba3b Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582

llvm-svn: 134123
2011-06-30 01:20:03 +00:00
Devang Patel 0eada03216 Revert r133953 for now.
llvm-svn: 134116
2011-06-29 23:50:13 +00:00
Andrew Trick e98e9a1540 Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point
that dominates the given Use.

llvm-svn: 134111
2011-06-29 23:01:52 +00:00
Andrew Trick f0f9f45087 whitespace
llvm-svn: 134110
2011-06-29 22:52:51 +00:00
Evan Cheng 77ec04c656 Indentation
llvm-svn: 134100
2011-06-29 21:58:37 +00:00
Chad Rosier 96ed721d9b Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and
lifetime intrinsics" due to buildbot failures.

llvm-svn: 134071
2011-06-29 16:22:11 +00:00
Rafael Espindola 4c0dfcec7e Let simplify cfg simplify bb with only debug and lifetime intrinsics.
llvm-svn: 134057
2011-06-29 05:25:47 +00:00
Evan Cheng 8264e272a9 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
llvm-svn: 134049
2011-06-29 01:14:12 +00:00
Evan Cheng 6502f0094e Trim include
llvm-svn: 134048
2011-06-29 00:35:31 +00:00
Evan Cheng d051f0a837 Unbreak every backend.
llvm-svn: 134031
2011-06-28 21:33:11 +00:00
Evan Cheng 194c3dc01f Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
llvm-svn: 134030
2011-06-28 21:14:33 +00:00
Evan Cheng df8974ef2f Add MCInstrInfo registeration machinery.
llvm-svn: 134026
2011-06-28 20:29:03 +00:00
Evan Cheng 1e210d08d8 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
llvm-svn: 134024
2011-06-28 20:07:07 +00:00
Evan Cheng 6cc775f905 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Jay Foad 2a31eb49c7 PR10210: New method ConstantArray::getAsCString(). Use it in LTO to
avoid getting embedded trailing null bytes in std::strings.

llvm-svn: 133999
2011-06-28 08:24:19 +00:00
Andrew Trick 526605d06f Cleanup. Fix a stupid variable name.
llvm-svn: 133996
2011-06-28 05:44:06 +00:00
Andrew Trick 411daa5e81 SCEVExpander: give new insts a name that identifies the reponsible pass.
llvm-svn: 133992
2011-06-28 05:07:32 +00:00
Evan Cheng 21afabe73d Remove RegClass2VRegMap from MachineRegisterInfo.
llvm-svn: 133967
2011-06-27 23:54:40 +00:00
Evan Cheng 105974d497 Remove RCBarriers from TargetInstrDesc.
llvm-svn: 133964
2011-06-27 23:47:21 +00:00