Benjamin Kramer
b596056413
[CodeGen] Flip lanes when lowering __builtin_palignr with one lane
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Otherwise we'd pick the wrong lane for the resulting shuffle and
miscompile code. PR24187.
llvm-svn: 242678
2015-07-20 15:31:17 +00:00
Eli Friedman
5c917278fd
clang part of r139458; un-XFAIL testcase.
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llvm-svn: 139460
2011-09-10 02:03:28 +00:00
Richard Trieu
c41773ab6a
Revision 139454 fixed a broken assert in LLVM, which causes
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a test failure in CodeGen/palignr.c, which has been marked
XFAIL for the time being. A bug has been filed at PR10901
for this issue.
llvm-svn: 139457
2011-09-10 01:56:32 +00:00
Galina Kistanova
f56b4f6fdd
These tests require particular registered targets. Declared as such.
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llvm-svn: 132600
2011-06-03 22:24:54 +00:00
Dale Johannesen
2002e1f1bf
Adjust a test that's expecting optimizations to be done
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on MMX palignr; we don't do this for the intrinsics.
llvm-svn: 113234
2010-09-07 18:11:53 +00:00
Bill Wendling
e6fd79bc1c
Newline at end of file.
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llvm-svn: 112871
2010-09-02 22:07:07 +00:00
Eric Christopher
1bbc7086ff
Rewrite handling of 64-bit palignr intrinsics to be vector shuffles.
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Stop multiplying constant by 8 accordingly in the header and change
intrinsic definition for what types we expect.
Add to existing palignr test to check that we're emitting the correct things.
llvm-svn: 101332
2010-04-15 01:43:08 +00:00
Jakob Stoklund Olesen
4d2972d793
Slightly relax test case. An upcoming LLVM commit will change the xor instruction.
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llvm-svn: 99962
2010-03-30 23:57:49 +00:00
Daniel Dunbar
8fbe78f6fc
Update tests to use %clang_cc1 instead of 'clang-cc' or 'clang -cc1'.
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- This is designed to make it obvious that %clang_cc1 is a "test variable"
which is substituted. It is '%clang_cc1' instead of '%clang -cc1' because it
can be useful to redefine what gets run as 'clang -cc1' (for example, to set
a default target).
llvm-svn: 91446
2009-12-15 20:14:24 +00:00
Nate Begeman
67dfd4236a
Revert mmx palignr to use an intrinsic, since mmx shuffle patterns are missing.
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llvm-svn: 91269
2009-12-14 05:15:02 +00:00
Nate Begeman
72ec6bc6f4
Support x86's PALIGNR instruction without the use of a palignr intrinsic.
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llvm-svn: 91264
2009-12-14 04:57:03 +00:00