Commit Graph

12535 Commits

Author SHA1 Message Date
Chris Lattner 2e56e89452 Handle physreg input/outputs. We now compile this:
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
2006-01-31 02:03:41 +00:00
Chris Lattner 2b70a6f853 more mumbling
llvm-svn: 25826
2006-01-31 00:45:37 +00:00
Chris Lattner b521361fb9 add some notes
llvm-svn: 25825
2006-01-31 00:20:38 +00:00
Evan Cheng 45df7f84ff Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.

llvm-svn: 25824
2006-01-30 23:41:35 +00:00
Chris Lattner 57ecb561c6 Print the most trivial inline asms.
llvm-svn: 25822
2006-01-30 23:00:08 +00:00
Chris Lattner f263a23735 Fix a bug in my legalizer reworking that caused the X86 backend to not get
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll

llvm-svn: 25821
2006-01-30 22:43:50 +00:00
Chris Lattner 9a90572374 Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
llvm-svn: 25819
2006-01-30 22:20:49 +00:00
Evan Cheng 08390f6a21 i64 -> f32, f32 -> i64 and some clean up.
llvm-svn: 25818
2006-01-30 22:13:22 +00:00
Evan Cheng 5b97fcf0f5 Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
conversions. SSE does not have instructions to handle these tasks.

llvm-svn: 25817
2006-01-30 08:02:57 +00:00
Chris Lattner 37faeb2b02 Revamp the ICC/FCC reading instructions to be parameterized in terms of the
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.

llvm-svn: 25815
2006-01-30 07:43:04 +00:00
Chris Lattner 33a79cae7c Compile:
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll

llvm-svn: 25814
2006-01-30 06:14:02 +00:00
Chris Lattner 321e337d95 If the target has V9 instructions, this pass is a noop, don't bother
running it.

llvm-svn: 25811
2006-01-30 05:51:14 +00:00
Chris Lattner 90d3fd9e7c When in v9 mode, emit fabsd/fnegd/fmovd
llvm-svn: 25810
2006-01-30 05:48:37 +00:00
Chris Lattner 99dcb95e14 First step towards V9 instructions in the V8 backend, two conditional move
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}

llvm-svn: 25809
2006-01-30 05:35:57 +00:00
Chris Lattner 238fe93242 Two changes:
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)

llvm-svn: 25807
2006-01-30 04:57:43 +00:00
Chris Lattner af209b8b13 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 25806
2006-01-30 04:34:44 +00:00
Jeff Cohen baeb39c969 Add AddSymbol() method to DynamicLibrary to work around Windows limitation
of being unable to search for symbols in an EXE.  It will also allow other
existing hacks to be improved.

llvm-svn: 25805
2006-01-30 04:33:51 +00:00
Chris Lattner d6f5ae4455 don't insert an and node if it isn't needed here, this can prevent folding
of lowered target nodes.

llvm-svn: 25804
2006-01-30 04:22:28 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
llvm-svn: 25803
2006-01-30 04:09:27 +00:00
Chris Lattner 4ac0fa2aa5 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,
allowing redundant and's to be eliminated by the dag combiner.

llvm-svn: 25800
2006-01-30 03:51:45 +00:00
Chris Lattner 3b40e64aa3 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode,
to permit recursion

llvm-svn: 25799
2006-01-30 03:49:37 +00:00
Chris Lattner c6fa0282d2 adjust prototype
llvm-svn: 25798
2006-01-30 03:49:07 +00:00
Jeff Cohen 8ee89c774b Fix indentation.
llvm-svn: 25795
2006-01-29 22:02:52 +00:00
Chris Lattner 4d1ea71a31 Fix RET of promoted values on targets that custom expand RET to a target node.
llvm-svn: 25794
2006-01-29 21:02:23 +00:00
Chris Lattner 32058cfb7b Functions that are lazily streamed in from the .bc file are *not* external.
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704

llvm-svn: 25793
2006-01-29 20:49:17 +00:00
Chris Lattner 3c6a950653 add another note
llvm-svn: 25789
2006-01-29 09:46:06 +00:00
Chris Lattner dabee1f655 add some performance notes from looking at sgefa
llvm-svn: 25788
2006-01-29 09:42:20 +00:00
Chris Lattner 7c7cbde0e5 add a high-priority SSE issue from sgefa
llvm-svn: 25787
2006-01-29 09:14:47 +00:00
Chris Lattner 5a7a22c9dd add a missed optimization
llvm-svn: 25786
2006-01-29 09:08:15 +00:00
Chris Lattner 2c748afd6c cleanups to the ValueTypeActions interface
llvm-svn: 25785
2006-01-29 08:42:06 +00:00
Chris Lattner 3072af4d4f Now that OpActions is big enough, we can specify actions for vector types
llvm-svn: 25784
2006-01-29 08:41:37 +00:00
Chris Lattner 8a4a3deaf9 clean up interface to ValueTypeActions
llvm-svn: 25783
2006-01-29 08:41:12 +00:00
Chris Lattner ccb4476c87 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands
instead.

llvm-svn: 25780
2006-01-29 07:58:15 +00:00
Chris Lattner d7738e6b32 disable this for now
llvm-svn: 25778
2006-01-29 07:31:33 +00:00
Reid Spencer 0c05a2c99c Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
few stores under certain conditions.

llvm-svn: 25777
2006-01-29 06:48:25 +00:00
Chris Lattner 35d20a4c00 remove now-dead code, the legalizer takes care of this for us
llvm-svn: 25776
2006-01-29 06:45:31 +00:00
Chris Lattner 132177e103 The FP stack doesn't support UNDEF, ask the legalizer to legalize it
instead of lying and saying we have it.

llvm-svn: 25775
2006-01-29 06:44:22 +00:00
Chris Lattner 2f292789dc Allow custom expansion of ConstantVec nodes. PPC will use this in the future.
llvm-svn: 25774
2006-01-29 06:34:16 +00:00
Chris Lattner d33c60b52b Request expansion of ConstantVec nodes.
llvm-svn: 25773
2006-01-29 06:32:58 +00:00
Chris Lattner 758b0ac54b Legalize ConstantFP into TargetConstantFP when the target allows. Implement
custom expansion of ConstantFP nodes.

llvm-svn: 25772
2006-01-29 06:26:56 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP.
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
2006-01-29 06:26:08 +00:00
Chris Lattner b5f0ba6051 Update alpha to reflect recent constantfp legalize changes. It's not clear
why all this code isn't autogenerated. :(

llvm-svn: 25770
2006-01-29 06:25:22 +00:00
Chris Lattner 678da98835 eliminate uses of SelectionDAG::getBR2Way_CC
llvm-svn: 25767
2006-01-29 06:00:45 +00:00
Chris Lattner 1b09c6ba87 cmovle != cmovlt
llvm-svn: 25761
2006-01-29 03:47:30 +00:00
Jeff Cohen 4ab39e43e8 Fix typo.
llvm-svn: 25760
2006-01-29 03:45:35 +00:00
Jeff Cohen 8643ea67b1 Flesh out AMD family/models.
llvm-svn: 25755
2006-01-28 20:30:18 +00:00
Jeff Cohen 58ca0be9af Correctly determine CPU vendor.
llvm-svn: 25754
2006-01-28 19:48:34 +00:00
Jeff Cohen 71287085a1 Use union instead of reinterpret_cast.
llvm-svn: 25751
2006-01-28 18:47:32 +00:00
Jeff Cohen b5de47cd9a Fix recognition of Intel CPUs.
llvm-svn: 25750
2006-01-28 18:38:20 +00:00
Chris Lattner b3ab2d3a42 Is64Bit reflects the capability of the chip, not an aspect of the target os
llvm-svn: 25749
2006-01-28 18:23:48 +00:00