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3 Commits

Author SHA1 Message Date
Brad Smith 9ae95a0f8f [Sparc] Remove cast that truncates immediate operands to 32 bits. 
Patch by: Mark Kettenis

Test provided by Jessica Clarke.

Differential Revision: https://reviews.llvm.org/D87210
 2020-10-02 20:14:55 -04:00
Daniel Cederman 60e6ce4155 [Sparc] Select correct register class for FP register constraints 
Summary: The fX version of floating-point registers only supports
single precision. We need to map the name to dX for doubles and qX
for long doubles if we want getRegForInlineAsmConstraint() to be
able to pick the correct register class.

Reviewers: jyknight, venkatra

Reviewed By: jyknight

Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D47258

llvm-svn: 333512
 2018-05-30 06:07:55 +00:00
James Y Knight d4e1b00e7c [SPARC] Support 'f' and 'e' inline asm constraints. 
Based on patch by Patrick Boettcher and Chris Dewhurst.

Differential Revision: https://reviews.llvm.org/D29116

llvm-svn: 302911
 2017-05-12 15:59:10 +00:00