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4 Commits

Author SHA1 Message Date
Craig Topper 9f14d9f939 Add patterns for v16i16 and v32i8 immAllZerosV to select VPXOR to match v4i64 and v8i32. 
llvm-svn: 148106
 2012-01-13 06:59:47 +00:00
Craig Topper a065238c6e Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and use AVX2 shifts when AVX2 is enabled. 
llvm-svn: 145022
 2011-11-21 01:12:36 +00:00
Craig Topper e79761df73 Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift instructions. Remove 256-bit splat handling from LowerShift as it was already handled by PerformShiftCombine. 
llvm-svn: 145005
 2011-11-20 00:12:05 +00:00
Craig Topper ea28a34c43 Add lowering for AVX2 shift instructions. 
llvm-svn: 144380
 2011-11-11 07:39:23 +00:00