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8 Commits

Author SHA1 Message Date
Jyotsna Verma f4e324f4fb Hexagon: Add encoding bits to the TFR64 instructions. 
Set imMoveImm, isAsCheapAsAMove flags for TFRI instructions.

llvm-svn: 176499
 2013-03-05 18:42:28 +00:00
Jyotsna Verma 7503a62bce Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h. 
Add HexagonMCInst class which adds various Hexagon VLIW annotations.
In addition, this class also includes some APIs related to the
constant extenders.

llvm-svn: 175634
 2013-02-20 16:13:27 +00:00
Jyotsna Verma 90295156d8 Use multiclass to define store instructions with base+immediate offset 
addressing mode and immediate stored value.

llvm-svn: 169408
 2012-12-05 19:32:03 +00:00
Brendon Cahoon f6b687e5d1 Revert 156634 upon request until code improvement changes are made. 
llvm-svn: 156775
 2012-05-14 19:35:42 +00:00
Brendon Cahoon 31f8723ef3 Hexagon constant extender support. 
Patch by Jyotsna Verma.

llvm-svn: 156634
 2012-05-11 19:56:59 +00:00
Sirish Pande f8e5e3c072 Support for target dependent Hexagon VLIW packetizer. 
This patch creates and optimizes packets as per Hexagon ISA rules.

llvm-svn: 156109
 2012-05-03 21:52:53 +00:00
Chandler Carruth 3c3bb55a85 Revert r155365, r155366, and r155367. All three of these have regression 
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

llvm-svn: 155372
 2012-04-23 18:25:57 +00:00
Sirish Pande 6cd2251598 Support for Hexagon VLIW Packetizer. 
llvm-svn: 155365
 2012-04-23 17:49:20 +00:00