973cd1c845
more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
...
llvm-svn: 24625
2005-12-06 20:43:30 +00:00
29b7ef0065
OK, this does wonders for broken stuff
...
llvm-svn: 24624
2005-12-06 20:40:34 +00:00
e3cccc938b
Added comment for removing assert
...
llvm-svn: 24623
2005-12-06 18:16:08 +00:00
a69fcbdeb8
Collapsing node if variable length struct with final field of length zero
...
llvm-svn: 24621
2005-12-06 18:04:30 +00:00
1473162af0
Handling of zero length last fields in struct used for growing it arbitrarily
...
llvm-svn: 24620
2005-12-06 18:01:20 +00:00
d490d4f023
Fix test/Regression/Linker/2005-12-06-AppendingZeroLengthArrays.ll and
...
PR662. Thanks to Markus for providing me with a ton of files to
reproduce the problem!
llvm-svn: 24619
2005-12-06 17:30:58 +00:00
98dcd12c28
new testcase for PR662
...
llvm-svn: 24618
2005-12-06 17:29:54 +00:00
cfe67e1318
Implement external storage for post-order iteration, implementing PR267
...
Patch by Saem Ghani, thanks!
llvm-svn: 24617
2005-12-06 07:05:27 +00:00
41b1cdc771
Teach the SelectionDAG ISel how to turn ConstantPacked values into
...
constant nodes with vector types. Also teach the asm printer how to print
ConstantPacked constant pool entries. This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.
LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
.space 4
.space 4
.space 4
.long 1065353216 ; float 1
.text
.align 4
.globl _foo
_foo:
lis r2, ha16(LCPI1_0)
la r2, lo16(LCPI1_0)(r2)
li r4, 0
lvx v0, r4, r2
lvx v1, r4, r3
vaddfp v0, v1, v0
stvx v0, r4, r3
blr
For the llvm code:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
llvm-svn: 24616
2005-12-06 06:18:55 +00:00
fea33f7e64
Use new PPC-specific nodes to represent shifts which require the 6-bit
...
amount handling that PPC provides. These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits. This fixes a miscompilation of crafty with
the new front-end.
llvm-svn: 24615
2005-12-06 02:10:38 +00:00
e788bbf6ef
added instructions with inverted immediates
...
llvm-svn: 24614
2005-12-06 00:33:53 +00:00
08c4a775e6
yea, it helps to have your path set right when testing
...
llvm-svn: 24613
2005-12-05 23:41:45 +00:00
3c7c4d7508
These never trigger, but whatever
...
llvm-svn: 24612
2005-12-05 23:19:44 +00:00
c0c190239d
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
...
llvm-svn: 24611
2005-12-05 23:09:43 +00:00
0fe76d1585
* Infer instruction property hasCtrlDep from pattern if it has one.
...
* Fixed a bug related to hasCtrlDep property use.
llvm-svn: 24610
2005-12-05 23:08:55 +00:00
5bfcd1e63a
move this over to the dag
...
llvm-svn: 24609
2005-12-05 20:50:53 +00:00
077200737c
getRawValue zero extens for unsigned values, use getsextvalue so that we
...
know that small negative values fit into the immediate field of addressing
modes.
llvm-svn: 24608
2005-12-05 18:23:57 +00:00
9410433966
fix constant pool loads
...
llvm-svn: 24607
2005-12-05 17:51:02 +00:00
3539778883
Fix the #1 code quality problem that I have seen on X86 (and it also affects
...
PPC and other targets). In a particular, consider code like this:
struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
return a.x * b.x + a.y * b.y + a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
Vector3 r;
r.x = dot( a, b.a );
r.y = dot( a, b.b );
r.z = dot( a, b.c );
return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
for (int i = 0; i < n; i++)
x[i] = mul( x[i], m );
}
we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them). Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:
LBB3_1: ; no_exit.preheader
li r2, 0
addi r6, r3, 64 ;; 9 values live across the loop body!
addi r7, r3, 56
addi r8, r3, 48
addi r9, r3, 40
addi r10, r3, 32
addi r11, r3, 24
addi r12, r3, 16
addi r30, r3, 8
LBB3_2: ; no_exit
lfd f0, 0(r30)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3) ;; no constant indices folded into the loads!
lfd f3, 0(r4)
lfd f4, 0(r10)
lfd f5, 0(r6)
lfd f6, 0(r7)
lfd f7, 0(r8)
lfd f8, 0(r9)
lfd f9, 0(r11)
lfd f10, 0(r12)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r29, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r29, r29
bne cr0, LBB3_2 ; no_exit
uh, yuck. With this patch, we now sink the constant offsets into the loop, producing
this code:
LBB3_1: ; no_exit.preheader
li r2, 0
LBB3_2: ; no_exit
lfd f0, 8(r3)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3)
lfd f3, 0(r4)
lfd f4, 32(r3) ;; much nicer.
lfd f5, 64(r3)
lfd f6, 56(r3)
lfd f7, 48(r3)
lfd f8, 40(r3)
lfd f9, 24(r3)
lfd f10, 16(r3)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r6, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r6, r6
bne cr0, LBB3_2 ; no_exit
This is much nicer as it reduces register pressure in the loop a lot. On X86,
this takes the function from having 9 spilled registers to 2. This should help
some spec programs on X86 (gzip?)
This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.
llvm-svn: 24606
2005-12-05 07:10:48 +00:00
7d4d93c52c
Add a flag to Module::getGlobalVariable to allow it to return vars with
...
internal linkage.
Patch provided by Evan Jones, thanks!
llvm-svn: 24604
2005-12-05 05:30:21 +00:00
ca18d19210
attribute((used)) is now supported
...
llvm-svn: 24603
2005-12-05 05:23:06 +00:00
165998207e
Wrap a long line, never internalize llvm.used.
...
llvm-svn: 24602
2005-12-05 05:07:38 +00:00
b0e9741022
New testcase for PR660
...
llvm-svn: 24601
2005-12-05 04:48:12 +00:00
7b43664aa0
testcase for PR664
...
llvm-svn: 24600
2005-12-05 03:22:46 +00:00
3c0b8f577d
Several things:
...
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
llvm-svn: 24599
2005-12-05 02:40:25 +00:00
282c2af4d8
On some targets (e.g. X86), shift amounts are not the same as the value
...
being shifted. Don't assume they are.
llvm-svn: 24598
2005-12-05 02:37:26 +00:00
ba369ae8f1
Implement PR673: for explicit register references, use type information
...
if available
llvm-svn: 24597
2005-12-05 02:36:37 +00:00
3717b4c830
Add some methods
...
llvm-svn: 24596
2005-12-05 02:35:08 +00:00
c54cddd25b
Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
...
llvm-svn: 24595
2005-12-05 02:34:29 +00:00
f3322af5c6
Add some explicit type casts so that tblgen knows the type of the shift
...
amount, which is not necessarily the same as the type being shifted.
llvm-svn: 24594
2005-12-05 02:34:05 +00:00
d49489f01e
Generate code to silence bogus GCC warnings.
...
llvm-svn: 24593
2005-12-05 00:48:51 +00:00
efc86f5f7a
The basic fneg cases are already autogen'd
...
llvm-svn: 24592
2005-12-04 19:04:38 +00:00
f979794717
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
...
improvements.
llvm-svn: 24591
2005-12-04 19:01:59 +00:00
fd857daa0d
Finish moving uncond br over to .td file, remove from .cpp file.
...
llvm-svn: 24590
2005-12-04 18:48:01 +00:00
d9d18aff6a
Define BR in the .td file now that Evan made tblgen smarter.
...
llvm-svn: 24589
2005-12-04 18:42:54 +00:00
95cb763818
Added isel patterns for RET, JMP, and WRITEPORT.
...
llvm-svn: 24588
2005-12-04 08:19:43 +00:00
f02bb9af8b
* Commit the fix (by Chris) for a tblgen type inferencing bug.
...
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.
llvm-svn: 24587
2005-12-04 08:18:16 +00:00
e8531381e2
* Added instruction property hasCtrlDep for those which r/w control-flow
...
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
llvm-svn: 24586
2005-12-04 08:13:17 +00:00
7e79292fef
Fix PR672 another way which should be more robust
...
llvm-svn: 24585
2005-12-04 06:03:50 +00:00
394350dcca
new testcase, for PR672
...
llvm-svn: 24584
2005-12-04 06:03:25 +00:00
8782b782cd
dbg.stoppoint returns a value, don't forget to init it
...
llvm-svn: 24583
2005-12-03 18:50:48 +00:00
3339c6a1f6
expand testcase, which has been in my tree for a while now
...
llvm-svn: 24582
2005-12-03 18:26:41 +00:00
2820b8c855
Fix SimplifyCFG/2005-12-03-IncorrectPHIFold.ll
...
llvm-svn: 24581
2005-12-03 18:25:58 +00:00
2492b74330
new testcase, miscompiled by simplifycfg. This has been distilled from Ptrdist/bc
...
llvm-svn: 24580
2005-12-03 18:25:32 +00:00
bd23d34be0
Fix a bug in the testcase
...
llvm-svn: 24579
2005-12-03 17:20:57 +00:00
ecfc7e56c5
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
...
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
llvm-svn: 24578
2005-12-03 07:15:55 +00:00
5d7a0a3aee
new testcase for PR672
...
llvm-svn: 24577
2005-12-03 07:14:47 +00:00
352630141c
Revert my previous patch which broke due to lazy streaming of functions
...
from .bc files.
llvm-svn: 24575
2005-12-02 19:00:22 +00:00
f9b27d7011
bah, must generate all results
...
llvm-svn: 24574
2005-12-02 06:08:08 +00:00
73420b3795
cycle counter fix
...
llvm-svn: 24573
2005-12-02 04:56:24 +00:00
986cb40953
add a note
...
llvm-svn: 24572
2005-12-02 00:11:20 +00:00
0142afd6c1
Don't remove two operand, two result nodes from the binary ops map. These
...
should come from the arbitrary ops map.
This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll
llvm-svn: 24571
2005-12-01 23:14:50 +00:00
e4ffb9a57d
New testcase that crashes llc
...
llvm-svn: 24570
2005-12-01 23:14:09 +00:00
ef2d8ca0b6
If a module has a main, but it is defined externally, refuse to run it.
...
Attempting to run it will find lli's main, which isn't the desired effect.
llvm-svn: 24569
2005-12-01 22:48:23 +00:00
05b0b4575b
Promote line and column number information for our friendly 64-bit targets.
...
llvm-svn: 24568
2005-12-01 18:21:35 +00:00
93feffb4ed
IA64 doesn't support the LOCATION node, and for some reason the ISelPattern
...
stuff isn't using ISelLowering.cpp
llvm-svn: 24567
2005-12-01 18:19:53 +00:00
df9287836e
Make sure these get added into the codegenmap when appropriate
...
llvm-svn: 24566
2005-12-01 18:09:22 +00:00
9d0d715e83
This is a bugfix for SelectNodeTo. In certain situations, we could be
...
selecting a node and use a mix of getTargetNode() and SelectNodeTo. Because
SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert
its result into the CSE maps, we would sometimes miss a CSE opportunity.
This is extremely rare, but worth fixing for completeness.
llvm-svn: 24565
2005-12-01 18:00:57 +00:00
7bb09912c8
major think-o
...
llvm-svn: 24564
2005-12-01 17:48:51 +00:00
006bb04f3a
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
...
work. This change has no effect on generated code.
llvm-svn: 24563
2005-12-01 04:51:06 +00:00
aa5f8f2a26
Cosmetic change, better reflects actual values
...
llvm-svn: 24562
2005-12-01 04:48:26 +00:00
bd099102f0
Fix a regression caused by a patch earlier today
...
llvm-svn: 24561
2005-12-01 03:50:19 +00:00
ce68ef8073
Flags where I think I need them, quick, before the nightly tester starts
...
llvm-svn: 24560
2005-12-01 01:53:10 +00:00
4b02426130
Proper support for shifts with register shift value.
...
llvm-svn: 24559
2005-12-01 00:43:55 +00:00
d94aa71e1a
Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
...
llvm-svn: 24558
2005-12-01 00:41:50 +00:00
fed83adbe3
Teach tblgen to accept register source operands in patterns, e.g.
...
def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
"shl{b} {%cl, $dst|$dst, %CL}",
[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.
llvm-svn: 24557
2005-12-01 00:18:45 +00:00
faad542d24
Nuke CodeGenInstruction's ValueType member, it is no longer used.
...
llvm-svn: 24556
2005-12-01 00:12:04 +00:00
cdf2c67888
Stop checking the ValueType of the CodeGenInstruction. Instead, use the
...
ValueType from the RegisterClass or Operands. This step is necessary to
allow RegisterClasses to have multiple ValueTypes.
llvm-svn: 24555
2005-12-01 00:06:14 +00:00
e479ccb27b
fit into 80 columns
...
llvm-svn: 24554
2005-11-30 23:58:18 +00:00
3e63dc00da
Make the code generated by tblgen return the result of SelectNodeTo, to
...
permit future changes.
llvm-svn: 24553
2005-11-30 23:08:45 +00:00
4b25924d2a
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24552
2005-11-30 23:04:38 +00:00
a75694aa16
Pay attn to the node returned by SelectNodeTo
...
llvm-svn: 24551
2005-11-30 23:02:08 +00:00
af2e0373dd
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24550
2005-11-30 22:59:19 +00:00
e318977940
SelectNodeTo now returns N. Use it instead of return N directly.
...
llvm-svn: 24549
2005-11-30 22:53:06 +00:00
be5dd5da19
Make SelectNodeTo return N
...
llvm-svn: 24548
2005-11-30 22:45:14 +00:00
3713e6b49c
Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
...
llvm-svn: 24547
2005-11-30 20:40:54 +00:00
bd065599e6
Test that crashes the ppc backend.
...
llvm-svn: 24546
2005-11-30 20:40:28 +00:00
dc4ffef633
Fix a bug where we didn't realize that vaarg reads memory. This fixes
...
Transforms/DeadStoreElimination/2005-11-30-vaarg.ll
llvm-svn: 24545
2005-11-30 19:38:22 +00:00
6299905a06
new testcase dse is miscompiling
...
llvm-svn: 24544
2005-11-30 19:37:08 +00:00
fb619ef95c
Add a simple clear() method
...
llvm-svn: 24543
2005-11-30 19:31:23 +00:00
11695c0537
Fix a typo in my latest change
...
llvm-svn: 24542
2005-11-30 18:57:39 +00:00
6f8c1ace6e
No longer track value types for asm printer operands, and remove them as
...
an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
llvm-svn: 24541
2005-11-30 18:54:35 +00:00
f621b333f3
Fix some copy and paste typos.
...
llvm-svn: 24540
2005-11-30 18:37:14 +00:00
c174048430
CALLSEQ_START/END nodes don't get memoized, do not add them in when
...
replaceAllUses'ing.
llvm-svn: 24539
2005-11-30 18:20:52 +00:00
7ffe3affda
remove redundant code
...
llvm-svn: 24538
2005-11-30 17:14:11 +00:00
6ee8566cae
At long last, you can say that f32 isn't supported for setcc
...
llvm-svn: 24537
2005-11-30 17:12:26 +00:00
ede966e8ee
Make typesafe that which isn't: FCMOVxx
...
llvm-svn: 24536
2005-11-30 17:11:20 +00:00
873ed82a36
FPSelect and more custom lowering
...
llvm-svn: 24535
2005-11-30 16:10:29 +00:00
1064d6ec43
First chunk of actually generating vector code for packed types. These
...
changes allow us to generate the following code:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
for this llvm:
void %foo(<4 x float>* %a) {
entry:
%tmp1 = load <4 x float>* %a
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float>* %a
ret void
}
llvm-svn: 24534
2005-11-30 08:22:07 +00:00
6db615df14
All sorts of stuff.
...
Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy. They should be custom lowered though.
Lots more stuff compiles now (go go single source!). Of course, none of it
probably works, but that is what the nightly tester can find out :)
llvm-svn: 24533
2005-11-30 07:19:56 +00:00
8d17c70171
add support for custom lowering SINT_TO_FP
...
llvm-svn: 24531
2005-11-30 06:43:03 +00:00
b2d8f04437
Add a link to the doxygen tarball
...
llvm-svn: 24530
2005-11-30 06:35:34 +00:00
0f6342f669
copy the doxygen tarball into the HTML directory after building it
...
llvm-svn: 24529
2005-11-30 06:31:28 +00:00
893a45b86a
minor cleanup
...
llvm-svn: 24528
2005-11-30 05:26:03 +00:00
3fd1b4c9bf
Fix a problem with llvm-ranlib that (on some platforms) caused the archive
...
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.
Patch provided by Evan Jones
llvm-svn: 24527
2005-11-30 05:21:10 +00:00
9c7af08bc9
Fix a bug in a recent patch that broke shifts
...
llvm-svn: 24526
2005-11-30 05:11:18 +00:00
4eb7af9bc9
Added support to STORE and shifts to DAG to DAG isel.
...
llvm-svn: 24525
2005-11-30 02:51:20 +00:00
11d61613af
Fixed a bug introduced by my last commit: TargetGlobalValues should key on
...
GlobalValue * and index pair. Update getGlobalAddress() for symmetry.
llvm-svn: 24524
2005-11-30 02:49:21 +00:00
0e0de2f3f0
Added an index field to GlobalAddressSDNode so it can represent X+12, etc.
...
llvm-svn: 24523
2005-11-30 02:04:11 +00:00
d2cb70513d
Fixed a minor bug: - -offset != offset iff offset == MININT
...
llvm-svn: 24522
2005-11-30 01:59:00 +00:00
048b26387b
Represent the encoding of the SPR instructions as they actually are, so
...
that we can use the correct SPR numbers in the InstrInfo.td file. This is
necessary to support VRsave.
llvm-svn: 24521
2005-11-29 22:42:50 +00:00
72ab335858
Add more X86 ISel patterns.
...
llvm-svn: 24520
2005-11-29 19:38:52 +00:00
c8af0cb893
Better error message when unrecognized opcode is seen.
...
llvm-svn: 24519
2005-11-29 18:44:58 +00:00
3e7db9c6d5
Hook up one type, v4f32, to the VR RegisterClass for now.
...
llvm-svn: 24517
2005-11-29 08:17:20 +00:00
c138118cdb
Add the remainder of the AltiVec 4 x float instructions. Further
...
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.
llvm-svn: 24516
2005-11-29 08:04:45 +00:00
435b402e1f
Add support for a new STRING and LOCATION node for line number support, patch
...
contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24515
2005-11-29 06:21:05 +00:00
4d0251ad55
Add the new vector types to tablegen
...
llvm-svn: 24514
2005-11-29 06:19:38 +00:00
9c415364cf
No targets support line number info yet.
...
llvm-svn: 24513
2005-11-29 06:16:21 +00:00
5a8726c575
Add support for a new STRING and LOCATION node for line number support, patch
...
contributed by Daniel Berlin, with a few cleanups here and there by me.
llvm-svn: 24512
2005-11-29 06:15:39 +00:00
89b049af90
Add the majority of the vector machien value types we expect to support,
...
and make a few changes to the legalization machinery to support more than
16 types.
llvm-svn: 24511
2005-11-29 05:45:29 +00:00
1d4af53444
Fixed a comment bug:
...
createPPCPatternInstructionSelector -> createPPCISelPattern
llvm-svn: 24510
2005-11-29 04:59:46 +00:00
a31983137a
Add "SCC" to the lexicon. Patch provided by Marco Matthies, thanks!
...
llvm-svn: 24509
2005-11-29 01:34:50 +00:00
45edf8a27d
Fix PR670 and test/Regression/Transforms/Mem2Reg/2005-11-28-Crash.ll
...
llvm-svn: 24508
2005-11-29 01:07:12 +00:00
7cc680ab79
new testcase for pr670
...
llvm-svn: 24507
2005-11-29 01:06:51 +00:00
d8bc778352
add Evan and Jim. Please edit your entries as desired.
...
llvm-svn: 24506
2005-11-29 00:57:06 +00:00
c418b5d938
refix typo
...
llvm-svn: 24505
2005-11-29 00:42:30 +00:00
7a18a25d33
don't say this is i128, because it isn't yet. Hopefully nate will change
...
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.
llvm-svn: 24504
2005-11-29 00:41:40 +00:00
d3bc8cb26d
revert my change for the time being, which broke the build
...
llvm-svn: 24503
2005-11-29 00:24:08 +00:00
3e149a2c90
Fixed a punctuation error.
...
llvm-svn: 24502
2005-11-28 23:25:41 +00:00
50986909dc
fix a typo :)
...
llvm-svn: 24501
2005-11-28 22:42:15 +00:00
d251192910
a few more comments on the interfaces and functions
...
llvm-svn: 24500
2005-11-28 18:10:59 +00:00
517caef495
Added documented rsprofiler interface. Also remove new profiler passes, the
...
old ones have been updated to implement the interface.
llvm-svn: 24499
2005-11-28 18:00:38 +00:00
62ef23839c
Add the remove() function from the C library.
...
llvm-svn: 24498
2005-11-28 15:49:15 +00:00
e8c6277a4f
Teach Visual Studio about new files.
...
llvm-svn: 24497
2005-11-28 06:46:36 +00:00
7ff44ec372
Fix VC++ warning.
...
llvm-svn: 24496
2005-11-28 06:45:57 +00:00
820c94e467
Add a missed optimization
...
llvm-svn: 24495
2005-11-28 04:52:39 +00:00
1f47b25727
Use std:: where appropriate
...
llvm-svn: 24494
2005-11-28 02:30:22 +00:00
93e59f6032
Random sampling (aka Arnold and Ryder) profiling. This is still preliminary, but it works on spec on x86 and alpha. The idea is to allow profiling passes to remember what profiling they inserted, then a random sampling framework is inserted which consists of duplicated basic blocks (without profiling), such that at each backedge in the program and entry into every function, the framework chooses whether to use the instrumented code or the instrumentation free code. The goal of such a framework is to make it reasonably cheap to do random sampling of very expensive profiling products (such as load-value profiling).
...
The code is organized into 3 parts (2 passes)
1) a linked set of profiling passes, which implement an analysis group (linked, like alias analysis are). These insert profiling into the program, and remember what they inserted, so that at a later time they can be queried about any instruction.
2) a pass that handles inserting the random sampling framework. This also has options to control how random samples are choosen. Currently implemented are Global counters, register allocated global counters, and read cycle counter (see? there was a reason for it).
The profiling passes are almost identical to the existing ones (block, function, and null profiling is supported right now), and they are valid passes without the sampling framework (hence the existing passes can be unified with the new ones, not done yet).
Some things are a bit ugly still, but that should be fixed up soon enough.
Other todo? making the counter values not "magic 2^16 -1" values, but dynamically choosable.
llvm-svn: 24493
2005-11-28 00:58:09 +00:00
11fd6b22b1
Small tweaks noticed while on the plane.
...
llvm-svn: 24492
2005-11-26 22:39:34 +00:00
5fc3794e71
since reg2mem requires it, might as well mention that it preserves it
...
llvm-svn: 24491
2005-11-25 16:04:54 +00:00
0c88f150c6
add support for dynamic_stackalloc to the dag isel (thanks andrew ;)
...
next up: support argument passing in memory, not just registers
llvm-svn: 24490
2005-11-25 07:49:25 +00:00
8492fd30ab
Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
...
Registers. Apologies to Jim if the scheduling info so far isn't accurate.
There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.
llvm-svn: 24489
2005-11-23 05:29:52 +00:00
061029dee2
Reg2Mem is something a pass may depend on, so allow that
...
llvm-svn: 24488
2005-11-22 22:14:23 +00:00
71b09bbb07
turns out, demotion and invokes and critical edges don't mix
...
llvm-svn: 24487
2005-11-22 21:45:19 +00:00
d6a0308470
Fix warning, the better way. Really, this is what this instruction is for, so use it
...
llvm-svn: 24486
2005-11-22 20:59:00 +00:00
03390557fa
Fix warning
...
llvm-svn: 24485
2005-11-22 20:56:05 +00:00
d37c13154a
Check in code to scalarize arbitrarily wide packed types for some simple
...
vector operations (load, add, sub, mul).
This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
on ppc as:
_foo:
lfs f0, 12(r3)
lfs f1, 8(r3)
lfs f2, 4(r3)
lfs f3, 0(r3)
fadds f0, f0, f0
fadds f1, f1, f1
fadds f2, f2, f2
fadds f3, f3, f3
stfs f0, 12(r3)
stfs f1, 8(r3)
stfs f2, 4(r3)
stfs f3, 0(r3)
blr
llvm-svn: 24484
2005-11-22 18:16:00 +00:00
0294e33ea4
massive DAGISel patch. lots and lots more stuff compiles now
...
llvm-svn: 24483
2005-11-22 04:20:06 +00:00
07890bbec4
Rather than attempting to legalize 1 x float, make sure the SD ISel never
...
generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.
The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.
llvm-svn: 24482
2005-11-22 01:29:36 +00:00
ac6cb46429
Use HasDotTypeDotSizeDirective instead of forELF
...
llvm-svn: 24481
2005-11-21 23:06:54 +00:00
629d09757e
Add a new flag
...
llvm-svn: 24480
2005-11-21 23:06:08 +00:00
78161dbc84
Remove a level of indentation by using a continue.
...
llvm-svn: 24479
2005-11-21 22:48:18 +00:00
40f8c8450d
Simplify the subtarget info, allow the asmwriter to do some target sensing
...
based on TargetType.
llvm-svn: 24478
2005-11-21 22:43:58 +00:00
99be8f766f
Use subtarget information computed by X86Subtarget instead of rolling our own.
...
llvm-svn: 24477
2005-11-21 22:39:40 +00:00
3eb876117a
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
...
or native Win32
llvm-svn: 24476
2005-11-21 22:31:58 +00:00
ebc39f5a9c
Add a forELF flag, allowing the removal of forCygwin and simplification of
...
conditionals.
llvm-svn: 24475
2005-11-21 22:19:48 +00:00
505ee2b886
Add some more directives
...
llvm-svn: 24474
2005-11-21 19:51:51 +00:00
7df25ab429
simplify and genericize this code
...
llvm-svn: 24473
2005-11-21 19:50:31 +00:00
8edbf805d7
add support for div/rem to the dag->dag isel. yay.
...
llvm-svn: 24472
2005-11-21 14:14:54 +00:00
f28b3bd8b4
I think I know what you meant here, but just to be safe I'll let you
...
do it. :)
<_sabre_> excuses excuses
llvm-svn: 24471
2005-11-21 14:09:40 +00:00
b9db67a045
Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom of
...
file.
llvm-svn: 24470
2005-11-21 08:40:17 +00:00
b55de47595
Start using shared asmprinter Constant Pool emitter, use shorter cpi names.
...
llvm-svn: 24469
2005-11-21 08:38:26 +00:00
4a7eb5132b
prune #include
...
llvm-svn: 24468
2005-11-21 08:33:17 +00:00
8a5f3c1b68
Switch to using the shared constant pool printer, along with using shorter
...
CPI ids
llvm-svn: 24467
2005-11-21 08:32:23 +00:00
882b9fa977
Switch to using the generic constant pool emitter impl, use shorter
...
CPI names
llvm-svn: 24466
2005-11-21 08:29:17 +00:00
ef83ebd45d
Use generic constant pool emission code in the AsmPrinter class.
...
llvm-svn: 24465
2005-11-21 08:26:15 +00:00
f2991cee1f
Allow target to customize directive used to switch to arbitrary section in SwitchSection,
...
add generic constant pool emitter
llvm-svn: 24464
2005-11-21 08:25:09 +00:00
4fd1c411ba
add two more config directives, add method for printing constant pool
...
llvm-svn: 24463
2005-11-21 08:24:11 +00:00
ffbfa71866
Use the FunctionNumber provided by the AsmPrinter class
...
llvm-svn: 24462
2005-11-21 08:14:07 +00:00
08adbd13ff
increment the function number in SetupMachineFunction
...
llvm-svn: 24461
2005-11-21 08:13:27 +00:00
462263274f
Make the AsmPrinter keep track of the notion of a function number.
...
llvm-svn: 24460
2005-11-21 08:12:47 +00:00
dd3bf8e4a2
Use CommentString where possible, fix a bug where aix mode wouldn't assemble
...
due to basic blocks being misnamed.
llvm-svn: 24459
2005-11-21 08:02:41 +00:00
a0222a1698
unify the darwin and aix constant pool printers
...
llvm-svn: 24458
2005-11-21 07:57:37 +00:00
bb644e39c0
Adjust to capitalized asmprinter method names
...
llvm-svn: 24457
2005-11-21 07:51:36 +00:00
99946fb63f
Adjust to capitalized AsmPrinter method names
...
llvm-svn: 24456
2005-11-21 07:51:23 +00:00
02363bbb61
Capitalize methods for better consistency
...
llvm-svn: 24455
2005-11-21 07:51:06 +00:00
d365627d3e
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
...
port to properly use L for the bb prefix instead of .
llvm-svn: 24454
2005-11-21 07:43:59 +00:00
c2bc19af57
use PrivateGlobalPrefix for basic blocks
...
llvm-svn: 24453
2005-11-21 07:41:05 +00:00
2b53ea99b0
Use PrivateGlobalPrefix for basic block labels
...
llvm-svn: 24452
2005-11-21 07:39:22 +00:00
9885c97088
Use PrivateGlobalPrefix for basic blocks
...
llvm-svn: 24451
2005-11-21 07:38:08 +00:00
a43b832f7f
Switch to the new shared SwitchSection
...
llvm-svn: 24450
2005-11-21 07:30:28 +00:00
2bccd73dbb
Start using SwitchSection, allowing globals and functions to be emitted
...
to specific sections. Delete some dead functions copied from the X86 backend.
llvm-svn: 24449
2005-11-21 07:26:04 +00:00
050bf2faf8
convert the rest of this over to use SwitchSection
...
llvm-svn: 24448
2005-11-21 07:16:34 +00:00
024e32e118
Start using the AsmPrinter shared SwitchSection code. This allows the X86
...
backend to implement global variables in sections.
llvm-svn: 24447
2005-11-21 07:11:11 +00:00
b650241f8b
This is now implemented in common codegen code
...
llvm-svn: 24446
2005-11-21 07:06:58 +00:00
2ea5c99eca
Add section switching to common code generator code. Add a couple of
...
asserts.
llvm-svn: 24445
2005-11-21 07:06:27 +00:00
279f96c55e
Add section switching to to common AsmPrinter code.
...
llvm-svn: 24444
2005-11-21 07:05:42 +00:00
2c0b435ba6
Rename SwitchSection -> switchSection to avoid conflicting with a future
...
change.
llvm-svn: 24443
2005-11-21 06:55:27 +00:00
8a4995e42a
Start using PrivateGlobalPrefix correctly
...
llvm-svn: 24442
2005-11-21 06:51:52 +00:00
41cb115afb
set PrivateGlobalPrefix on darwin, use it when printing out CP references
...
llvm-svn: 24441
2005-11-21 06:47:58 +00:00
618981fd03
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
...
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
llvm-svn: 24440
2005-11-21 06:46:22 +00:00
e927c3ff4e
Add a new option.
...
llvm-svn: 24439
2005-11-21 06:41:08 +00:00
6c1ca888d4
Lower READCYCLECOUNTER correctly, preserving the chain result
...
llvm-svn: 24438
2005-11-20 22:57:19 +00:00
44c28c22b7
Legalize MERGE_VALUES, expand READCYCLECOUNTER correctly, so it doesn't
...
break control dependence.
llvm-svn: 24437
2005-11-20 22:56:56 +00:00
2d4ff48cf2
add a new node type
...
llvm-svn: 24436
2005-11-20 22:55:57 +00:00
d1061ac8d1
encode rdtsc correctly
...
llvm-svn: 24435
2005-11-20 22:13:18 +00:00
6df9e11989
use chain operands to ensure the copies don't wander from the rdtsc instruction.
...
llvm-svn: 24434
2005-11-20 22:01:40 +00:00
cde2a174a7
This should not be dce'd
...
llvm-svn: 24433
2005-11-20 21:46:52 +00:00
4db9ae7aa3
oops
...
llvm-svn: 24432
2005-11-20 21:42:49 +00:00
c943f6bfae
check that rdtsc is generated from readcyclecounter
...
llvm-svn: 24431
2005-11-20 21:41:59 +00:00
0bf68ae434
The second patch of X86 support for read cycle counter.
...
llvm-svn: 24430
2005-11-20 21:41:10 +00:00
627cbd49b1
The first patch of X86 support for read cycle counter
...
llvm-svn: 24429
2005-11-20 21:32:07 +00:00
a8d37d748f
more progress towards bug 291 being finished. Patch by Owen Anderson,
...
HAVE_GV case fixed up by me.
llvm-svn: 24428
2005-11-20 03:45:52 +00:00
19baba67b5
Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures
...
from last night.
llvm-svn: 24427
2005-11-19 18:40:42 +00:00
f2807be3da
Initialize this variable on all paths, fixing a crasher in windows. Thanks
...
to JeffC for pointing this out.
llvm-svn: 24426
2005-11-19 07:48:33 +00:00
377bdbff91
Improve Selection DAG printer portability. Patch by Owen Anderson!
...
llvm-svn: 24425
2005-11-19 07:44:09 +00:00
6bc0304c91
Teach tblgen about instruction operands that have multiple MachineInstr
...
operands, digging into them to find register values (used on X86). Patch
by Evan Cheng!
llvm-svn: 24424
2005-11-19 07:05:57 +00:00
d7102c4980
Teach the x86 backend about the register constraints of its addressing mode.
...
Patch by Evan Cheng
llvm-svn: 24423
2005-11-19 07:01:30 +00:00
252d88c68e
Capture more operand info, patch by Evan Cheng
...
llvm-svn: 24422
2005-11-19 07:00:10 +00:00
a22eae0163
Teach the graph viewer to handle register operands that are zero.
...
llvm-svn: 24421
2005-11-19 06:58:46 +00:00
301015a703
Silence a bogus warning
...
llvm-svn: 24420
2005-11-19 05:51:46 +00:00
3f0f71b92b
Add load and other support to the dag-dag isel. Patch contributed by Evan
...
Cheng!
llvm-svn: 24419
2005-11-19 02:11:08 +00:00
f090f7eb0e
Add some method variants, patch by Evan Cheng
...
llvm-svn: 24418
2005-11-19 01:44:53 +00:00
8e28ce9f94
Add two new construction methods, patch by Evan Cheng
...
llvm-svn: 24417
2005-11-19 01:42:10 +00:00
b2e089c31b
Teach LLVM how to scalarize packed types. Currently, this only works on
...
packed types with an element count of 1, although more generic support is
coming. This allows LLVM to turn the following code:
void %foo(<1 x float> * %a) {
entry:
%tmp1 = load <1 x float> * %a;
%tmp2 = add <1 x float> %tmp1, %tmp1
store <1 x float> %tmp2, <1 x float> *%a
ret void
}
Into:
_foo:
lfs f0, 0(r3)
fadds f0, f0, f0
stfs f0, 0(r3)
blr
llvm-svn: 24416
2005-11-19 00:36:38 +00:00
26904c7ac9
testcase for recent indvars patches
...
llvm-svn: 24415
2005-11-18 19:38:15 +00:00
9c37f23645
Fix a crash building 176.gcc due to my recent patch, which only fixed
...
half the problem.
llvm-svn: 24414
2005-11-18 18:30:47 +00:00
6bc51c6f34
prevent latent switch creation
...
llvm-svn: 24413
2005-11-18 13:57:03 +00:00
127321b14c
Split out the shift code from visitBinary.
...
llvm-svn: 24412
2005-11-18 07:42:56 +00:00
3e9e8bd25c
Implement a refinement to the mem2reg algorithm for cases where an alloca
...
has a single def. In this case, look for uses that are dominated by the def
and attempt to rewrite them to directly use the stored value.
This speeds up mem2reg on these values and reduces the number of phi nodes
inserted. This should address PR665.
llvm-svn: 24411
2005-11-18 07:31:42 +00:00
31dc3827d3
This needs proper dominance
...
llvm-svn: 24410
2005-11-18 07:29:44 +00:00
b14c41378d
post-dom-frontiers requires proper post-dominance
...
llvm-svn: 24409
2005-11-18 07:28:26 +00:00
f519d1c6ef
This requires proper dominance
...
llvm-svn: 24408
2005-11-18 07:27:53 +00:00
9705c1b655
Fix the dominates method to return true if the two nodes are the same. Add
...
a new properlyDominates method to do what the old one did.
llvm-svn: 24407
2005-11-18 07:27:33 +00:00
57ce97862d
add more patterns, patch by Evan Cheng.
...
llvm-svn: 24406
2005-11-18 01:04:42 +00:00
227f1bdd2f
Also add the new vector value type here, for completeness.
...
llvm-svn: 24405
2005-11-18 00:53:32 +00:00
3c40f074ff
Teach the type lowering code about turning packed types into vector types.
...
Next step: generating vector dag nodes, and legalizing them into scalar
code.
llvm-svn: 24404
2005-11-17 21:44:42 +00:00
cdde9990b7
only use dyld stubs if not in ppc-static mode. This completes support for
...
non-static codegen.
llvm-svn: 24403
2005-11-17 19:40:30 +00:00
bca0be812d
This was checking the wrong GEP expression. Fixing this fixes a gccas crash
...
compiling mysql reported by Ted Kremenek.
llvm-svn: 24402
2005-11-17 19:35:42 +00:00
6ab87fa360
refactor call operand handling to eliminate special cases from printOp.
...
llvm-svn: 24401
2005-11-17 19:25:59 +00:00
bd9efdb64c
disentangle call operands from branch operands a bit
...
llvm-svn: 24400
2005-11-17 19:16:08 +00:00
3570cf456b
add an option to generate completely non-pic code, corresponding to what
...
gcc -static produces on PPC. This is used for building kexts and other things.
With this, materializing the address of a global looks like:
lis r2, ha16(L_H$non_lazy_ptr)
la r3, lo16(L_H$non_lazy_ptr)(r2)
we're still emitting stubs for functions, which is wrong. That is next.
llvm-svn: 24399
2005-11-17 18:55:48 +00:00
8f8ed28a64
Fix a bug that resistor on IRC hit where we tried to create token factor
...
nodes of load results, not of their chain results.
llvm-svn: 24398
2005-11-17 18:30:17 +00:00
5aba6ae3b3
Enable global address legalization, fixing a todo and allowing the removal
...
of some code. This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner. It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.
llvm-svn: 24397
2005-11-17 18:26:56 +00:00
0fe88e3f32
Teach the selector to fold lo(g) into load instruction immediate fields
...
llvm-svn: 24396
2005-11-17 18:02:16 +00:00
4b11fa284d
Generate LA and ADDIS when possible.
...
llvm-svn: 24395
2005-11-17 17:52:01 +00:00
3648c20472
Use the right accessor to create this node
...
llvm-svn: 24394
2005-11-17 17:51:38 +00:00
a70c7dff2e
Validate that the input to 'Pat' patterns is sane.
...
llvm-svn: 24393
2005-11-17 17:43:52 +00:00
fab12d00c9
Allow users to specify -Wl,-native* multiple times if they please
...
llvm-svn: 24392
2005-11-17 16:08:04 +00:00
2a230e1c1a
teach tblgen to be smart enough to handle tglobaladdr nodes
...
llvm-svn: 24391
2005-11-17 07:39:45 +00:00
595088aa0f
Add an initial hack at legalizing GlobalAddress into the appropriate nodes
...
on Darwin to remove smarts from the isel. This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file. However, we can currently emit stuff like
this: :)
li r2, lo16(L_x$non_lazy_ptr)
lis r3, ha16(L_x$non_lazy_ptr)
lwzx r2, r3, r2
The obvious improvements will follow.
llvm-svn: 24390
2005-11-17 07:30:41 +00:00
840458276c
Add globaladdress and targetglobaladdress nodes for dag patterns
...
llvm-svn: 24389
2005-11-17 07:20:15 +00:00
63ed749ce0
LI could theoretically be used for the lo-part of a global address, just like
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lis can be used for the high part.
llvm-svn: 24388
2005-11-17 07:04:43 +00:00
45ca1c0194
Allow targets to custom legalize leaf nodes like GlobalAddress.
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llvm-svn: 24387
2005-11-17 06:41:44 +00:00
b7025749e1
When lowering direct calls, lower them to use a targetglobaladress directly
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instead of a globaladdress. This has no effect on the generated code at all.
llvm-svn: 24386
2005-11-17 05:56:14 +00:00
4ff65ec745
Teach legalize about targetglobaladdress
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llvm-svn: 24385
2005-11-17 05:52:24 +00:00
2bf458af92
Add patterns for some 16-bit immediate instructions, patch contributed by
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Evan Cheng.
llvm-svn: 24384
2005-11-17 02:01:55 +00:00
b22950df6c
fix a tblgen bug that Evan ran into, where we would lose the '$src' name
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on patterns like "(set R32:$dst, (i32 imm:$src))"
llvm-svn: 24383
2005-11-16 23:14:54 +00:00
5930d3df3d
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
llvm-svn: 24382
2005-11-16 22:59:19 +00:00
59eefd4787
who would have thought you would want to write into globals too
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llvm-svn: 24381
2005-11-16 21:15:53 +00:00
b1ded32f3b
This passes on ppc and x86 now
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llvm-svn: 24378
2005-11-16 07:24:31 +00:00
f2b62f317c
when debugging lower dbg intrinsics to calls
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llvm-svn: 24377
2005-11-16 07:22:30 +00:00
168fe79229
tell selectiondag when we're debugging
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llvm-svn: 24376
2005-11-16 07:21:47 +00:00
672f1bac59
add a flag
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llvm-svn: 24375
2005-11-16 07:21:15 +00:00
fdc8b19ad6
indicate when a tool is a debug build.
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llvm-svn: 24374
2005-11-16 06:36:47 +00:00
4ca13b3f47
Keep Visual Studio building.
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llvm-svn: 24373
2005-11-16 06:10:53 +00:00
6b41edb30f
* Fix DerivedType::dropAllTypeUses to not change the number of types in a
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type when it gets refined. This allows us to hash on this crucial value.
* Fix several issues in TypeMap::RefineAbstractType that prevent it from
handling hash values that change correctly.
* Define hashTypeStructure to not always return 0. :)
This last part (which depends on the first two) speeds up gccld time on eon
from 3.78s to 2.75s with a release build (a 28% speedup!). This resolves
PR474.
llvm-svn: 24372
2005-11-16 06:09:47 +00:00
655e7dfd0d
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
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by Evan Cheng!
llvm-svn: 24371
2005-11-16 01:54:32 +00:00
a171f6b20c
Patch to clean up function call pseudos and support the BLA instruction,
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which branches to an absolute address. This is required to support objc
direct dispatch.
llvm-svn: 24370
2005-11-16 00:48:01 +00:00
67f6f97aed
Keep Visual Studio informed of new files.
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llvm-svn: 24366
2005-11-15 16:11:55 +00:00
3ea1e255f7
remove these labels, there are now bigger jumps in the graph that are unlabeled
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llvm-svn: 24365
2005-11-15 06:44:15 +00:00
e64d41def3
Fix some typos noticed by Gabor Greif!
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llvm-svn: 24364
2005-11-15 06:07:55 +00:00
63985e2892
Make sure to use SwitchSection to switch sections so that we don't accidentally emit
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functions into the .const section. Whoops.
llvm-svn: 24363
2005-11-15 01:45:01 +00:00
7c727b2736
Fix handling of multiple unnamed globals with the same type
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llvm-svn: 24362
2005-11-15 01:32:03 +00:00
76ac068568
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
llvm-svn: 24358
2005-11-15 00:40:23 +00:00
bba9c372c1
Remove extraneous parents around constants when using a constant expr cast.
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llvm-svn: 24357
2005-11-15 00:03:16 +00:00
b720e2c29f
this file moved
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llvm-svn: 24356
2005-11-14 19:32:05 +00:00
1a4adc7aee
Handle globals with explicit alignment requests
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llvm-svn: 24355
2005-11-14 19:00:30 +00:00
dd8eeed096
Teach emitAlignment to handle explicit alignment requests by globals.
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llvm-svn: 24354
2005-11-14 19:00:06 +00:00
0aacd2ab9b
Teach the PPC asmwriter to honor globals with explicit section requests.
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llvm-svn: 24353
2005-11-14 18:52:46 +00:00
16cbc6a177
instead of using mstats, use malloc_zone_statistics which returns numbers
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that actually make sense.
llvm-svn: 24352
2005-11-14 07:27:56 +00:00
8147902625
regenearte
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llvm-svn: 24351
2005-11-14 07:25:50 +00:00
58cee558fe
add malloc_zone_statistics, remove mstats
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llvm-svn: 24350
2005-11-14 07:24:17 +00:00
698fa760f4
Teach -track-memory to work on darwin. Looking at sbrk doesn't work because
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the default allocator uses mmap.
llvm-svn: 24349
2005-11-14 07:00:29 +00:00
973917a3de
regenerate
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llvm-svn: 24348
2005-11-14 06:57:34 +00:00
390ff6e898
add some stuff for mstats on darwin
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llvm-svn: 24347
2005-11-14 06:54:33 +00:00
76034f95f6
add FP select. next up - divide!
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llvm-svn: 24346
2005-11-14 01:17:30 +00:00
0333e68f72
Add some dummy method impls
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llvm-svn: 24345
2005-11-13 03:26:33 +00:00
ee8cd4e66d
Shrink derived types by 8 bytes each by not having to have 2 vtables pointers
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and other MI overhead.
llvm-svn: 24344
2005-11-13 03:26:12 +00:00
06b453b2dc
Move some methods around. Refactor the parts of TypeMap that do not depend
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on its template arguments into a base class so that the code isn't duplicated
5 times.
llvm-svn: 24343
2005-11-13 03:14:09 +00:00
ffacf337b2
Refactor some code, moving methods and data around. This gets rid of some
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virtual methods.
llvm-svn: 24342
2005-11-13 03:13:26 +00:00
d05550a746
typeo
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llvm-svn: 24341
2005-11-13 02:09:55 +00:00
5c28b96304
Split the type refinement case completely out of the type-becomes-concrete
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case, simplifying the code.
llvm-svn: 24340
2005-11-13 01:58:06 +00:00
54c8fcf303
unbreak the build
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llvm-svn: 24339
2005-11-13 01:45:23 +00:00
708bb251d8
Separate the type-became-concrete case from the type-is-resolved case, the
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former of which takes much less work than the later. This speeds up linking
eon from 3.749 to 3.637s with a release build (about 3%).
llvm-svn: 24338
2005-11-13 01:27:50 +00:00
ab72424488
enable LSR by default on alpha
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llvm-svn: 24337
2005-11-12 19:21:08 +00:00
2ba45d1ee9
fix more regressions
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llvm-svn: 24335
2005-11-12 19:06:28 +00:00
56526ec1a9
fix READCYCLECOUNTER
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llvm-svn: 24334
2005-11-12 19:04:09 +00:00
b04c88cf05
this is no apparently passing on alpha
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llvm-svn: 24331
2005-11-12 18:35:13 +00:00
026a5ef177
trivial cleanup
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llvm-svn: 24330
2005-11-12 18:34:09 +00:00
b264c5d4dc
Fix reading LLVM 1.3 bc files.
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llvm-svn: 24329
2005-11-12 18:31:54 +00:00
11ca4d636b
regenerate
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llvm-svn: 24328
2005-11-12 18:22:38 +00:00
bce7ca8a73
refactor grammar to eliminate shift-reduce conflict. Move alignment checking
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code out of all of the clients and into OptAlign/OptCAlign
llvm-svn: 24327
2005-11-12 18:21:21 +00:00
810b501282
Shrink the Type class from 32 to 28 bytes on Darwin (which has silly 32-bit
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bools).
llvm-svn: 24326
2005-11-12 10:07:47 +00:00
47c4c65cb6
remove a dead method
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llvm-svn: 24325
2005-11-12 08:42:30 +00:00
f2794fa073
Unswitch a loop, add more assertions, eliminate use of removeUserFromConcrete.
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llvm-svn: 24324
2005-11-12 08:39:48 +00:00
11edcc19da
Tiny speedup, improve comments and code organization.
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llvm-svn: 24323
2005-11-12 08:22:41 +00:00
7bf26c1d4d
Describe section name encoding
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llvm-svn: 24322
2005-11-12 01:46:21 +00:00
8e1e6117d0
Read and write section info from/to .bc files
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llvm-svn: 24321
2005-11-12 01:33:40 +00:00
045f096b18
Wrap long line.
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llvm-svn: 24320
2005-11-12 01:01:50 +00:00
93b3d8f415
Fix VC++ warning that bools cannot be ORed.
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llvm-svn: 24319
2005-11-12 00:59:39 +00:00
cf1f782a2f
Fix operator precedence bug caught by VC++.
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llvm-svn: 24318
2005-11-12 00:59:01 +00:00
662c8726b8
document sections
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llvm-svn: 24317
2005-11-12 00:45:07 +00:00
a0c20b4f8b
regenerate
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llvm-svn: 24316
2005-11-12 00:11:49 +00:00
9da804d8e9
add a token
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llvm-svn: 24315
2005-11-12 00:11:30 +00:00
71b936cab9
Parse section info
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llvm-svn: 24314
2005-11-12 00:11:10 +00:00
4b96c540f6
print section info
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llvm-svn: 24313
2005-11-12 00:10:19 +00:00
d6f99000e6
new testcase
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llvm-svn: 24310
2005-11-12 00:10:02 +00:00
7e617e36e9
Add support for putting globals in a particular section
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llvm-svn: 24309
2005-11-12 00:09:49 +00:00
97e8207a05
fix yet more regressions
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llvm-svn: 24308
2005-11-11 23:08:46 +00:00
Andrew Lenharth