Commit Graph

339635 Commits

Author SHA1 Message Date
Fangrui Song 2d7a8cf904 [ELF] -r: don't create .interp
`{clang,gcc} -nostdlib -r a.c` passes --dynamic-linker to the linker,
and the expected behavior is to ignore it.

If .interp is kept in the relocatable object file, a final link will get
PT_INTERP even if --dynamic-linker is not specified. glibc ld.so expects
to see PT_DYNAMIC and the executable will likely fail to run.

Ignore --dynamic-linker in -r mode as well as -shared.
2020-01-16 12:14:32 -08:00
StevenWanYu d0b02aecac Address redirect issue on Windows. 2020-01-16 15:07:50 -05:00
Joachim Protze 39f746d8de [OpenMP][Tool] Fix memory leak and double-allocation
Fix the memory leak pointed out in https://reviews.llvm.org/D70412.
And a second one due to double-allocation.

Reviewed by: Hahnfeld

Differential revision: https://reviews.llvm.org/D72779
2020-01-16 10:05:06 -10:00
Eric Fiselier 59919c4d6b [libc++] Fix Windows DLL build for string.
We need to mark string::npos with _LIBCPP_FUNC_VIS on the first
in-class declaration, otherwise it might get ignored
2020-01-16 15:01:12 -05:00
Jonas Devlieghere 5f8e412188 [lldb/test] Exted test for CMTime data formatter
Cover more cases handled by the formatter.
2020-01-16 11:58:34 -08:00
Matt Arsenault f5d98543b8 AMDGPU: Remove outdated comment 2020-01-16 14:54:27 -05:00
StevenWanYu ff1e3cad71 Don't run powerpc lit test case on other platforms.
Only run this test on powerpc tragets, because other platforms might
not have powerpc registered.
2020-01-16 14:37:25 -05:00
Matt Arsenault 8945b23af5 AMDGPU: Update more tests to use modern buffer intrinsics 2020-01-16 14:29:38 -05:00
Matt Arsenault e12b840abf AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG
Clamping the scalar is much better than lowering with superwide shifts
for types > s64.
2020-01-16 14:29:37 -05:00
Matt Arsenault a66d2817ca GlobalISel: Don't ignore requested ext narrowing type
This was assuming the narrow target was the source type. Respect the
requested type when these don't match by using intermediate
merges. This avoids producing very wide, illegal shift expansions.
2020-01-16 14:29:37 -05:00
Matt Arsenault be31a7b7ee GlobalISel: Move extension scalar narrowing to separate function
Also rename a few things. Handling a different requested type will
require this to become much more complex.
2020-01-16 14:29:37 -05:00
Krzysztof Parzyszek 5f65065437 [Hexagon] Update autogeneated intrinsic information in LLVM 2020-01-16 13:11:18 -06:00
Craig Topper 61a89e17df [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation from double rounding. Add a i32->f32 uint_to_fp implementation that avoids this code.
The algorithm here only works if the sint_to_fp doesn't do any
rounding. Otherwise it can round before the offset fixup is
applied. Add an assert to protect this.

To avoid breaking the one test in tree that tested this code
with a set of types that fail the assert, I've enabled i32->f32
to use the i64->f32 algorithm. This only occurs when f64 isn't
a legal type. If f64 is legal then we do i32->f64->f32 instead.

Differential Revision: https://reviews.llvm.org/D72794
2020-01-16 11:08:16 -08:00
Kadir Cetinkaya 0474fe465d
[clangd] Print underlying type for decltypes in hover
Summary: Fixes https://github.com/clangd/clangd/issues/249

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72498
2020-01-16 19:56:54 +01:00
Kadir Cetinkaya a881fcafaa
[clangd] Make define outline code action visible
Summary: This got forgotten during the process.

Reviewers: sammccall, usaxena95

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72840
2020-01-16 19:55:02 +01:00
Matt Arsenault de4f88df97 AMDGPU: Remove IR section from MIR test
Also generate check lines so this isn't just testing the meaningless
block name.
2020-01-16 13:49:44 -05:00
Matt Arsenault d0943537e1 GlobalISel: Apply target MMO flags to atomics
Unify MMO flag handling with SelectionDAG like with loads and stores.
2020-01-16 13:49:43 -05:00
Matt Arsenault 0d0fce42b0 GlobalISel: Preserve load/store metadata in IRTranslator
This was dropping the invariant metadata on dead argument loads, so
they weren't deleted.

Atomics still need to be fixed the same way. Also, apparently store
was never preserving dereferencable which should also be fixed.
2020-01-16 13:49:43 -05:00
Matt Arsenault 03a592f18b TableGen/GlobalISel: Fix srcvalue inputs
Allow using srcvalue for discarding pattern inputs.
2020-01-16 13:49:43 -05:00
Matt Arsenault 86d14ed766 TableGen: Remove dead code 2020-01-16 13:49:43 -05:00
Matt Arsenault 20ca49b646 AMDGPU: Update tests to use modern buffer intrinsics 2020-01-16 13:49:43 -05:00
Adrian Prantl c0d909a1b1 Delete control character from comment. (NFC) 2020-01-16 10:44:07 -08:00
Krzysztof Parzyszek 8ee2d16896 [Hexagon] Add a target feature to disable compound instructions
This affects the following instructions:
Tag: M4_mpyrr_addr     Syntax: Ry32 = add(Ru32,mpyi(Ry32,Rs32))
Tag: M4_mpyri_addr_u2  Syntax: Rd32 = add(Ru32,mpyi(#u6:2,Rs32))
Tag: M4_mpyri_addr     Syntax: Rd32 = add(Ru32,mpyi(Rs32,#u6))
Tag: M4_mpyri_addi     Syntax: Rd32 = add(#u6,mpyi(Rs32,#U6))
Tag: M4_mpyrr_addi     Syntax: Rd32 = add(#u6,mpyi(Rs32,Rt32))
Tag: S4_addaddi        Syntax: Rd32 = add(Rs32,add(Ru32,#s6))
Tag: S4_subaddi        Syntax: Rd32 = add(Rs32,sub(#s6,Ru32))
Tag: S4_or_andix       Syntax: Rx32 = or(Ru32,and(Rx32,#s10))
Tag: S4_andi_asl_ri    Syntax: Rx32 = and(#u8,asl(Rx32,#U5))
Tag: S4_ori_asl_ri     Syntax: Rx32 = or(#u8,asl(Rx32,#U5))
Tag: S4_addi_asl_ri    Syntax: Rx32 = add(#u8,asl(Rx32,#U5))
Tag: S4_subi_asl_ri    Syntax: Rx32 = sub(#u8,asl(Rx32,#U5))
Tag: S4_andi_lsr_ri    Syntax: Rx32 = and(#u8,lsr(Rx32,#U5))
Tag: S4_ori_lsr_ri     Syntax: Rx32 = or(#u8,lsr(Rx32,#U5))
Tag: S4_addi_lsr_ri    Syntax: Rx32 = add(#u8,lsr(Rx32,#U5))
Tag: S4_subi_lsr_ri    Syntax: Rx32 = sub(#u8,lsr(Rx32,#U5))
2020-01-16 12:37:30 -06:00
Fangrui Song 870094decf [ELF] Decrease alignment of ThunkSection on 64-bit targets from 8 to 4
ThunkSection contains 4-byte instructions on all targets that use
thunks. Thunks should not be used in any performance sensitive places,
and locality/cache line/instruction fetching arguments should not apply.

We use 16 bytes as preferred function alignments for modern PowerPC cores.
In any case, 8 is not optimal.

Differential Revision: https://reviews.llvm.org/D72819
2020-01-16 10:36:33 -08:00
Arkady Shlykov c87982b467 Revert "[Loop Peeling] Add possibility to enable peeling on loop nests."
This reverts commit 3f3017e because there's a failure on peel-loop-nests.ll
with LLVM_ENABLE_EXPENSIVE_CHECKS on.

Differential Revision: https://reviews.llvm.org/D70304
2020-01-16 10:33:38 -08:00
Nico Weber d51a15d86a [gn build] (manually) port bed7626f04 2020-01-16 13:19:39 -05:00
Nico Weber 5caa121295 [gn build] include revision information in lld --version output 2020-01-16 13:10:41 -05:00
stevewan bed7626f04 [PowerPC][AIX] Make PIC the default relocation model for AIX
Summary:
The `llc` tool currently defaults to Static relocation model and generates non-relocatable code for 32-bit Power.
This is not desirable on AIX where we always generate Position Independent Code (PIC). This patch makes PIC the default relocation model for AIX.

Reviewers: daltenty, hubert.reinterpretcast, DiggerLin, Xiangling_L, sfertile

Reviewed By: hubert.reinterpretcast

Subscribers: mgorny, wuzish, nemanjai, hiraditya, kbarton, jsji, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72479
2020-01-16 13:07:36 -05:00
Ulrich Weigand cebba7ce39 [SystemZ] Avoid unnecessary conversions in vecintrin.h
Use floating-point instead of integer zero constants to avoid
creating implicit conversions, which currently cause suboptimal
code to be generated with -ffp-exception-behavior=strict.

NFC otherwise.
2020-01-16 18:58:14 +01:00
Pavel Labath ee05138515 [lldb/test] Revert changes to debug-names-compressed.cpp
With the changes in 15a6df52ef, the test is failing in some
configurations. Reverting while I investigate
2020-01-16 18:56:26 +01:00
Nico Weber 81c67da0f2 remove an include that's unused after r347592 2020-01-16 12:49:54 -05:00
Derek Schuff d34e4152e3 [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to unix line endings 2020-01-16 09:38:37 -08:00
Paolo Severini 9b3254dbf9 [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging
Add plugin class SymbolVendorWasm, with the logic to manage debug symbols
for Wasm modules.

Reviewers: clayborg, labath, aprantl, sbc100, teemperor

Reviewed By: labath

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D72650
2020-01-16 09:36:17 -08:00
Fedor Sergeev 3478551bf3 [GVN] introduce GVNOptions to control GVN pass behavior
There are a few global (cl::opt) controls that enable optional
behavior in GVN. Introduce GVNOptions that provide corresponding
per-pass instance controls.

That will allow to use GVN multiple times in pipeline each time
with different settings.

Reviewers: asbirlea, rnk, reames, skatkov, fhahn
Reviewed By: fhahn

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72732
2020-01-16 20:21:08 +03:00
Jonas Devlieghere 26646761e2 [lldb/Scripts] Remove swig_bot_lib/__init__.py 2020-01-16 09:15:41 -08:00
Mircea Trofin 7acfda633f [llvm] Make new pass manager's OptimizationLevel a class
Summary:
The old pass manager separated speed optimization and size optimization
levels into two unsigned values. Coallescing both in an enum in the new
pass manager may lead to unintentional casts and comparisons.

In particular, taking a look at how the loop unroll passes were constructed
previously, the Os/Oz are now (==new pass manager) treated just like O3,
likely unintentionally.

This change disallows raw comparisons between optimization levels, to
avoid such unintended effects. As an effect, the O{s|z} behavior changes
for loop unrolling and loop unroll and jam, matching O2 rather than O3.

The change also parameterizes the threshold values used for loop
unrolling, primarily to aid testing.

Reviewers: tejohnson, davidxl

Reviewed By: tejohnson

Subscribers: zzheng, ychen, mehdi_amini, hiraditya, steven_wu, dexonsmith, dang, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D72547
2020-01-16 09:00:56 -08:00
LLVM GN Syncbot c29a9f64b7 [gn build] Port 6b35786649 2020-01-16 16:56:26 +00:00
Krzysztof Parzyszek bc413da086 [Hexagon] Fix alignment info for __builtin_circ_lduh 2020-01-16 10:54:45 -06:00
Miloš Stojanović 6b35786649 [llvm-exegesis][mips] Add RegisterAliasingTest unit test
Differential Revision: https://reviews.llvm.org/D72004
2020-01-16 17:50:45 +01:00
Miloš Stojanović 31458a9fee [llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class.
Differential Revision: https://reviews.llvm.org/D72003
2020-01-16 17:50:44 +01:00
Matt Arsenault 4ca1ad85b7 AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic 2020-01-16 11:31:12 -05:00
Hubert Tong 1794158f90 [MC][test] Fix non-portable GNU diff option
Summary: This patch replaces the non-portable GNU diff option `--strip-trailing-cr` with the POSIX `-b` option in two test files.

Reviewers: daltenty, jasonliu

Reviewed By: daltenty

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72745
2020-01-16 11:29:24 -05:00
Raphael Isemann 81eaa3ddd0 [lldb][NFC] Delete TestDataFormatterObjCNSDate.py
This test is just TestDataFormatterObjCNSData.py copied but without any changes
(and it therefore doesn't even test NSDate).

It's also failing as NSData has been changed by me in
4f244bba4f.
2020-01-16 17:28:07 +01:00
Matt Arsenault 9b2f3532c7 AMDGPU/GlobalISel: Select DS GWS intrinsics 2020-01-16 11:25:10 -05:00
Krzysztof Parzyszek 7f5f6ff547 [Hexagon] Add preprocessor test for hexagonv66 2020-01-16 10:18:58 -06:00
Jay Foad 885260d5d8 [GlobalISel] Don't arbitrarily limit a mask to 64 bits
Reviewers: arsenm

Subscribers: wdng, rovka, hiraditya, volkan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72853
2020-01-16 16:13:20 +00:00
Jay Foad 63f73545dd [GlobalISel] Pass MachineOperands into MachineIRBuilder helper methods
Reviewers: arsenm, aditya_nandakumar, aemerson

Subscribers: wdng, rovka, hiraditya, volkan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72849
2020-01-16 16:04:21 +00:00
Nico Weber fb9413cb84 Remove some SVN-specific code.
$URL$ is an SVN keyword substitution enabled via
`svn propset svn:keywords "URL" tools/clang/lib/Basic/Version.cpp`.
Now that we no longer use SVN, it's no longer being replaced by
anything, and we no longer offer svn exports. So remove the
$URL$-specific logic.

The "cfe" path prefix removal also no longer makes sense now that
we're on git: Both CLANG_REPOSITORY and LLVM_REPOSITORY are usually
set to https://github.com/llvm/llvm-project.git

So remove that too, and remove the "llvm" prefix removal for symmetry.
With the github url, "llvm" _is_ found in the string, but not in
the place the function expected. Nobody noticed since the llvm
repository path is only used if CLANG_REVISION and LLVM_REVISION are
different, which in the git monorepo world they never should be.
(I might remove the "// Support LLVM in a separate repository"
block in a separate commit.)

Differential Revision: https://reviews.llvm.org/D72848
2020-01-16 11:02:52 -05:00
Krzysztof Parzyszek 237fd94312 [Hexagon] Remove unnecessary case in StringSwitch, NFC 2020-01-16 10:00:57 -06:00
Sam Parker 760b175109 [ARM][LowOverheadLoops] Update liveness info
Recommitting e93e0d413f after reverting due to test failures, which
will hopefully now be fixed. Original commit message:

After expanding the pseudo instructions, update the liveness info.
We do this in a post-order traversal of the loop, including its
exit blocks and preheader(s).

Differential Revision: https://reviews.llvm.org/D72131
2020-01-16 15:44:25 +00:00