Commit Graph

14185 Commits

Author SHA1 Message Date
Owen Anderson f02d98d7c0 Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.
llvm-svn: 138739
2011-08-29 17:17:09 +00:00
Duncan Sands 4d63542b82 Fix PR5329: pay attention to constructor/destructor priority
when outputting them.  With this, the entire LLVM testsuite
passes when built with dragonegg.

llvm-svn: 138724
2011-08-28 13:17:22 +00:00
Nadav Rotem 52600ee8c3 Bitcasts are transitive. Bitcast-Bitcast-X becomes Bitcast-X.
llvm-svn: 138722
2011-08-28 11:51:08 +00:00
Andrew Trick d22f9b395b Reverted r138652, valgrind doesn't understand obj:*/tblgen.
llvm-svn: 138703
2011-08-27 06:17:30 +00:00
Bill Wendling ba198e661e Auto upgrade the old EH scheme to use the new one. This is on a trial basis. If
things to disasterously over night, this can be reverted.

llvm-svn: 138702
2011-08-27 06:11:03 +00:00
Bill Wendling 2f92d2cdae Update to new EH scheme.
llvm-svn: 138699
2011-08-27 04:53:41 +00:00
Bill Wendling 46c720994a Cannot have an llvm.eh.exception call in a non-landing pad block.
llvm-svn: 138698
2011-08-27 04:53:28 +00:00
Andrew Trick 4f3cb540a6 Excluding ARM JIT tests until someone can fix this compilation path.
llvm-svn: 138676
2011-08-26 23:39:30 +00:00
Owen Anderson b205c029a4 Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.
llvm-svn: 138675
2011-08-26 23:32:08 +00:00
Owen Anderson 6c70e58041 Correct encoding of BL with immediate offset.
llvm-svn: 138673
2011-08-26 22:54:51 +00:00
Eli Friedman 5e5704277f Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.
llvm-svn: 138660
2011-08-26 21:21:21 +00:00
Bill Wendling ac88ab7cce Revert r138606 until LowerInvoke has been converted to the new EH scheme.
llvm-svn: 138656
2011-08-26 21:11:23 +00:00
Owen Anderson 16d33f36d5 invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.
llvm-svn: 138653
2011-08-26 20:43:14 +00:00
Andrew Trick 28dc5abd05 valgrind: Always suppress tblgen leaks.
I'll clean up the rest of the XFAIL: vg_leak lines if this works.

llvm-svn: 138652
2011-08-26 20:41:20 +00:00
Bill Wendling eed1e8905a Don't sink landingpad instructions during ind-var simplification.
llvm-svn: 138651
2011-08-26 20:40:15 +00:00
Andrew Trick 07aeb629ec Use %% for literals in RUN lines.
llvm-svn: 138647
2011-08-26 20:09:48 +00:00
Owen Anderson a01bcbfc80 Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
llvm-svn: 138635
2011-08-26 18:09:22 +00:00
Benjamin Kramer 6eb9666bb8 We don't care if TableGen leaks memory.
llvm-svn: 138634
2011-08-26 17:00:30 +00:00
Owen Anderson f3b6507e26 Add a testcase for r138625.
llvm-svn: 138626
2011-08-26 06:45:08 +00:00
Craig Topper c66d50d1a2 Fix disassembling of VCVTSD2SI
llvm-svn: 138623
2011-08-26 04:49:29 +00:00
Eli Friedman 452aae6202 Atomic load/store on ARM/Thumb.
I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.

I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.

llvm-svn: 138621
2011-08-26 02:59:24 +00:00
Benjamin Kramer fb212a6309 SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between.
In theory this could be extended to other instructions, eg. division by zero, but it's likely that it will "miscompile" some code because people depend on div by zero not trapping. NULL pointer dereference usually leads to a crash so we should be on the safe side.

This shrinks the size of a Release clang by 16k on x86_64.

llvm-svn: 138618
2011-08-26 01:22:29 +00:00
Bill Wendling 62fe9e9aa6 Update to the new EH scheme.
llvm-svn: 138606
2011-08-25 23:48:37 +00:00
Bruno Cardoso Lopes 8347b86293 Add support for AVX 256-bit version of MOVDDUP!
llvm-svn: 138588
2011-08-25 21:40:37 +00:00
Owen Anderson 5e30972cff Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed.
llvm-svn: 138575
2011-08-25 18:30:18 +00:00
Andrew Trick 6446bf780a ARM fix for missing implicit operands on ldmia_ret.
rdar://10005094: miscompile of 176.gcc

llvm-svn: 138568
2011-08-25 17:50:53 +00:00
Craig Topper 76e3e0b554 Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.
llvm-svn: 138552
2011-08-25 07:42:00 +00:00
Craig Topper e1541838f9 Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723.
llvm-svn: 138551
2011-08-25 06:57:46 +00:00
Bill Wendling 3fb137f7ef LSR wants to split the landing pad's critical edge. Let it do it, but use the
proper function to do it.

llvm-svn: 138550
2011-08-25 05:55:40 +00:00
Bruno Cardoso Lopes 296256fb32 Add support for 256-bit versions of VSHUFPD and VSHUFPS.
llvm-svn: 138546
2011-08-25 02:58:26 +00:00
Bill Wendling ff2091737e Update tests to the newest EH syntax.
llvm-svn: 138541
2011-08-25 01:30:18 +00:00
Bill Wendling b37db20e40 Add feature test for the new exception handling stuff.
llvm-svn: 138539
2011-08-25 01:19:13 +00:00
Eli Friedman 9c73a57b20 Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually.
llvm-svn: 138505
2011-08-24 22:33:28 +00:00
Evan Cheng eee864520c Some autoconf tests use module level inline asm to test compiler's handling of
.cfi_startproc. e.g. libffi:

 $ cat confopt.c 
asm (".cfi_startproc\n\t.cfi_endproc");

int main () { return 0; }

Teach MC / dwarf emission to handle these cfi directives which essentially
create an empty frame.

rdar://10017184

llvm-svn: 138504
2011-08-24 22:31:37 +00:00
Jim Grosbach b2a2c031b8 Update tests for 138501.
llvm-svn: 138502
2011-08-24 22:30:18 +00:00
Jim Grosbach 4b701af908 Thumb parsing and encoding for SUB (SP minu immediate).
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

llvm-svn: 138494
2011-08-24 21:42:27 +00:00
Jim Grosbach 0a0b3071df Thumb parsing and encoding support for ADD SP instructions.
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.

llvm-svn: 138488
2011-08-24 21:22:15 +00:00
Eli Friedman 5aabaaa367 Basic tests for atomic load and store on x86.
llvm-svn: 138486
2011-08-24 21:16:59 +00:00
Nadav Rotem 365af6f17b Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api.
llvm-svn: 138469
2011-08-24 20:18:38 +00:00
Owen Anderson 16fd0d96f2 Port over more encoding tests to decoding tests.
llvm-svn: 138441
2011-08-24 17:08:34 +00:00
Richard Osborne 6e3c83eb1c Add Uses=[SP] to call instructions. This fixes a miscompilation with a
variable sized alloca.

llvm-svn: 138433
2011-08-24 13:32:43 +00:00
Craig Topper de92622aa5 Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711.
llvm-svn: 138427
2011-08-24 06:14:18 +00:00
Bruno Cardoso Lopes 9e9f2ce32d Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit
permutations. Also tidy up some patterns and make them close to their
instruction definition!

llvm-svn: 138392
2011-08-23 22:06:37 +00:00
Eric Christopher 7bc78f692c Revert "Address Duncan's CR request:"
This reverts commit 20a05be15ea5271ab6185b83200fa88263362400. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

llvm-svn: 138366
2011-08-23 20:11:10 +00:00
Jim Grosbach 37563cd545 Thumb parsing and encoding for WFE, WFI and YIELD.
llvm-svn: 138364
2011-08-23 20:02:30 +00:00
Jim Grosbach ad9e8655ee Thumb parsing and encoding for UXTB and UXTH.
llvm-svn: 138363
2011-08-23 19:59:32 +00:00
Jim Grosbach 5e4ea175f6 Thumb parsing and encoding for TST.
llvm-svn: 138362
2011-08-23 19:53:17 +00:00
Jim Grosbach bb07e73e0d Thumb parsing and encoding for SXTB and SXTH.
llvm-svn: 138361
2011-08-23 19:51:42 +00:00
Jim Grosbach 5cc338da67 Thumb parsing and encoding for SVC.
llvm-svn: 138360
2011-08-23 19:49:10 +00:00
Jim Grosbach d88404fbaa Thumb parsing and encoding for SUB.
llvm-svn: 138359
2011-08-23 19:45:45 +00:00
Nick Lewycky 4c8ff77f1b PerformSubCombine to work on integers larger than i128. Fixes a crasher.
llvm-svn: 138354
2011-08-23 19:01:24 +00:00
Jim Grosbach f1ca6a6df6 Thumb parsing and encoding for STRH.
llvm-svn: 138352
2011-08-23 18:56:20 +00:00
Jim Grosbach 635aa69a91 Thumb parsing and encoding for STRB.
llvm-svn: 138349
2011-08-23 18:43:06 +00:00
Jim Grosbach 505be75900 Thumb parsing and encoding for tSTRspi.
llvm-svn: 138348
2011-08-23 18:39:41 +00:00
Jim Grosbach 6e546e0725 Thumb parsing and encoding for STR.
Not including tSTRspi.

llvm-svn: 138347
2011-08-23 18:33:38 +00:00
Jim Grosbach d80d169a04 Thumb parsing and encoding for STM.
llvm-svn: 138345
2011-08-23 18:15:37 +00:00
Nadav Rotem 7d3effa389 Fix a typo in the test from the previous commit.
llvm-svn: 138342
2011-08-23 17:56:54 +00:00
Owen Anderson 924bcfc92f Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far.
llvm-svn: 138341
2011-08-23 17:51:38 +00:00
Nadav Rotem c78e6607b5 Address Duncan's CR request:
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector

llvm-svn: 138340
2011-08-23 17:48:43 +00:00
Owen Anderson 041dba6dec Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing.
llvm-svn: 138337
2011-08-23 17:37:32 +00:00
Owen Anderson dcea63236e Port more assemble tests over to disassembly tests.
llvm-svn: 138336
2011-08-23 17:26:35 +00:00
Craig Topper 6612e35b0d Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712.
llvm-svn: 138321
2011-08-23 04:36:33 +00:00
Bruno Cardoso Lopes 2a3ffb5d97 Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

llvm-svn: 138317
2011-08-23 01:14:17 +00:00
Jim Grosbach cc9d792ec1 Thumb parsing and encoding for SETEND.
llvm-svn: 138312
2011-08-22 23:58:02 +00:00
Jim Grosbach 3636be3c8f Thumb parsing and encoding for SBC.
llvm-svn: 138311
2011-08-22 23:55:58 +00:00
Jim Grosbach c3c32d9e09 Thumb parsing and encoding for RSB.
llvm-svn: 138308
2011-08-22 23:47:13 +00:00
Jim Grosbach 73661b8a37 Thumb parsing and encoding for ROR.
llvm-svn: 138304
2011-08-22 23:40:51 +00:00
Jim Grosbach a9d88df987 Thumb parsing and encoding for REV/REV16/REVSH.
llvm-svn: 138303
2011-08-22 23:39:25 +00:00
Owen Anderson 1346d79b4b t2SMLAD is a four-register instruction, not a three-register one.
llvm-svn: 138301
2011-08-22 23:31:45 +00:00
Owen Anderson f94b7b7d57 Correct operand naming of t2USAT16 to allow proper decoding.
llvm-svn: 138300
2011-08-22 23:27:47 +00:00
Owen Anderson 5e9989a920 Match operand naming to allow correct decoding of t2LDRSH_POST.
llvm-svn: 138298
2011-08-22 23:22:05 +00:00
Jim Grosbach 38c59fcb08 Improve error checking for tPUSH and tPOP register lists.
llvm-svn: 138295
2011-08-22 23:17:34 +00:00
Jim Grosbach 096423b6be Tidy up. Trailing whitespace.
llvm-svn: 138293
2011-08-22 23:13:54 +00:00
Owen Anderson a743409ec8 Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing.
llvm-svn: 138292
2011-08-22 23:10:16 +00:00
Jim Grosbach 40da063178 Thumb parsing and encoding for PUSH.
llvm-svn: 138290
2011-08-22 23:05:11 +00:00
Jim Grosbach 5507203262 Fix think-o.
llvm-svn: 138288
2011-08-22 23:04:26 +00:00
Jim Grosbach 139acd21e6 Thumb assemmbly parsing diagnostic improvements for LDM.
llvm-svn: 138287
2011-08-22 23:01:07 +00:00
Jim Grosbach 0869b900cc Thumb assembly parsing and encoding for POP.
llvm-svn: 138286
2011-08-22 23:00:19 +00:00
Owen Anderson 061738a680 Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing.
llvm-svn: 138273
2011-08-22 21:34:00 +00:00
Bruno Cardoso Lopes 74f090d44c Add support for breaking 256-bit int VETCC into two 128-bit ones,
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

llvm-svn: 138271
2011-08-22 20:31:04 +00:00
Owen Anderson df698b032c Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing.
llvm-svn: 138269
2011-08-22 20:27:12 +00:00
Owen Anderson 721c3704da Fix another batch of VLD/VST decoding crashes discovered by randomized testing.
llvm-svn: 138255
2011-08-22 18:42:13 +00:00
Owen Anderson ac92e77bb8 Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing.
llvm-svn: 138251
2011-08-22 18:22:06 +00:00
Owen Anderson fe29fe431d Port another swathe of Thumb1 encoding tests over to decoding tests.
llvm-svn: 138250
2011-08-22 18:05:49 +00:00
Owen Anderson b49813206b Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add more tests.
llvm-svn: 138246
2011-08-22 17:56:58 +00:00
Jim Grosbach aa42847164 Thumb assembly parsing and encoding for ORR.
llvm-svn: 138245
2011-08-22 17:41:44 +00:00
Dan Gohman 56e1cef705 Constant pointers to objects don't need reference counting.
llvm-svn: 138242
2011-08-22 17:29:11 +00:00
Dan Gohman bce94fded8 Make a few tests slightly more strict.
llvm-svn: 138241
2011-08-22 17:27:02 +00:00
Duncan Sands b40654e21d Testcase for PR10663.
llvm-svn: 138231
2011-08-22 10:32:09 +00:00
Jim Grosbach bd16424f91 Fix AsmParser binary precedence for shift operators.
rdar://9976729

llvm-svn: 138208
2011-08-20 16:24:13 +00:00
Jim Grosbach 3322f02a03 Tidy up. Whitespace.
llvm-svn: 138207
2011-08-20 16:10:09 +00:00
Nadav Rotem ad4a70ad3e Add constant folding support for bitcasts of splat vectors to integers.
llvm-svn: 138206
2011-08-20 14:02:29 +00:00
Eric Christopher 6582dfa7c5 Remove remainder of migrated or obsolete tests from FrontendC and remove
the empty directory.

llvm-svn: 138181
2011-08-20 01:04:56 +00:00
Eric Christopher c19fd6eadc Remove migrated or obsolete tests.
llvm-svn: 138176
2011-08-20 00:49:30 +00:00
Eric Christopher 1efe3d9663 Remove obsolete or migrated tests.
llvm-svn: 138173
2011-08-20 00:38:20 +00:00
Chad Rosier d6641af80c With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads."
-verify-machineinstrs can be enabled for this test case.

llvm-svn: 138171
2011-08-20 00:34:45 +00:00
Eric Christopher c2528a529a Remove obsoleted test.
llvm-svn: 138170
2011-08-20 00:26:30 +00:00
Eric Christopher a1124b45d2 Remove tests that were either migrated to clang or are obsolete.
llvm-svn: 138168
2011-08-20 00:25:42 +00:00
Eric Christopher 2f53dc2e05 Remove the rest of the files in FrontendC++ and the directory itself.
All tests have been updated and migrated into clang or were obsolete.

llvm-svn: 138165
2011-08-20 00:17:58 +00:00
Chad Rosier be7625161e VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg.
Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.

llvm-svn: 138163
2011-08-20 00:17:25 +00:00
Eric Christopher 74cfab0fbe Remove migrated or obsolete tests.
llvm-svn: 138156
2011-08-20 00:08:36 +00:00
Eric Christopher a0b6bc5739 Remove migrated or obsolete tests.
llvm-svn: 138149
2011-08-19 23:41:50 +00:00
Devang Patel 59e27c5f12 Do not use named md nodes to track variables that are completely optimized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly.
llvm-svn: 138145
2011-08-19 23:28:12 +00:00
Jim Grosbach 2597722e07 Thumb parsing and encoding support for NOP.
The irony is not lost that this is not a completely trivial patchset.

llvm-svn: 138143
2011-08-19 23:24:36 +00:00
Eric Christopher 67edb5ef36 Remove obsolete test.
llvm-svn: 138141
2011-08-19 23:18:12 +00:00
Eric Christopher 2c16fef036 Remove migrated test.
llvm-svn: 138140
2011-08-19 23:18:10 +00:00
Jim Grosbach 8d77bb5f06 Use regex to remove false dependencies on register allocation.
llvm-svn: 138137
2011-08-19 23:10:31 +00:00
Eric Christopher 48f1599b03 Remove obsolete or migrated tests.
llvm-svn: 138135
2011-08-19 23:08:41 +00:00
Jim Grosbach 37aa348195 Thumb assembly parsing and encoding for NEG.
llvm-svn: 138131
2011-08-19 22:51:03 +00:00
Jim Grosbach 459422d750 Be more lenient on tied operand matching for MUL.
llvm-svn: 138124
2011-08-19 22:30:46 +00:00
Bruno Cardoso Lopes d126347f32 Re-write part of VEX encoding logic, to be more easy to read! Also fix
a bug and add a testcase!

llvm-svn: 138123
2011-08-19 22:27:29 +00:00
Eric Christopher 43d15b98d2 Remove tests migrated to clang.
llvm-svn: 138121
2011-08-19 22:26:09 +00:00
Eric Christopher 1e1cbc5f65 Remove previously migrated test.
llvm-svn: 138120
2011-08-19 22:26:06 +00:00
Jim Grosbach 066e9ec1e4 Update tests.
llvm-svn: 138116
2011-08-19 22:19:48 +00:00
Eric Christopher 58ce352d32 Remove tests migrated to clang or are unnecessary.
llvm-svn: 138115
2011-08-19 22:17:09 +00:00
Jim Grosbach fd4de3aeff Thumb assembly parsing and encoding for MVN.
llvm-svn: 138109
2011-08-19 22:09:23 +00:00
Jim Grosbach 8e048495c8 Thumb assembly parsing and encoding for MUL.
llvm-svn: 138108
2011-08-19 22:07:46 +00:00
Eric Christopher 029529369b Remove this test. The feature and test have already been migrated to clang.
llvm-svn: 138101
2011-08-19 21:51:41 +00:00
Eric Christopher 772aa6c82e Remove tests migrated to clang.
llvm-svn: 138100
2011-08-19 21:51:39 +00:00
Eric Christopher 981c15ef76 Remove 2009-09-04-modify-crash.cpp as clang doesn't support 32-bit kext.
llvm-svn: 138087
2011-08-19 21:21:28 +00:00
Eric Christopher 05927b0c90 Remove migrated tests.
llvm-svn: 138086
2011-08-19 21:21:26 +00:00
Eric Christopher e8ad105202 Remove migrated test.
llvm-svn: 138085
2011-08-19 21:21:24 +00:00
Eric Christopher 526162d18e Remove this test. There are other, duplicates, in the clang test suite.
llvm-svn: 138084
2011-08-19 21:21:21 +00:00
Eric Christopher 8af4e41734 Add file.
llvm-svn: 138083
2011-08-19 21:21:20 +00:00
Eric Christopher 810ed3a7c3 Move 2010-03-22-empty-baseclass.cpp from a frontend+opt test to just
an opt test.

llvm-svn: 138082
2011-08-19 21:21:14 +00:00
Jim Grosbach d07e104844 Add FIXME.
llvm-svn: 138077
2011-08-19 20:48:54 +00:00
Jim Grosbach f86cd37bef Thumb assembly parsing and encoding for MOV.
llvm-svn: 138076
2011-08-19 20:46:54 +00:00
Jim Grosbach 1eb6eb0955 Thumb assembly parsing and encoding for LSR.
llvm-svn: 138065
2011-08-19 19:34:22 +00:00
Jim Grosbach 3245520ade Thumb assembly parsing and encoding for LSL(register).
llvm-svn: 138064
2011-08-19 19:30:58 +00:00
Jim Grosbach 5503c3a4e8 Thumb assembly parsing and encoding for LSL(immediate).
llvm-svn: 138063
2011-08-19 19:29:25 +00:00
Jim Grosbach 7c4739da3c Thumb assembly parsing and encoding for LDRSB and LDRSH.
llvm-svn: 138061
2011-08-19 19:17:58 +00:00
Jim Grosbach 26d3587bd8 Thumb assembly parsing and encoding for LDRH.
llvm-svn: 138060
2011-08-19 18:55:51 +00:00
Jim Grosbach a32c753ebf Thumb assembly parsing and encoding for LDRB.
llvm-svn: 138059
2011-08-19 18:49:59 +00:00
Jim Grosbach 106281f329 Thumb assembly parsing and encoding for LDR(register).
llvm-svn: 138056
2011-08-19 18:35:06 +00:00
Jim Grosbach 181d2f92b5 Thumb assembly parsing and encoding for LDR(literal).
llvm-svn: 138052
2011-08-19 18:20:48 +00:00
Jim Grosbach 23983d6bd9 Thumb assembly parsing and encoding for LDR(immediate) form T2.
llvm-svn: 138050
2011-08-19 18:13:48 +00:00
Jim Grosbach 3fe94e3ef8 Thumb assembly parsing and encoding for LDR(immediate) form T1.
llvm-svn: 138047
2011-08-19 17:55:24 +00:00
Craig Topper ba6c2a52c7 Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler
llvm-svn: 138034
2011-08-19 05:28:50 +00:00
Jakob Stoklund Olesen 90b6018c8f Add test case for r138018.
llvm-svn: 138033
2011-08-19 04:30:24 +00:00
Bruno Cardoso Lopes 22241acc29 Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the
implementation!

llvm-svn: 138029
2011-08-19 02:23:56 +00:00
Dan Gohman b38940135b Track a retain+release nesting level independently of the
known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.

llvm-svn: 138016
2011-08-19 00:26:36 +00:00
Akira Hatanaka fb4161ae88 Use subword loads instead of a 4-byte load when the size of a structure (or a
piece of it) that is being passed by value is smaller than a word.

llvm-svn: 138007
2011-08-18 23:39:37 +00:00
Owen Anderson 96b7ad2e17 STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.

llvm-svn: 138003
2011-08-18 22:47:44 +00:00
Owen Anderson 192a760b54 Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset.
llvm-svn: 138000
2011-08-18 22:31:17 +00:00
Owen Anderson 67d6f11974 Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
Fixes a large class of disassembler crashes found by randomized testing.

llvm-svn: 137995
2011-08-18 22:11:02 +00:00
Ivan Krasin d7cbd4c518 FastISel: avoid function calls between the materialization of the constant and its use.
llvm-svn: 137993
2011-08-18 22:06:10 +00:00
Jim Grosbach 90103ccc05 Thumb assembly parsing and encoding for LDM instruction.
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

llvm-svn: 137986
2011-08-18 21:50:53 +00:00
Owen Anderson 627021d7c0 More Thumb1 decoding tests.
llvm-svn: 137974
2011-08-18 20:05:06 +00:00
Devang Patel 0071f8a48e Add another test.
llvm-svn: 137969
2011-08-18 18:50:25 +00:00
Devang Patel f907e78b78 Add test to check type uniquing.
llvm-svn: 137968
2011-08-18 18:40:49 +00:00
Jim Grosbach 6cb336cb09 Thumb assembly parsing and encoding for EOR.
llvm-svn: 137964
2011-08-18 18:10:38 +00:00
Jim Grosbach 4f240a1fd5 Thumb assembly parsing and encoding for CMP.
llvm-svn: 137963
2011-08-18 18:08:29 +00:00
James Molloy 9f9371ccb3 Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed.
llvm-svn: 137960
2011-08-18 18:03:02 +00:00
Jim Grosbach 47bf39d921 Thumb assembly parsing and encoding test for CMN.
llvm-svn: 137957
2011-08-18 17:55:03 +00:00
Owen Anderson ec3884c50a Port over BL/BLX to disassembly tests.
llvm-svn: 137954
2011-08-18 17:43:52 +00:00
Jim Grosbach 0081879ee7 ARM assembly parsing and encoding test for BX/BLX (register).
llvm-svn: 137949
2011-08-18 17:02:28 +00:00
Jim Grosbach 8b7158e557 ARM assembly parsing and encoding test for BL/BLX (immediate).
llvm-svn: 137948
2011-08-18 17:00:09 +00:00
Richard Osborne 56f3b70225 Add intrinsics for SETEV, GETED, GETET.
llvm-svn: 137938
2011-08-18 13:00:48 +00:00
Bruno Cardoso Lopes 3c7d6eb64c Cleanup vector logical ops in AVX and add use int versions for simple
v2i64

llvm-svn: 137919
2011-08-18 02:11:34 +00:00
Owen Anderson a90896397b Port new Thumb1 encoding tests over to decoding tests.
llvm-svn: 137902
2011-08-17 23:37:33 +00:00
Jim Grosbach 1b43828958 ARM assembly parsing and encoding test for BKPT.
llvm-svn: 137898
2011-08-17 23:11:13 +00:00
Jim Grosbach e3bdcd0ea8 ARM assembly parsing and encoding test for BIC.
llvm-svn: 137895
2011-08-17 23:00:53 +00:00
Jim Grosbach cbd4ab104b Thumb assembly parsing and encoding for B.
llvm-svn: 137891
2011-08-17 22:57:40 +00:00
Jim Grosbach d3e8e29124 Thumb assembly parsing and encoding for ASR.
llvm-svn: 137889
2011-08-17 22:49:09 +00:00
Eli Friedman 9a468153e1 Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt).
llvm-svn: 137888
2011-08-17 22:22:24 +00:00
Bruno Cardoso Lopes 1a87fcb9ba Fix PR10688. Add support for spliting 256-bit vector shifts when the
shift amount is variable

llvm-svn: 137885
2011-08-17 22:12:20 +00:00
Jim Grosbach e2a0404a69 Thumb assembly parsing and encoding for ADR.
llvm-svn: 137864
2011-08-17 20:37:40 +00:00
Jim Grosbach e2d152016f Add a couple of FIXMEs.
llvm-svn: 137861
2011-08-17 20:35:57 +00:00
Devang Patel 35ea5cfd46 Fix test case.
llvm-svn: 137847
2011-08-17 18:48:28 +00:00
Devang Patel ae2848ed69 Remove superficial test.
llvm-svn: 137846
2011-08-17 18:39:13 +00:00
Devang Patel 3fee10b7d2 Robustify test.
llvm-svn: 137845
2011-08-17 18:38:44 +00:00
Owen Anderson d40d838cc4 Start building a Thumb1 decoding test file based on the Thumb1 parsing/encoding test file.
llvm-svn: 137840
2011-08-17 18:21:36 +00:00
Eli Friedman d7749be2d7 Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive
with unknown instructions.

Fixes PR10687.

llvm-svn: 137836
2011-08-17 18:10:43 +00:00
Jim Grosbach 80636b48c0 Thumb assembly parsing and encoding for ADC(register) instruction.
llvm-svn: 137833
2011-08-17 17:55:28 +00:00
Jim Grosbach a806eebe13 Add missing '@' delimiter.
llvm-svn: 137832
2011-08-17 17:46:01 +00:00
Owen Anderson a4043c4b32 Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
Patch by James Molloy.

llvm-svn: 137830
2011-08-17 17:44:15 +00:00
Bruno Cardoso Lopes be5e987379 Introduce matching patterns for vbroadcast AVX instruction. The idea is to
match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.

llvm-svn: 137810
2011-08-17 02:29:19 +00:00
Bruno Cardoso Lopes 3400825b41 Update test to not use the scalar type to splat from a load
llvm-svn: 137809
2011-08-17 02:29:15 +00:00
Bruno Cardoso Lopes ed786a346e Now that we have a canonical way to handle 256-bit splats:
vinsertf128 $1 + vpermilps $0, remove the old code that used to first
do the splat in a 128-bit vector and then insert it into a larger one.
This is better because the handling code gets simpler and also makes a
better room for the upcoming vbroadcast!

llvm-svn: 137807
2011-08-17 02:29:10 +00:00
Akira Hatanaka 5360f88355 Add support for ext and ins.
llvm-svn: 137804
2011-08-17 02:05:42 +00:00
Jim Grosbach e9ab47a72a Thumb ADD(immediate) parsing support.
llvm-svn: 137788
2011-08-16 23:57:34 +00:00
Eli Friedman e1df253200 An additional atomic test; related to r137662.
llvm-svn: 137786
2011-08-16 23:29:17 +00:00
Jim Grosbach b7fa2c0a53 Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
llvm-svn: 137779
2011-08-16 22:20:01 +00:00
Eli Friedman 0793eb4c46 A bunch of misc fixes to SCCPSolver::ResolvedUndefsIn, including a fix to stop
making random bad assumptions about instructions which are not explicitly listed.  

Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".

llvm-svn: 137777
2011-08-16 22:06:31 +00:00
Eric Christopher d56ba41bc3 Remove tests that have been obsoleted or migrated to clang/optimizer tests.
llvm-svn: 137775
2011-08-16 21:46:25 +00:00
Jim Grosbach 58ffdccab1 Thumb assembly parsing and encoding for ADD(register) instruction.
llvm-svn: 137759
2011-08-16 21:34:08 +00:00
Eli Friedman 56f2f21254 Minor bug in SCCP found by inspection. (I don't think it's possible to hit this with a normal pass pipeline, but fixing for completeness.)
llvm-svn: 137755
2011-08-16 21:12:35 +00:00
Jim Grosbach 2c21bf4b43 Add testcase for r137746.
llvm-svn: 137754
2011-08-16 21:11:21 +00:00
Jim Grosbach d3ad0aa413 Tidy up formatting.
llvm-svn: 137747
2011-08-16 20:55:41 +00:00
Jim Grosbach 3e941aee69 ARM thumb assembly parsing for arithmetic flag setting instructions.
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.

llvm-svn: 137746
2011-08-16 20:45:50 +00:00
Bruno Cardoso Lopes 2e99f1b3aa Instead of always leaving the work to the generic legalizer when
there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:

For this shuffle:
  shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
                <i32 1, i32 0, i32 7, i32 6>

This was expanded to:
  vextractf128  $1, %ymm1, %xmm2
  vpextrq $0, %xmm2, %rax
  vmovd %rax, %xmm1
  vpextrq $1, %xmm2, %rax
  vmovd %rax, %xmm2
  vpunpcklqdq %xmm1, %xmm2, %xmm1
  vpextrq $0, %xmm0, %rax
  vmovd %rax, %xmm2
  vpextrq $1, %xmm0, %rax
  vmovd %rax, %xmm0
  vpunpcklqdq %xmm2, %xmm0, %xmm0
  vinsertf128 $1, %xmm1, %ymm0, %ymm0
  ret

Now we get:
  vshufpd $1, %xmm0, %xmm0, %xmm0
  vextractf128  $1, %ymm1, %xmm1
  vshufpd $1, %xmm1, %xmm1, %xmm1
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

llvm-svn: 137733
2011-08-16 18:21:54 +00:00
Akira Hatanaka 7d7bec5acf Add test case for r137711.
llvm-svn: 137725
2011-08-16 17:32:01 +00:00
Jim Grosbach 45e50d8a0b ARM .align NOP padding uses different encoding pre-ARMv6.
Patch by Kristof Beyls and James Malloy.

llvm-svn: 137723
2011-08-16 17:06:20 +00:00
Akira Hatanaka 2263c10946 Fix handling of double precision loads and stores when Mips1 is targeted.
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This 
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same 
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.

llvm-svn: 137711
2011-08-16 03:51:51 +00:00
Eli Friedman ac992afd93 Fix test.
llvm-svn: 137703
2011-08-16 01:42:56 +00:00
Eli Friedman a917d4f9b4 Revert a bit of r137667; the logic in question can safely handle atomic load/store.
llvm-svn: 137702
2011-08-16 01:28:22 +00:00
Eric Christopher 5403862ab7 Migrate this test from llvm/test/FrontendC++/ptr-to-method-devirt.cpp and
FileCheckize. It is more properly an optimizer test.

llvm-svn: 137700
2011-08-16 01:17:17 +00:00
Eli Friedman 0ffdf2ea0b Update SimplifyCFG for atomic operations.
This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it.  I think the current behavior is correct,
though.  Bill, can you double-check that?

llvm-svn: 137691
2011-08-15 23:59:28 +00:00
Eli Friedman 01a67111d1 Add comments and test for atomic load/store and mem2reg.
llvm-svn: 137690
2011-08-15 23:55:52 +00:00
Owen Anderson 53440984b3 Add a test file for Thumb2 NEON.
llvm-svn: 137687
2011-08-15 23:42:20 +00:00