Commit Graph

416713 Commits

Author SHA1 Message Date
Arthur O'Dwyer 7624552ead [libc++] Explicitly reject URNG types with signed result_types.
Fixes #48965.

Differential Revision: https://reviews.llvm.org/D120630
2022-03-02 10:28:48 -05:00
spupyrev bcdc047731 speeding up ext-tsp for huge instances
Differential Revision: https://reviews.llvm.org/D120780
2022-03-02 07:17:48 -08:00
Alex Zinenko 59814a8c99 [mlir] more Bazel changes for 23aa5a7446 2022-03-02 16:16:14 +01:00
Chuanqi Xu 3eb2da76d7 [NFC] [C++20] [Modules] Simplify ActOnModuleImport by merging Path and Parition
Reviewed By: iains

Differential Revision: https://reviews.llvm.org/D120793
2022-03-02 23:06:36 +08:00
Momchil Velikov 63c9aca12a Revert "[AArch64] Async unwind - function epilogues"
This reverts commit 74319d6794.

It causes test failures that look like infinite loop in asan/hwasan
unwinding.
2022-03-02 15:01:57 +00:00
Florian Hahn 9e46866c0c
[LV] Remove dead EntryVal argument from buildScalarSteps (NFC).
The EntryVal argument is not needed after recent refactoring. Remove it.
2022-03-02 14:59:22 +00:00
Alex Tsao 76f243b53b [RISCV] Add cost modelling for masked memory op
The patch adds very basic cost model for masked memory op on scalable vector.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D117884
2022-03-02 22:48:41 +08:00
Pavel Labath e8784289c0 Revert "Remove a top-level "using namespace" from TargetTransformInfoImpl.h"
Causing failures on many bots.

This reverts commit 31efecfde9.
2022-03-02 15:47:41 +01:00
David Green 02de975259 [AArch64] Add some tests for the cost of extending an extract. NFC 2022-03-02 14:47:32 +00:00
Groverkss bb9013555f [MLIR][Presburger] Move functionality from IntegerPolyhedron to IntegerRelation
This patch moves all functionality from IntegerPolyhedron to IntegerRelation.
IntegerPolyhedron is now implemented as a relation with no domain. All existing
functionality is extended to work on relations.

This patch does not affect external users like FlatAffineConstraints as they
can still continue to use IntegerPolyhedron abstraction.

This patch is part of a series of patches to support relations in Presburger
library.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D120652
2022-03-02 20:10:44 +05:30
Pavel Labath 31efecfde9 Remove a top-level "using namespace" from TargetTransformInfoImpl.h
Move it into the implementation of the function that needs it.

Avoids polluting the namespace of all files including the header.
2022-03-02 15:38:20 +01:00
Pavel Labath 11511e9357 Remove "using namespace llvm" from ReleaseModeModelRunner.h
A using directive in a header pollutes the namespace of all files which
include that header. It seems this snuck in in D115764 by moving some
code from a cpp file.
2022-03-02 15:29:12 +01:00
Pavel Labath d2edca6276 [lldb/Platform] Prepare decouple instance and plugin names
This patch changes the return value of Platform::GetName() to a
StringRef, and uses the opportunity (compile errors) to change some
callsites to use GetPluginName() instead. The two methods still remain
hardwired to return the same thing, but this will change once the ideas
in
<https://discourse.llvm.org/t/multiple-platforms-with-the-same-name/59594>
are implemented.

Differential Revision: https://reviews.llvm.org/D119146
2022-03-02 14:57:01 +01:00
Alex Zinenko ea998709eb [mlir] Add partial support for translating data layout
Add support for translating data layout specifications for integer and float
types between MLIR and LLVM IR. This is a first step towards removing the
string-based LLVM dialect data layout attribute on modules. The latter is still
available and will remain so until the first-class MLIR modeling can fully
replace it.

Depends On D120739

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120740
2022-03-02 14:56:50 +01:00
Alex Zinenko f64170aa1d [mlir] Data layout for integer and float types
Add support for integer and float types into the data layout subsystem with
default logic similar to LLVM IR. Given the flexibility of the sybsystem, the
logic can be easily overwritten by operations if necessary. This provides the
connection necessary, e.g., for the GPU target where alignment requirements for
integers and floats differ from those provided by default (although still
compatible with the LLVM IR model). Previously, it was impossible to use
non-default alignment requirements for integer and float types, which could
lead to incorrect address and size calculations when targeting GPUs.

Depends On D120737

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120739
2022-03-02 14:56:49 +01:00
Alex Zinenko 554839ecdf [mlir] support f80 and f128 in parseOptionalType
This seems to have been forgotten when the types were introduced.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120737
2022-03-02 14:56:47 +01:00
Simon Pilgrim ab2cbb8466 [X86] LowerShiftByScalarVariable - remove 32-bit vXi64 bitcast shift amount handling
This was handled generically (and better) by D120553
2022-03-02 13:52:14 +00:00
Florian Hahn 6dc456a375
[LV] Remove redundant check line from recurrence test.
The removed line matches the previous line, modulo the check prefix.
There is no way to disable sinking instructions as required due to
first-order recurrence and removing the line should be safe.
2022-03-02 13:48:46 +00:00
Saiyedul Islam 1e78d07dc9
[clang-offload-bundler] Fix typo in a test case
Intermediate file of one of the test was getting overwritten due
to name clash.
2022-03-02 13:33:56 +00:00
Nikita Popov 5555252b52 [InstCombine] Add additional test for phi to switch cond fold (NFC)
This test exposes a bug in the edge dominance implementation.
2022-03-02 14:33:15 +01:00
Momchil Velikov 74319d6794 [AArch64] Async unwind - function epilogues
Counterpart of https://reviews.llvm.org/D111411 this change makes the
unwind information instruction precise in function epilogues.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D112330
2022-03-02 13:15:11 +00:00
Simon Moll 9ebaec461a [VE] (masked) load|store v256.32|64 isel
Add `vvp_load|store` nodes. Lower to `vld`, `vst` where possible. Use
`vgt` for masked loads for now.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D120413
2022-03-02 13:31:29 +01:00
Manas 3ca1098557 [clang][scan-build] Change mode of installation for scan-build.1
Currently, manpage for scan-build is installed as a program, with
permission of 755. This patch makes installation of scan-build.1 as
file, with 644 permission.

Patch by Manas.

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D120646
2022-03-02 13:12:08 +01:00
Kiran Chandramohan dc48849fcc [Flang] NFC: Rearrange conversion patterns in Codegen.cpp
Minor rearrangment in the order of conversion patterns to identify
differences.

Reviewed By: clementval, schweitz

Differential Revision: https://reviews.llvm.org/D120721
2022-03-02 11:55:45 +00:00
Nikita Popov 5cf06d10f8 Revert "[InstCombine] Support switch in phi to cond fold"
This reverts commit 0817ce86b5.

Seeing some ppc64le stage2 failures, reverting to investigate.
2022-03-02 12:49:47 +01:00
Pavel Samolysov 2397f67166 [Object] Skip section offset checking for /<XFGHASHMAP>/
Starting from Windows SDK for Windows 11 (10.0.22000.x), all the system
libraries (.lib files) contain a section with the '/<XFGHASHMAP>/' name.
This looks like the libraries are built with control flow guard enabled:
https://docs.microsoft.com/en-us/cpp/build/reference/guard-enable-control-flow-guard?view=msvc-170

To let the LLVM tools (llvm-ar, llvm-lib) work with these libraries,
this patch just skips the section offset check for sections with the
'/<XFGHASHMAP>/' name.

Closes: llvm/llvm-project#53814

Signed-off-by: Pavel Samolysov <pavel.samolysov@intel.com>

Reviewed By: jhenderson, thieta

Differential Revision: https://reviews.llvm.org/D120645
2022-03-02 13:29:35 +02:00
Simon Pilgrim df0a2b4f30 [DAG] SelectionDAG::isSplatValue - add initial BITCAST handling
This patch adds support for recognising vector splats by peeking through bitcasts to vectors with smaller element types - if all the offset subelements are splats then the bitcasted vector is a splat as well.

We don't have great coverage for isSplatValue so I've made this pretty specific to the use case I'm trying to fix - regressions in some vXi64 vector shift by splat cases that 32-bit x86 doesn't recognise because the shift amount buildvector has been type legalised to v2Xi32.

We can add further support (floats, bitcast from larger element types, undef elements) when we have actual test coverage.

Differential Revision: https://reviews.llvm.org/D120553
2022-03-02 11:25:51 +00:00
Nikita Popov 0817ce86b5 [InstCombine] Support switch in phi to cond fold
For conditional branches, we know the value is i1 0 or i1 1 along
the outgoing edges. For switches we can apply exactly the same
optimization, just with the known values determined by the switch
cases.
2022-03-02 12:16:32 +01:00
Jay Foad 8bed52c9eb [AMDGPU] Make more use of madmk/fmamk instructions
In convertToThreeAddress handle VOP2 mac/fmac instructions with a
literal src0 operand, since these are prime candidates for
converting to madmk/fmamk.

Previously this would only happen if src0 (or src1) was a register
defined by a move-immediate instruction, but in many cases these
operands have already been folded because SIFoldOperands runs
before TwoAddressInstructionPass.

Differential Revision: https://reviews.llvm.org/D120736
2022-03-02 10:22:10 +00:00
Dawid Jurczak d813116c9d [NFC][Lexer] Remove getLangOpts function from Lexer
Given that there is only one external user of Lexer::getLangOpts
we can remove getter entirely without much pain.

Differential Revision: https://reviews.llvm.org/D120404
2022-03-02 11:17:05 +01:00
Florian Hahn 83fd2071f0
[LV] Modernize test matching hardcoded induction phi name. 2022-03-02 10:12:38 +00:00
Nikita Popov 85491fb6e4 [InstCombine] Add tests for phi to cond with switch (NFC)
Currently we only handle br but not switch in this fold.
2022-03-02 11:06:15 +01:00
Haojian Wu 05d7e9f68e [pseudo] fix some comment nits, NFC. 2022-03-02 10:19:17 +01:00
Simon Moll d05ddb86f6 [VP] vp.sitofp cast intrinsic and docs
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D119922
2022-03-02 10:16:19 +01:00
Simon Moll febf548129 [VP] Fix vp.fptosi LangRef example
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D120068
2022-03-02 10:15:32 +01:00
Haojian Wu 7f99e1870f [pseudo] Add a print-grammar option in the tool
This is helpful for debugging purposes.

Differential Revision: https://reviews.llvm.org/D120724
2022-03-02 10:05:49 +01:00
LLVM GN Syncbot 91e9af32fc [gn build] Port ae60884dfe 2022-03-02 08:58:54 +00:00
Stanislav Gatev ae60884dfe [clang][dataflow] Add flow condition constraints to Environment
This is part of the implementation of the dataflow analysis framework.
See "[RFC] A dataflow analysis framework for Clang AST" on cfe-dev.

Reviewed-by: ymandel, xazax.hun

Differential Revision: https://reviews.llvm.org/D120711
2022-03-02 08:57:27 +00:00
Haojian Wu 28efb1ccf5 [pseudo] Fix an out-of-bound error in LRTable::find.
The linear scan should not escape the TargetedStates range.

Differential Revision: https://reviews.llvm.org/D120723
2022-03-02 09:53:52 +01:00
Martin Storsjö 6ec18aafec [Object] [COFF] Improve error messages
This aids debugging when working with possibly broken files,
instead of just flat out erroring out without telling what's wrong.

Differential Revision: https://reviews.llvm.org/D120679
2022-03-02 10:44:41 +02:00
Martin Storsjö ea4c198a0f [libcxx] [test] Make filesystem tests not rely on libc++ internals
As part of https://reviews.llvm.org/D119036
(506cf6dc04), `-DNOMINMAX` was
dropped from the Windows CI configurations, replaced with a
block with `_LIBCPP_PUSH_MACROS`, `#include <__undef_macros>`
and `_LIBCPP_POP_MACROS` (and
`ADDITIONAL_COMPILE_FLAGS: -DNOMINMAX` left in two tests).

However, this workaround breaks the running the libc++ tests
against a different C++ standard library than libc++, as those
macros and that header are libc++ internals.

Therefore, reinstate `-DNOMINMAX` for clang-cl configurations
and remove the libc++ specific bits in filesystem_test_helper.h.

Differential Revision: https://reviews.llvm.org/D120478
2022-03-02 10:39:14 +02:00
Iain Sandoe 17ce5497aa [C++20][Modules] Improve efficiency of isModulePartition method.
The original implementation of this used the presence of a ":" in the module
name as the key, but since we now generate modules with the correct kind, we
can just test that.

Differential Revision: https://reviews.llvm.org/D120764
2022-03-02 08:31:46 +00:00
Saiyedul Islam 7a02abf06f
[clang-offload-bundler] HIP and OpenMP comaptibility for linking heterogeneous archive library
`hip-openmp-compatible` flag treats hip and hipv4 offload kinds
as compatible with openmp offload kind while extracting code objects
from a heterogenous archive library. Vice versa is also considered
compatible if hip code was compiled with -fgpu-rdc.

This flag only relaxes compatibility criteria on `OffloadKind`,
rest of the components like `Triple` and `GPUArhc` still needs to
be compatible.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D120697
2022-03-02 07:55:06 +00:00
Shao-Ce SUN 0e38b29543 [RISCV] add the MC layer support of Zfinx extension
This patch added the MC layer support of Zfinx extension.

Authored-by: StephenFan
Co-Authored-by: Shao-Ce Sun

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D93298
2022-03-02 14:25:19 +08:00
LLVM GN Syncbot e1fd5a86c7 [gn build] Port 65588a0776 2022-03-02 06:10:52 +00:00
Xiang1 Zhang 65588a0776 Revert "TLS loads opimization (hoist)"
Revert for more reviews

This reverts commit 30e612ebdf.
2022-03-02 14:10:11 +08:00
Mircea Trofin cb2160760e [nfc][codegen] Move RegisterBank[Info].h under CodeGen
This wraps up from D119053. The 2 headers are moved as described,
fixed file headers and include guards, updated all files where the old
paths were detected (simple grep through the repo), and `clang-format`-ed it all.

Differential Revision: https://reviews.llvm.org/D119876
2022-03-01 21:53:25 -08:00
Shraiysh Vaishay d2f0fe23d2 [mlir][OpenMP] Added assemblyFormat for atomic and critical operations
This patch adds assemblyFormat for `omp.critical.declare`, `omp.atomic.read`,
`omp.atomic.write`, `omp.atomic.update` and `omp.atomic.capture`.

Also removing those clauses from `parseClauses` that aren't needed
anymore, thanks to the new assemblyFormats.

Reviewed By: NimishMishra, rriddle

Differential Revision: https://reviews.llvm.org/D120248
2022-03-02 11:22:09 +05:30
Abinav Puthan Purayil 8b4ab01c38 [AMDGPU] Select no-return atomic ops in BUFInstructions.td
This change adds the selection of no-return buffer_* instructions in
tblgen. The motivation for this is to get the no-return atomic isel
working without relying on post-isel hooks so that GlobalISel can start
selecting them (once GlobalISelEmitter allows no return atomic patterns
like how DAGISel does).

This change handles the selection of no-return mubuf_atomic_cmpswap in
tblgen without changing the extract_subreg generation for the return
variant. This handling was done by the post-isel hook.

Differential Revision: https://reviews.llvm.org/D120538
2022-03-02 08:25:28 +05:30
Hongtao Yu 23391febd8 [llvm-profgen] Generating probe-based non-CS profile.
I'm bring up the support of pseudo-probe-based non-CS profile generation. The approach is quite similar to generating dwarf-based non-CS profile. The main difference is for a given linear instruction range, instead of each disassembled instruction,  pseudo probes that are covered by the range are processed. The pseudo probe extraction code is shared with CS probe profile generation.

I'm seeing 0.7% performance win for one of our internal large benchmark compared to using non-CS dwarf-based profile, and 0.5% win for another large benchmark when combined with profi.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D120335
2022-03-01 18:49:08 -08:00