Commit Graph

416713 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 2cd13e8b00 [Hexagon] Recognize "access size" for dcfetch
Dcfetch doesn't really have an access size, but the immediate
offset is scaled as for an 8-byte access, so treat it as such.
2022-03-02 12:57:51 -08:00
Mathieu Fehr dbe9f0914f [mlir] Add extensible dialects
Add support for extensible dialects, which are dialects that can be
extended at runtime with new operations and types.

These operations and types cannot at the moment implement traits
or interfaces.

Differential Revision: https://reviews.llvm.org/D104554
2022-03-02 12:42:59 -08:00
Peter Klausler 507f7317a0 [flang] Catch READ/WRITE on direct-access file without REC=
A data transfer statement must have REC= in its control list
if (and only if) the unit was opened with ACCESS='DIRECT'.
The runtime wasn't catching this error, but was just silently
advancing to the next record as if the access were sequential.

Differential Revision: https://reviews.llvm.org/D120838
2022-03-02 12:38:11 -08:00
natashaknk 8d7a833eed [tosa][mlir] Add support for dynamic width/height for Conv2D inputs in tosa-to-linalg
Infers output shape for dynamic width/height inputs.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D119977
2022-03-02 12:16:35 -08:00
Peter Klausler 3a96446d51 [flang] Honor RECL= in list-directed/namelist output
Advancement to new output lines was taking fixed-sized direct-access
and internal character array element lengths into account, but not
RECL= settings from OPEN statements.

Differential Revision: https://reviews.llvm.org/D120837
2022-03-02 12:07:18 -08:00
Craig Topper 6cb42cd666 [RISCV] More correctly ignore Zfinx register classes in getRegForInlineAsmConstraint.
Until Zfinx is supported in CodeGen we need to convert all Zfinx
register classes to GPR.

Remove the zfinx-types.ll test which didn't test anything meaningful
since -mattr=zfinx isn't implemented completely in llc.

Follow up to D93298.
2022-03-02 11:22:46 -08:00
Tong Zhang f76d3b800f [clang][CGStmt] fix crash on invalid asm statement
Clang is crashing on the following statement

  char var[9];
  __asm__ ("" : "=r" (var) : "0" (var));

This is similar to existing test: crbug_999160_regtest

The issue happens when EmitAsmStmt is trying to convert input to match
output type length. However, that is not guaranteed to be successful all the
time and if the statement itself is invalid like having an array type in
the example, we should give a regular error message here instead of
using assert().

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D120596
2022-03-02 11:18:55 -08:00
Jason Molenda daba823622 Refine error msgs from CommandObject & Disassemble
Make it clearer for end users why a command cannot be used
when a process is not stopped, etc.

Differential Revision: https://reviews.llvm.org/D120594
2022-03-02 11:17:48 -08:00
Vladislav Khmelevsky 00b6efc830 [BOLT] Enable PLT analysis for aarch64
This patch enables PLT analysis for aarch64. It is used by the static
relocations in order to provide final symbol address of PLT entry for some
instructions like ADRP.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D118088
2022-03-02 22:14:48 +03:00
Stella Laurenzo 7cdda6b8ce Revert "[cmake] Prefix gtest and gtest_main with "llvm_"."
lldb buildbot failure. will investigate and roll forward.

This reverts commit 9f37775472.
2022-03-02 11:13:46 -08:00
Douglas Yung e81e5d788c Add "REQUIRES: x86" to test as it calls llc with an x86_64 triple. 2022-03-02 11:12:41 -08:00
Peter Klausler 1e082a4a9c [flang] Fix result type of "procedure(abs) :: f"
Name resolution was properly probing the table of unrestricted
specific intrinsics to find "abs", but failing to capture the
result type and save it in the created symbol table entry.

Differential Revision: https://reviews.llvm.org/D120749
2022-03-02 11:11:40 -08:00
Valentin Clement 859d4a18b5
[flang] Lower more cases of assignments on allocatable variables
This patch enables the lowering of various allocatable assignements
for character type and numeric types.

This patch is part of the upstreaming effort from fir-dev branch.

Depends on D120819

Reviewed By: PeteSteinfeld, schweitz

Differential Revision: https://reviews.llvm.org/D120820

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-03-02 20:05:23 +01:00
Stella Laurenzo 9f37775472 [cmake] Prefix gtest and gtest_main with "llvm_".
The upstream project ships CMake rules for building vanilla gtest/gmock which conflict with the names chosen by LLVM. Since LLVM's build rules here are quite specific to LLVM, prefixing them to avoid collision is the right thing (i.e. there does not appear to be a path to letting someone *replace* LLVM's googletest with one they bring, so co-existence should be the goal).

This allows LLVM to be included with testing enabled within projects that themselves have a dependency on an official gtest release.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D120789
2022-03-02 10:53:32 -08:00
Philip Reames 738042711b Reapply "[SLP] Schedule only sub-graph of vectorizable instructions""
Root issue which triggered the revert was fixed in 689bab.  No changes in the reapplied patch.

Original commit message follows:

SLP currently schedules all instructions within a scheduling window which stretches from the first instr
uction potentially vectorized to the last. This window can include a very large number of unrelated instruct
ions which are not being considered for vectorization. This change switches the code to only schedule the su
b-graph consisting of the instructions being vectorized and their transitive users.

This has the effect of greatly reducing the amount of work performed in large basic blocks, and thus greatly improves compile time on degenerate examples. To understand the effects, I added some statistics (not planned for upstream contribution). Here's an illustration from my motivating example:

    Before this patch:

    704357 SLP                          - Number of calcDeps actions
     699021 SLP                          - Number of schedule calls
       5598 SLP                          - Number of ReSchedule actions
         59 SLP                          - Number of ReScheduleOnFail actions
      10084 SLP                          - Number of schedule resets
       8523 SLP                          - Number of vector instructions generated

    After this patch:

    102895 SLP                          - Number of calcDeps actions
     161916 SLP                          - Number of schedule calls
       5637 SLP                          - Number of ReSchedule actions
         55 SLP                          - Number of ReScheduleOnFail actions
      10083 SLP                          - Number of schedule resets
       8403 SLP                          - Number of vector instructions generated

I do want to highlight that there is a small difference in number of generated vector instructions. This example is hitting the bailout due to maximum window size, and the change in scheduling is slightly perturbing when and how we hit it. This can be seen in the RescheduleOnFail counter change. Given that, I think we can safely ignore.

The downside of this change can be seen in the large test diff. We group all vectorizable instructions together at the bottom of the scheduling region. This means that vector instructions can move quite far from their original point in code. While maybe undesirable, I don't see this as being a major problem as this pass is not intended to be a general scheduling pass.

For context, it's worth noting that the pre-scheduling that SLP does while building the vector tree is exactly the sub-graph scheduling implemented by this patch.

Differential Revision: https://reviews.llvm.org/D118538
2022-03-02 10:47:20 -08:00
Louis Dionne 17e53983b8 [NFC] Fix typo in CMake comment 2022-03-02 13:28:34 -05:00
Philip Reames 689babdf68 [SLP] Don't try to vectorize allocas
While a collection of allocas are technically vectorizeable - by forming a wider alloca - this was not a transform SLP actually knows how to do.  Instead, we were forming a bundle with missing dependencies, and then relying on the scheduling code to preserve program order if multiple instructions were scheduleable at once.  I haven't been able to write a test case, but I'm 99% sure this was wrong in some edge case.

The unknown op case was flowing down the shufflevector path.  This did result in some splat handling being lost with this change, but the same lack of splat handling is visible in a whole bunch of simple examples for the gather path.  I didn't consider this interesting to fix given how narrow the splat of allocas case is.
2022-03-02 10:08:43 -08:00
David Green 97e0366d67 [AArch64] Add some fp16 conversion cost tests. NFC 2022-03-02 18:07:14 +00:00
Joseph Huber 3f7c3ff90e [OpenMP] Handle sysroot option in offloading linker wrapper
Summary:
This patch correctly handles the `--sysroot=` option when passed to the
linker wrapper. This allows users to correctly find libraries that may
contain offloading code if using this option.
2022-03-02 13:02:41 -05:00
William S. Moses 758ddba381 [MLIR] Use Datalayout defaults when importing LLVM
LLVM defines several default datalayouts for integer and floating point types that are not being considered when importing into MLIR. This patch remedies this.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D120832
2022-03-02 13:00:53 -05:00
Craig Topper ab7a7cc1dd Revert "[LegalizeTypes][VP] Add splitting and widening support for VP_FNEG."
This reverts commit ac93f95861.

Committed by accident.
2022-03-02 10:00:22 -08:00
Stephen Long 2f6c14816a [LoopPeel] Add EXPENSIVE_CHECKS ifdef guard around domtree verify call
The verify call was taking 50% of the compile time in our internal LLVM
fork when trying to unroll many loops.

Differential Revision: https://reviews.llvm.org/D113028
2022-03-02 09:56:20 -08:00
Craig Topper 324c0a7206 [SelectionDAG][RISCV] Emit a canonical sign bit test from ExpandIntRes_ABS.
Instead of emitting 0 > Hi, emit Hi < 0. If Hi needs to be expanded again
this will allow the special case for sign bit tests in ExpandIntOp_SETCC
to trigger.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D120761
2022-03-02 09:47:26 -08:00
Craig Topper a1f8349d77 [RISCV] Don't combine ROTR ((GREV x, 24), 16)->(GREV x, 8) on RV64.
This miscompile was introduced in D119527.

This was a special pattern for rotate+bswap on RV32. It doesn't
work for RV64 since the rotate needs to be half the bitwidth. The
equivalent pattern for RV64 is ROTR ((GREV x, 56), 32) so match
that instead.

This could be generalized further as noted in the new FIXME.

Reviewed By: Chenbing.Zheng

Differential Revision: https://reviews.llvm.org/D120686
2022-03-02 09:47:06 -08:00
Craig Topper ac93f95861 [LegalizeTypes][VP] Add splitting and widening support for VP_FNEG.
Differential Revision: https://reviews.llvm.org/D120785
2022-03-02 09:47:05 -08:00
William S. Moses bf6477ebeb [MLIR][OpenMP] Place alloca scope within wsloop in scf.parallel to omp lowering
https://reviews.llvm.org/D120423 replaced the use of stacksave/restore with memref.alloca_scope, but kept the save/restore at the same location. This PR places the allocation scope within the wsloop, thus keeping the same allocation scope as the original scf.parallel (e.g. no longer over stack allocating).

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D120772
2022-03-02 12:46:58 -05:00
Philip Reames 29028e47bd [slp] Add tests for cause of D118538 revert 2022-03-02 09:45:17 -08:00
Nikolas Klauser b324798fc8 [libc++] Check clang-tidy version
Reviewed By: ldionne, #libc

Spies: libcxx-commits, arichardson

Differential Revision: https://reviews.llvm.org/D120087
2022-03-02 18:42:04 +01:00
Sander de Smalen ef9816e43c [AArch64][SME] Don't infer -neon from +streaming-sve.
In Streaming SVE mode full NEON is not available, even though this is
implied from armv8-a. LLVM previously inferred that NEON needed to be
disabled when setting +streaming-sve, but there is no need to infer
this from +streaming-sve, because we can explicitly disable NEON using
LLVM's attribute mechanism. This is specifically relevant because
+streaming-sve is not a user-facing feature, but rather an LLVM internal
feature.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D120809
2022-03-02 17:33:06 +00:00
Simon Pilgrim 75c4a92706 [X86] Enable v32i16 FSHL/FSHR support
Now that we've improved splat detection we no longer see regressions in the funnel-shift-by-splat-amount test cases
2022-03-02 17:32:38 +00:00
William S. Moses 2af81c6978 [MLIR][Arith] Canonicalize cmpi of extui/extsi
Canonicalize cmpi(eq, ext a, ext b) and cmpi(ne, ext a, ext b)

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D120620
2022-03-02 12:30:03 -05:00
Valentin Clement 17d71347b2
[flang] Handle module in lowering pass
This patch enables the lowering of basic modules and functions/subroutines
in modules.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D120819

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-03-02 18:26:43 +01:00
Arthur O'Dwyer e0e7bd15b9 [libc++] Add missing std:: qualification to __synth_three_way.
This might be unobservable, since __synth_three_way is only ever
called as a result of using an (ADL) operator on std::pair or std::tuple.
2022-03-02 12:15:19 -05:00
Valentin Clement 7e32cada01
[flang] Lower inquire statement
This patch adds the lowering of the `inquire` statement.

This patch is part of the upstreaming effort from fir-dev branch.

Depends on D120822

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D120823

Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-03-02 18:03:29 +01:00
Valentin Clement 46f46a3763
[flang] Lower basic IO file statements
This patches adds lowering for couple of basic io statements such as `flush`,
`endfile`, `backspace` and `rewind`

This patch is part of the upstreaming effort from fir-dev branch.

Depends on D120821

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D120822

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-03-02 18:01:23 +01:00
William S. Moses db31da279f [MLIR][Arith] Add constant folder for left shift
Add constant folder for left shift

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D120661
2022-03-02 12:00:23 -05:00
Akira Hatanaka d112cc2756 [NFC][Clang][OpaquePtr] Remove the call to Address::deprecated in
CreatePointerBitCastOrAddrSpaceCast

Differential Revision: https://reviews.llvm.org/D120757
2022-03-02 08:58:00 -08:00
Valentin Clement db48f7b2f7
[flang] Lower IO open and close statements
This patch adds the lowering of open and close statements

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D120821

Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-03-02 17:57:08 +01:00
Marek Kurdej 13351fdf8c [clang-format] Recognize "if consteval".
Fixes https://github.com/llvm/llvm-project/issues/54140.

Reviewed By: MyDeveloperDay, JohelEGP

Differential Revision: https://reviews.llvm.org/D120806
2022-03-02 17:46:45 +01:00
Daniel McIntosh d636b76eca [CodeGen] Use AdjustStackOffset for Callee Saved Registers in PEI::calculateFrameObjectOffsets
Also, changes how the CSR loop is indexed, which should avoid bugs like the one fixed by rG4a57bb5a3b74bdad9b0518009a7d7ac7ca2ac650

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D120668
2022-03-02 11:41:12 -05:00
Nikita Popov 98cfcae4e9 Revert "[RISCV] Add cost modelling for masked memory op"
This reverts commit 76f243b53b.

The newly added test fails.
2022-03-02 17:32:10 +01:00
Simon Pilgrim 3c568ee659 [X86] Add XOP coverage for vector-popcnt tests 2022-03-02 16:25:26 +00:00
Florian Hahn 8777cb66a8
[VPlan] Remove reliance on underlying instr for ScalarIVSteps (NFCI).
Instead of relying on underlying instructions, this patch updates
VPScalarIVStepsRecipe to only store the required type information.

This removes access to unrelated information, as well as avoiding issues
with the same underlying instruction being shared by multiple recipes.

This change should only change the debug output and not cause any
codegen changes, hence NFCI.
2022-03-02 16:23:19 +00:00
Jay Foad 5ddfedc956 [AMDGPU] Fix deleting of move-immediate instructions after folding
SIInstrInfo::FoldImmediate tried to delete move-immediate instructions
after folding them into their only use. This did not work because it was
checking hasOneNonDBGUse after doing the fold, at which point there
should be no uses. This seems to have no effect on codegen, it just
means less stuff for DCE to clean up later.

Differential Revision: https://reviews.llvm.org/D120815
2022-03-02 16:11:16 +00:00
Simon Pilgrim 7848bf16fe [ObjectYAML] WasmWriter::writeSectionContent - use llvm::enumerate to fix 'side effect in assert' warning 2022-03-02 16:09:09 +00:00
Simon Pilgrim ca94f28d15 [clang] ExprEngine::VisitCXXNewExpr - remove superfluous nullptr tests
FD has already been dereferenced
2022-03-02 15:59:10 +00:00
Nikita Popov 6fde043951 [MachineSink] Disable if there are any irreducible cycles
This is an alternative to D120330, which disables MachineSink for
functions with irreducible cycles entirely. This avoids both the
correctness problem, and ensures we don't perform non-profitable
sinks into cycles. At the same time, it may also disable
profitable sinks in the same function. This can be made more
precise by using MachineCycleInfo in the future.

Fixes https://github.com/llvm/llvm-project/issues/53990.

Differential Revision: https://reviews.llvm.org/D120800
2022-03-02 16:57:29 +01:00
Alex Zinenko eb27da7dec [mlir] Ignore index data layout in translation to LLVM
It can be present, but is irrelevant for the translation.
2022-03-02 16:56:21 +01:00
Nikita Popov 61580d0949 Reapply [InstCombine] Remove one-use limitation from X-Y==0 fold
This is a recommit without changes. I originally reverted this
due to a significant code-size regression on tramp3d-v4, however
further investigation showed that in the tramp3d-v4 case this
change enables additional optimizations (in particular more
jump threading), which happens to reduce the size of a function
just enough to be eligible for inlining at hot callsites, which
results in the code size increase. As such, this was just bad
luck.

-----

This one-use limitation is artificial, we do not increase
instruction count if we perform the fold with multiple uses. The
motivating case is shown in @sub_eq_zero_select, where the one-use
limitation causes us to miss a subsequent select fold.

I believe the backend is pretty good about reusing flag-producing
subs for cmps with same operands, so I think doing this is fine.

Differential Revision: https://reviews.llvm.org/D120337
2022-03-02 16:43:33 +01:00
Simon Pilgrim 5cce97d61e [DAG] isSplatValue - improve ISD::VECTOR_SHUFFLE splat detection
Currently we only check for splat shuffles, this extends it to see if the source operand is a splat across the demanded elts based upon the shuffle mask
2022-03-02 15:32:24 +00:00