Commit Graph

2058 Commits

Author SHA1 Message Date
Chris Lattner 386a220f70 Fix PR6921: globals were not getting correctly rounded up to their
preferred alignment unless they were common or some other special
case.

llvm-svn: 102300
2010-04-25 05:30:43 +00:00
Dan Gohman 534ba376f6 Generalize LSR's OptimizeMax to handle the new kinds of max expressions
that indvars may use, now that indvars is recognizing le and ge loops.

llvm-svn: 102235
2010-04-24 03:13:44 +00:00
Stuart Hastings c8b2fc0909 Per Chris, fuse four trivial tests using grep (r102199) into one that uses FileCheck.
llvm-svn: 102216
2010-04-23 22:12:57 +00:00
Dan Gohman e1931fa676 Change TargetData's algorithm for computing defualt vector type
alignment to match what's used in clang and GCC for __alignof, rather
than trying to guess what Legalize is going to be doing.

llvm-svn: 102206
2010-04-23 19:41:15 +00:00
Stuart Hastings 24b63f1597 Add some missing x86 patterns for movdq2q. Fixes two (LLVM-)GCC DejaGNU testcases. Radar 6881029.
llvm-svn: 102199
2010-04-23 19:03:32 +00:00
Dan Gohman 997bbc54d6 Fix LSR to tolerate cases where ScalarEvolution initially
misses an opportunity to fold add operands, but folds them
after LSR has separated them out. This fixes rdar://7886751.

llvm-svn: 102157
2010-04-23 01:55:05 +00:00
Evan Cheng 02e816b317 Do not try to optimize a copy that has already been marked for deletion.
llvm-svn: 102027
2010-04-21 20:57:54 +00:00
Evan Cheng 4158a0ff6b Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181

llvm-svn: 101984
2010-04-21 03:18:23 +00:00
Evan Cheng 2034d9f2da - Clean up some crappy code which deals with coalescing of copies which look at
extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.

llvm-svn: 101971
2010-04-21 00:44:22 +00:00
Dan Gohman ad33d33719 Add another variant of this test which found a place where
CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.

llvm-svn: 101963
2010-04-21 00:19:28 +00:00
Chris Lattner 84776786a7 teach the x86 address matching stuff to handle
(shl (or x,c), 3) the same as (shl (add x, c), 3)
when x doesn't have any bits from c set.

This finishes off PR1135.  Before we compiled the block to:
to:

LBB0_3:                                 ## %bb
	cmpb	$4, %dl
	sete	%dl
	addb	%dl, %cl
	movb	%cl, %dl
	shlb	$2, %dl
	addb	%r8b, %dl
	shlb	$2, %dl
	movzbl	%dl, %edx
	movl	%esi, (%rdi,%rdx,4)
	leaq	2(%rdx), %r9
	movl	%esi, (%rdi,%r9,4)
	leaq	1(%rdx), %r9
	movl	%esi, (%rdi,%r9,4)
	addq	$3, %rdx
	movl	%esi, (%rdi,%rdx,4)
	incb	%r8b
	decb	%al
	movb	%r8b, %dl
	jne	LBB0_1

Now we produce:

LBB0_3:                                 ## %bb
	cmpb	$4, %dl
	sete	%dl
	addb	%dl, %cl
	movb	%cl, %dl
	shlb	$2, %dl
	addb	%r8b, %dl
	shlb	$2, %dl
	movzbl	%dl, %edx
	movl	%esi, (%rdi,%rdx,4)
	movl	%esi, 8(%rdi,%rdx,4)
	movl	%esi, 4(%rdi,%rdx,4)
	movl	%esi, 12(%rdi,%rdx,4)
	incb	%r8b
	decb	%al
	movb	%r8b, %dl
	jne	LBB0_1

llvm-svn: 101958
2010-04-20 23:18:40 +00:00
Bill Wendling a8ae1783b4 Move CodeGen/X86/2010-04-19-DAGCombineCrash.ll into CodeGen/X86/crash.ll. Also
reduce.

llvm-svn: 101925
2010-04-20 18:14:47 +00:00
Bill Wendling 467e6c2deb The visitXOR method can return the same SDNode. If so, we don't want to delete
it as it's not dead.

llvm-svn: 101855
2010-04-20 01:25:01 +00:00
Dan Gohman 4fee6f3bdd Start function numbering at 0.
llvm-svn: 101638
2010-04-17 16:29:15 +00:00
Evan Cheng 3af19e80c9 Add nounwind.
llvm-svn: 101613
2010-04-17 03:43:36 +00:00
Jakob Stoklund Olesen dc6d42dbf8 Add test case for machine-sink on critical edges
llvm-svn: 101416
2010-04-15 23:19:16 +00:00
Chris Lattner 3245afdf05 enhance the load/store narrowing optimization to handle a
tokenfactor in between the load/store.  This allows us to 
optimize test7 into:

_test7:                                 ## @test7
## BB#0:                                ## %entry
	movl	(%rdx), %eax
                                        ## kill: SIL<def> ESI<kill>
	movb	%sil, 5(%rdi)
	ret

instead of:

_test7:                                 ## @test7
## BB#0:                                ## %entry
	movl	4(%esp), %ecx
	movl	$-65281, %eax           ## imm = 0xFFFFFFFFFFFF00FF
	andl	4(%ecx), %eax
	movzbl	8(%esp), %edx
	shll	$8, %edx
	addl	%eax, %edx
	movl	12(%esp), %eax
	movl	(%eax), %eax
	movl	%edx, 4(%ecx)
	ret

llvm-svn: 101355
2010-04-15 06:10:49 +00:00
Chris Lattner 6ebd8674eb teach codegen to turn trunc(zextload) into load when possible.
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering.  In that
case it is saves a few bytes on x86-32.

llvm-svn: 101350
2010-04-15 05:40:59 +00:00
Chris Lattner 4041ab6e00 Implement rdar://7860110 (also in target/readme.txt) narrowing
a load/or/and/store sequence into a narrower store when it is
safe.  Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does  trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.

This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll 
into:

        movl    %eax, 36(%rdi)

instead of:

        movl    $4294967295, %eax       ## imm = 0xFFFFFFFF
        andq    32(%rdi), %rax
        shlq    $32, %rcx
        addq    %rax, %rcx
        movq    %rcx, 32(%rdi)

and each of the testcases into a single store.  Each of them used
to compile into craziness like this:

_test4:
	movl	$65535, %eax            ## imm = 0xFFFF
	andl	(%rdi), %eax
	shll	$16, %esi
	addl	%eax, %esi
	movl	%esi, (%rdi)
	ret

llvm-svn: 101343
2010-04-15 04:48:01 +00:00
Chris Lattner 60bbb8c356 further tweak this to do something useful.
llvm-svn: 101341
2010-04-15 04:31:42 +00:00
Chris Lattner 9ebaf531ab remove undef control flow.
llvm-svn: 101340
2010-04-15 04:30:19 +00:00
Jakob Stoklund Olesen 938f2ae310 Remove unneeded types from test.
llvm-svn: 101286
2010-04-14 20:56:09 +00:00
Evan Cheng 6c35893aa6 Add test for post-ra machine licm.
llvm-svn: 101182
2010-04-13 22:10:03 +00:00
Evan Cheng 4d89dd8353 Fix test on non-x86 hosts.
llvm-svn: 101163
2010-04-13 18:54:04 +00:00
Evan Cheng 4ca4bc6f95 Re-apply 101075 and fix it properly. Just reuse the debug info of the branch instruction being optimized. There is no need to --I which can deref off start of the BB.
llvm-svn: 101162
2010-04-13 18:50:27 +00:00
Eric Christopher d67f66dc0c Temporarily revert r101075, it's causing invalid iterator assertions
in a nightly tester.

llvm-svn: 101158
2010-04-13 18:37:58 +00:00
Chris Lattner 5b212a31a2 add llvm codegen support for -ffunction-sections and -fdata-sections,
patch by Sylvere Teissier!

llvm-svn: 101106
2010-04-13 00:36:43 +00:00
Evan Cheng d0d8e3343a Use .set expression for x86 pic jump table reference to reduce assembly relocation. rdar://7738756
llvm-svn: 101085
2010-04-12 23:07:17 +00:00
Bill Wendling caaf445a01 Third time's a charm...
llvm-svn: 101081
2010-04-12 22:43:21 +00:00
Bill Wendling 4fc5a4d8b8 Genericize the label test.
llvm-svn: 101079
2010-04-12 22:40:37 +00:00
Bill Wendling 4627917b9a Correct test to test what I mean it to test.
llvm-svn: 101077
2010-04-12 22:25:42 +00:00
Bill Wendling b02bbe416f Micro-optimization:
If we have this situation:

    jCC  L1
    jmp  L2
L1:
  ...
L2:
  ...

We can get a small performance boost by emitting this instead:

    jnCC L2
L1:
  ...
L2:
  ...

This testcase shows an example of this:

float func(float x, float y) {
    double product = (double)x * y;
    if (product == 0.0)
        return product;
    return product - 1.0;
}

llvm-svn: 101075
2010-04-12 22:19:57 +00:00
Evan Cheng 250283916d Enable post regalloc machine licm by default.
llvm-svn: 101023
2010-04-12 06:25:28 +00:00
Dan Gohman d23fa7d90d Merge a few fast-isel tests.
llvm-svn: 100860
2010-04-09 15:03:55 +00:00
Evan Cheng b083c47c21 Coalescer should not delete copy instructions whose defs are partially dead. e.g.
%RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>

llvm-svn: 100804
2010-04-08 20:02:37 +00:00
Evan Cheng ebe47c872f Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
llvm-svn: 100751
2010-04-08 07:37:57 +00:00
Dan Gohman 4506539d84 When expanding expressions which are using post-inc mode for multiple loops,
ensure that the expansion is dominated by the increments of those loops.

llvm-svn: 100748
2010-04-08 05:57:57 +00:00
Chris Lattner 3ae2dd2ba5 add newlines at the end of files.
llvm-svn: 100705
2010-04-07 22:53:17 +00:00
Dan Gohman d006ab90dd Generalize IVUsers to track arbitrary expressions rather than expressions
explicitly split into stride-and-offset pairs. Also, add the
ability to track multiple post-increment loops on the same expression.

This refines the concept of "normalizing" SCEV expressions used for
to post-increment uses, and introduces a dedicated utility routine for
normalizing and denormalizing expressions.

This fixes the expansion of expressions which are post-increment users
of more than one loop at a time. More broadly, this takes LSR another
step closer to being able to reason about more than one loop at a time.

llvm-svn: 100699
2010-04-07 22:27:08 +00:00
Dale Johannesen f118f9788b Split big test into multiple directories to cater to
those who don't build all targets.

llvm-svn: 100688
2010-04-07 20:43:35 +00:00
Chris Lattner 2c88f8a8c4 this has a pr!
llvm-svn: 100637
2010-04-07 18:04:56 +00:00
Chris Lattner f839ee0c13 fix a latent bug my inline asm stuff exposed:
MachineOperand::isIdenticalTo wasn't handling metadata operands.

llvm-svn: 100636
2010-04-07 18:03:19 +00:00
Jakob Stoklund Olesen 41051a0bfe Don't try to collapse DomainValues onto an incompatible SSE domain.
This fixes the Bullet regression on i386/nocona.

llvm-svn: 100553
2010-04-06 19:48:56 +00:00
Evan Cheng b7a20ee5b5 Add nounwind.
llvm-svn: 100482
2010-04-05 22:30:05 +00:00
Dan Gohman 918a90a3ca Don't do code sinking on unreachable blocks. It's unprofitable and hazardous.
llvm-svn: 100455
2010-04-05 19:17:22 +00:00
Chris Lattner 4e4549deea resolve a fixme.
llvm-svn: 100346
2010-04-04 19:28:59 +00:00
Evan Cheng 61399375a2 Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
llvm-svn: 100208
2010-04-02 19:36:14 +00:00
Dan Gohman 4bd755419f Revert the recent alignment changes. They're broken for -Os because,
in particular, they end up aligning strings at 16-byte boundaries, and
there's no way for GlobalOpt to check OptForSize.

llvm-svn: 100172
2010-04-02 03:04:37 +00:00
Dan Gohman 8ceeeb444e Remove this initializer so that the optimizer doesn't convert
unaligned loads into aligned loads.

llvm-svn: 100166
2010-04-02 01:26:13 +00:00
Dan Gohman ffb9c71174 Update this test for the new preferred alignment heuristics.
llvm-svn: 100165
2010-04-02 01:24:08 +00:00
Evan Cheng f997c31598 In 64-bit mode, use i64 to lower memcpy / memset instead of f64.
llvm-svn: 100137
2010-04-01 20:27:45 +00:00
Evan Cheng 4c014c892a - Avoid using floating point stores to implement memset unless the value is zero.
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.

llvm-svn: 100118
2010-04-01 18:19:11 +00:00
Evan Cheng 1e8ee79957 Add -mcpu to memcpy / memset tests to ensure they behave the same on all hosts / targets.
llvm-svn: 100101
2010-04-01 08:25:26 +00:00
Evan Cheng 43cd9e3845 Fix sdisel memcpy, memset, memmove lowering:
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
   load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
   ops more effectively.
rdar://7774704

llvm-svn: 100090
2010-04-01 06:04:33 +00:00
Jakob Stoklund Olesen 9986ba954c Replace V_SET0 with variants for each SSE execution domain.
llvm-svn: 99975
2010-03-31 00:40:13 +00:00
Jakob Stoklund Olesen 710c6892be Fix typo. Thank you, valgrind.
llvm-svn: 99974
2010-03-31 00:40:08 +00:00
Jakob Stoklund Olesen 19aa6f72a0 Not all platforms start symbols with _
llvm-svn: 99959
2010-03-30 23:12:48 +00:00
Jakob Stoklund Olesen 6f6ebb663c Enable -sse-domain-fix by default. Now with tests!
llvm-svn: 99954
2010-03-30 22:47:00 +00:00
Eric Christopher 6ad8167714 Remove the pmulld intrinsic and autoupdate it as a vector multiply.
Rewrite the pmulld patterns, and make sure that they fold in loads of
arguments into the instruction.

llvm-svn: 99910
2010-03-30 18:49:01 +00:00
Chris Lattner a787c9e23a teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4),
transforming it into (add (i32 GPR), 4).  This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align.  This allows us to fold an extra load
in the changed testcase.

llvm-svn: 99756
2010-03-28 08:38:32 +00:00
Evan Cheng 3365fb1412 Do not sibcall if stack needs to be dynamically aligned.
llvm-svn: 99620
2010-03-26 16:26:03 +00:00
Evan Cheng 00a620c61e Allow trivial sibcall of vararg callee when no arguments are being passed.
llvm-svn: 99598
2010-03-26 02:13:13 +00:00
Evan Cheng 7b4a1a221b Try trivial remat before the coalescer gives up on a vr / physreg coalescing for fear of tying up a physical register.
llvm-svn: 99575
2010-03-26 00:07:25 +00:00
Evan Cheng dbcf861a96 Add nounwind.
llvm-svn: 99546
2010-03-25 20:01:07 +00:00
Chris Lattner 4690af8567 Make the NDEBUG assertion stronger and more clear what is
happening.

Enhance scheduling to set the DEAD flag on implicit defs
more aggressively.  Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use.  Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.

This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more 
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.

Talking to codegen folks about both these issues, but I need
this patch in in the meantime.

llvm-svn: 99485
2010-03-25 05:40:48 +00:00
Nate Begeman 583e05d8ce BUILD_VECTOR was missing out on some prime opportunities to use SSE 4.1 inserts.
llvm-svn: 99423
2010-03-24 20:49:50 +00:00
Evan Cheng b8d1fd0553 Stupid svn. Add back to the lost sibcall tests.
llvm-svn: 99033
2010-03-20 03:17:05 +00:00
Kevin Enderby cf0843ed93 Fixed the encoding problems of the crc32 instructions. All had the Operand size
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980
2010-03-19 20:04:42 +00:00
Mon P Wang 7ad43f8768 Fixed a widening bug where we were not using the correct size for the load
llvm-svn: 98920
2010-03-19 01:19:52 +00:00
Evan Cheng bf724b9ee0 Turning off post-ra scheduling for x86. It isn't a consistent win.
llvm-svn: 98810
2010-03-18 06:55:42 +00:00
Evan Cheng 68333f5c6e X86 address mode matching code MatchAddressRecursively does some aggressive hack which require doing a RAUW. It may end up deleting some SDNode up stream. It should avoid referencing deleted nodes.
llvm-svn: 98780
2010-03-17 23:58:35 +00:00
Dan Gohman 5a6dc1dd09 Add an rdar number to this test.
llvm-svn: 98654
2010-03-16 19:08:20 +00:00
Bill Wendling 31d7f0d96a Forgot testcase for r98599.
llvm-svn: 98602
2010-03-16 01:54:20 +00:00
Daniel Dunbar 5599256415 MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr.
- Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
 - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.

llvm-svn: 98592
2010-03-15 23:51:06 +00:00
Dan Gohman c6ddebd6d1 Recognize code for doing vector gather/scatter index calculations with
32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.

llvm-svn: 98588
2010-03-15 23:23:03 +00:00
Chris Lattner 561334a81f Implement support for the case when a reference to a addr-of-bb
label is generated, but then the block is deleted.  Since the
value is undefined, we just emit the label right after the entry 
label of the function.  It might matter that the label is in the
same section as the function was afterall.

llvm-svn: 98579
2010-03-15 20:39:00 +00:00
Chris Lattner 347a0eb85c Fix the case when a reference to an address taken BB is emitted in one
function, then the BB is RAUW'd before the definition is emitted.  There
are still two cases not being handled, but this should improve us back to
the situation before I touched anything.

llvm-svn: 98566
2010-03-15 19:09:43 +00:00
Chris Lattner d03a956a01 filecheckize a test and mark these wiht a cpu so it passes
on hosts without cmovs.

llvm-svn: 98521
2010-03-14 22:31:16 +00:00
Chris Lattner f71cb6c439 fix ShrinkDemandedOps to not leave dead nodes around,
fixing PR6607

llvm-svn: 98512
2010-03-14 19:46:02 +00:00
Chris Lattner 5049f23592 don't have i386-specific tests in CodeGen/Generic, PR6601.
llvm-svn: 98508
2010-03-14 18:51:18 +00:00
Chris Lattner 6feb7e3325 fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), not
the operand type.

llvm-svn: 98507
2010-03-14 18:44:35 +00:00
Chris Lattner 6e52e9db31 get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.

llvm-svn: 98489
2010-03-14 08:36:50 +00:00
Evan Cheng d703df67ce Do not force indirect tailcall through fixed registers: eax, r11. Add support to allow loads to be folded to tail call instructions.
llvm-svn: 98465
2010-03-14 03:48:46 +00:00
Chris Lattner d75813970a simplify code to use OutContext.GetOrCreateTemporarySymbol with
no arguments instead of having to come up with a unique name.
This also makes the code less fragile.

llvm-svn: 98364
2010-03-12 18:47:50 +00:00
Chris Lattner 53ebf8a7ca fix PR6577, a bug in sdbuilder lowering select instructions
whose true value was not Val#0.

llvm-svn: 98336
2010-03-12 07:15:36 +00:00
Bill Wendling 00810c39da revert r98270.
llvm-svn: 98281
2010-03-11 19:50:31 +00:00
Evan Cheng 31fe835bf2 Bad bad bug. x86 force indirect tail call address into eax when it's meant to force it into a call preserved register instead. Change it to ecx for now.
llvm-svn: 98270
2010-03-11 18:49:14 +00:00
Evan Cheng 8c4df8160e The check for coalescing a virtual register to a physical register, e.g.
cl = EXTRACT_SUBREG reg1024, 1, is overly conservative. It should check
for overlaps of vr's live interval with the super registers of the
physical register (ECX in this case) and let JoinIntervals() handle checking
the coalescing feasibility against the physical register (cl in this case).

llvm-svn: 98251
2010-03-11 08:20:21 +00:00
Eric Christopher 304f13c637 Have fast-isel understand llvm.objectsize. Update testcase for slightly
different codegen.

llvm-svn: 98244
2010-03-11 06:20:22 +00:00
Chris Lattner a179e4d0a8 add support, testcases, and dox for the new GHC calling
convention.  Patch by David Terei!

llvm-svn: 98212
2010-03-11 00:22:57 +00:00
Chris Lattner 4ec0b670d5 fix PR6533 by updating the br(xor) code to remember the case
when it looked past a trunc.

llvm-svn: 98203
2010-03-10 23:46:44 +00:00
Evan Cheng 72811e8714 Fix typo.
llvm-svn: 98142
2010-03-10 07:07:55 +00:00
Evan Cheng a3b6739749 Unbreak test on Linux.
llvm-svn: 98141
2010-03-10 07:07:45 +00:00
Evan Cheng 80ad113731 Enable machine cse pass.
llvm-svn: 98132
2010-03-10 03:07:41 +00:00
Chris Lattner 9889c1eb9e move .set generation out of DwarfPrinter into AsmPrinter and
MCize it.

llvm-svn: 98010
2010-03-08 23:58:37 +00:00
Chris Lattner 27a9732450 simplify EmitSectionOffset to always use .set if it is
available, the only thing this affects is that we produce
.set in one case we didn't before, which shouldn't harm
anything.  Make EmitSectionOffset call EmitDifference
instead of duplicating it.

llvm-svn: 98005
2010-03-08 23:23:25 +00:00
Evan Cheng 5967649780 Add documentation on sibling call optimization. Rename tailcall2.ll test to sibcall.ll.
llvm-svn: 97980
2010-03-08 21:05:02 +00:00
Charles Davis 8545afe0b0 Don't emit global symbols into the (__TEXT,__ustring) section on Darwin. This
is a workaround for <rdar://problem/7672401/> (which I filed).

This let's us build Wine on Darwin, and it gets the Qt build there a little bit
further (so Doug says).

llvm-svn: 97845
2010-03-05 22:28:45 +00:00
Jakob Stoklund Olesen 2664d295cb Better handling of dead super registers in LiveVariables. We used to do this:
CALL ... %RAX<imp-def>
   ... [not using %RAX]
   %EAX = ..., %RAX<imp-use, kill>
   RET %EAX<imp-use,kill>

Now we do this:

   CALL ... %RAX<imp-def, dead>
   ... [not using %RAX]
   %EAX = ...
   RET %EAX<imp-use,kill>

By not artificially keeping %RAX alive, we lower register pressure a bit.

The correct number of instructions for 2008-08-05-SpillerBug.ll is obviously
55, anybody can see that. Sheesh.

llvm-svn: 97838
2010-03-05 21:49:17 +00:00
Jakob Stoklund Olesen 8c5b8db5cd We don't really care about correct register liveness information after the
post-ra scheduler has run. Disable the verifier checks that late in the game.

llvm-svn: 97837
2010-03-05 21:49:13 +00:00
Jakob Stoklund Olesen b0503beff1 Avoid creating bad PHI instructions when BR is being const-folded.
llvm-svn: 97836
2010-03-05 21:49:10 +00:00
Evan Cheng 654ec2a663 Fix an oops in x86 sibcall optimization. If the ByVal callee argument is itself passed as a pointer, then it's obviously not safe to do a tail call.
llvm-svn: 97797
2010-03-05 08:38:04 +00:00
Chris Lattner 55e81eb49f Fix PR6497, a bug where we'd fold a load into an addc
node which has a flag.  That flag in turn was used by an
already-selected adde which turned into an ADC32ri8 which
used a selected load which was chained to the load we
folded.  This flag use caused us to form a cycle.  Fix
this by not ignoring chains in IsLegalToFold even in
cases where the isel thinks it can.

llvm-svn: 97791
2010-03-05 06:19:13 +00:00
Chris Lattner bfdd17a2ea cleanup
llvm-svn: 97790
2010-03-05 06:17:43 +00:00
Evan Cheng cf67ffa500 Rever 96389 and 96990. They are causing some miscompilation that I do not fully understand.
llvm-svn: 97782
2010-03-05 03:08:23 +00:00
Bill Wendling 543ce1f64a Revert r97766. It's deleting a tag.
llvm-svn: 97768
2010-03-05 00:33:59 +00:00
Bill Wendling 6517f88f25 Micro-optimization:
This code:

float floatingPointComparison(float x, float y) {
    double product = (double)x * y;
    if (product == 0.0)
        return product;
    return product - 1.0;
}

produces this:

_floatingPointComparison:
0000000000000000        cvtss2sd        %xmm1,%xmm1
0000000000000004        cvtss2sd        %xmm0,%xmm0
0000000000000008        mulsd           %xmm1,%xmm0
000000000000000c        pxor            %xmm1,%xmm1
0000000000000010        ucomisd         %xmm1,%xmm0
0000000000000014        jne             0x00000004
0000000000000016        jp              0x00000002
0000000000000018        jmp             0x00000008
000000000000001a        addsd           0x00000006(%rip),%xmm0
0000000000000022        cvtsd2ss        %xmm0,%xmm0
0000000000000026        ret

The "jne/jp/jmp" sequence can be reduced to this instead:

_floatingPointComparison:
0000000000000000        cvtss2sd        %xmm1,%xmm1
0000000000000004        cvtss2sd        %xmm0,%xmm0
0000000000000008        mulsd           %xmm1,%xmm0
000000000000000c        pxor            %xmm1,%xmm1
0000000000000010        ucomisd         %xmm1,%xmm0
0000000000000014        jp              0x00000002
0000000000000016        je              0x00000008
0000000000000018        addsd           0x00000006(%rip),%xmm0
0000000000000020        cvtsd2ss        %xmm0,%xmm0
0000000000000024        ret

for a savings of 2 bytes.

This xform can happen when we recognize that jne and jp jump to the same "true"
MBB, the unconditional jump would jump to the "false" MBB, and the "true" branch
is the fall-through MBB.

llvm-svn: 97766
2010-03-05 00:24:26 +00:00
Jakob Stoklund Olesen af6ca23294 Fix the remaining MUL8 and DIV8 to define AX instead of AL,AH.
These instructions technically define AL,AH, but a trick in X86ISelDAGToDAG
reads AX in order to avoid reading AH with a REX instruction.

Fix PR6489.

llvm-svn: 97742
2010-03-04 20:42:07 +00:00
Dan Gohman b8ebd408da Fix recognition of 16-bit bswap for C front-ends which emit the
clobber registers in a different order.

llvm-svn: 97741
2010-03-04 19:58:08 +00:00
Dan Gohman 2850b41412 Revert r97580; that's not the right way to fix this.
llvm-svn: 97639
2010-03-03 04:36:42 +00:00
Bill Wendling af13d82945 This test case:
long test(long x) { return (x & 123124) | 3; }

Currently compiles to:

_test:
        orl     $3, %edi
        movq    %rdi, %rax
        andq    $123127, %rax
        ret

This is because instruction and DAG combiners canonicalize

  (or (and x, C), D) -> (and (or, D), (C | D))

However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.

llvm-svn: 97616
2010-03-03 00:35:56 +00:00
Chris Lattner dd030701bd Fix some issues in WalkChainUsers dealing with
CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)

llvm-svn: 97596
2010-03-02 22:20:06 +00:00
Dan Gohman d55f574589 When expanding an expression such as (A + B + C + D), sort the operands
by loop depth and emit loop-invariant subexpressions outside of loops.
This speeds up MultiSource/Applications/viterbi and others.

llvm-svn: 97580
2010-03-02 19:32:21 +00:00
Chris Lattner 35ec683b78 clean up some testcases.
llvm-svn: 97576
2010-03-02 18:56:03 +00:00
Chris Lattner 925ac71f26 Fix the xfail I added a couple of patches back. The issue
was that we weren't properly handling the case when interior
nodes of a matched pattern become dead after updating chain
and flag uses.  Now we handle this explicitly in 
UpdateChainsAndFlags.

llvm-svn: 97561
2010-03-02 07:50:03 +00:00
Chris Lattner b884fe867e Rewrite chain handling validation and input TokenFactor handling
stuff now that we don't care about emulating the old broken 
behavior of the old isel.  This eliminates the 
'CheckChainCompatible' check (along with IsChainCompatible) which
did an incorrect and inefficient scan *up* the chain nodes which
happened as the pattern was being formed and does the validation
at the end in HandleMergeInputChains when it forms a structural 
pattern.  This scans "down" the graph, which means that it is
quickly bounded by nodes already selected.  This also handles
token factors that get "trapped" in the dag.

Removing the CheckChainCompatible nodes also shrinks the 
generated tables by about 6K for X86 (down to 83K).

There are two pieces remaining before I can nuke PreprocessRMW:
1. I xfailed a test because we're now producing worse code in a 
   case that has nothing to do with the change: it turns out that
   our use of MorphNodeTo will leave dead nodes in the graph
   which (depending on how the graph is walked) end up causing
   bogus uses of chains and blocking matches.  This is really 
   bad for other reasons, so I'll fix this in a follow-up patch.

2. CheckFoldableChainNode needs to be improved to handle the TF.

llvm-svn: 97539
2010-03-02 02:22:10 +00:00
Dan Gohman 4cec543952 Fix several places to handle vector operands properly.
Based on a patch by Micah Villmow for PR6438.

llvm-svn: 97538
2010-03-02 02:14:38 +00:00
Devang Patel 3bf0571bb0 Rewrite test to test VLA using new debug info encoding scheme.
llvm-svn: 97465
2010-03-01 18:30:58 +00:00
Chris Lattner 90e7924cf0 add some random nounwinds.
llvm-svn: 97411
2010-02-28 20:36:49 +00:00
Dan Gohman 34021b7445 Don't try to replace physical registers when doing CSE.
llvm-svn: 97360
2010-02-28 01:33:43 +00:00
Dan Gohman 45e7ffc350 Add nounwinds.
llvm-svn: 97349
2010-02-27 23:53:53 +00:00
Evan Cheng 228c31f045 Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
llvm-svn: 97310
2010-02-27 07:36:59 +00:00
Chris Lattner f7fc2d8b86 change the scope node to include a list of children to be checked
instead of to have a chained series of scope nodes.  This makes
the generated table smaller, improves the efficiency of the
interpreter, and make the factoring optimization much more 
reasonable to implement.

llvm-svn: 97160
2010-02-25 19:00:39 +00:00
Dan Gohman 9b80f86e5b Revert r97064. Duncan pointed out that bitcasts are defined in
terms of store and load, which means bitcasting between scalar
integer and vector has endian-specific results, which undermines
this whole approach.

llvm-svn: 97137
2010-02-25 15:20:39 +00:00
Dan Gohman a9c205cc88 Make LoopSimplify change conditional branches in loop exiting blocks
which branch on undef to branch on a boolean constant for the edge
exiting the loop. This helps ScalarEvolution compute trip counts for
loops.

Teach ScalarEvolution to recognize single-value PHIs, when safe, and
ForgetSymbolicName to forget such single-value PHI nodes as apprpriate
in ForgetSymbolicName.

llvm-svn: 97126
2010-02-25 06:57:05 +00:00
Dan Gohman 4b2b48daba Make getTypeSizeInBits work correctly for array types; it should return
the number of value bits, not the number of bits of allocation for in-memory
storage.

Make getTypeStoreSize and getTypeAllocSize work consistently for arrays and
vectors.

Fix several places in CodeGen which compute offsets into in-memory vectors
to use TargetData information.

This fixes PR1784.

llvm-svn: 97064
2010-02-24 22:05:23 +00:00
Daniel Dunbar 4811d004be Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.

llvm-svn: 97040
2010-02-24 17:05:47 +00:00
Dan Gohman 3860521406 When forming SSE min and max nodes for UGE and ULE comparisons, it's
necessary to swap the operands to handle NaN and negative zero properly.

Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.

llvm-svn: 97025
2010-02-24 06:52:40 +00:00
Chris Lattner df8a8a8c6f Change the scheduler from adding nodes in allnodes order
to adding them in a determinstic order (bottom up from 
the root) based on the structure of the graph itself.

This updates tests for some random changes, interesting
bits: CodeGen/Blackfin/promote-logic.ll no longer crashes.
I have no idea why, but that's good right?

CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but
now compiles to have one fewer constant pool entry, making
the expected load that was being folded disappear.  Since it
is an unreduced mass of gnast, I just removed it.

This fixes PR6370

llvm-svn: 97023
2010-02-24 06:11:37 +00:00
Evan Cheng 328a607490 Re-apply 96540 and 96556 with fixes.
llvm-svn: 97011
2010-02-24 01:42:31 +00:00
Jakob Stoklund Olesen a2d8c97b65 DIV8r must define %AX since X86DAGToDAGISel::Select() sometimes uses it
instead of %AL/%AH.

llvm-svn: 97006
2010-02-24 00:39:35 +00:00
Jakob Stoklund Olesen fe0a8cd210 Remember to handle sub-registers when moving imp-defs to a rematted instruction.
llvm-svn: 96995
2010-02-23 22:44:02 +00:00
Jakob Stoklund Olesen 38b76e27a7 Keep track of phi join registers explicitly in LiveVariables.
Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply
defined registers. That doesn't work if the phi join is implicitly defined in
all but one of the predecessors.

llvm-svn: 96994
2010-02-23 22:43:58 +00:00
Evan Cheng 2a33390e2b These should not have been committed.
llvm-svn: 96827
2010-02-22 23:37:48 +00:00
Evan Cheng 3688b8fa68 Instcombine constant folding can normalize gep with negative index to index with large offset. When instcombine objsize checking transformation sees these geps where the offset seemingly point out of bound, it should just return "i don't know" rather than asserting.
llvm-svn: 96825
2010-02-22 23:34:00 +00:00
Dan Gohman 6c5ac6de5c Canonicalize ConstantInts to the right operand of commutative
operators.

The test difference is just due to the multiplication operands
being commuted (and thus requiring a more elaborate match). In
optimized code, that expression would be folded.

llvm-svn: 96816
2010-02-22 22:43:23 +00:00
Dan Gohman be24c455c4 Actually enable the -enable-unsafe-fp-math tests.
llvm-svn: 96796
2010-02-22 18:53:26 +00:00
Arnold Schwaighofer 30ece5b807 Mark the return address stack slot as mutable when moving the return address
during a tail call. A parameter might overwrite this stack slot during the tail
call. 

The sequence during a tail call is:
1.) load return address to temp reg
2.) move parameters (might involve storing to return address stack slot)
3.) store return address to new location from temp reg

If the stack location is marked immutable CodeGen can colocate load (1) with the
store (3).

This fixes bug 6225.

llvm-svn: 96783
2010-02-22 16:18:09 +00:00
Dan Gohman b87de8d30d Remove the logic for reasoning about NaNs from the code that forms
SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.

Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.

llvm-svn: 96775
2010-02-22 04:03:39 +00:00
Chris Lattner 3c29aff9ff fix and un-xfail X86/vec_ss_load_fold.ll
llvm-svn: 96720
2010-02-21 04:53:34 +00:00
Chris Lattner 7d5f4a4c03 temporarily disable this.
llvm-svn: 96717
2010-02-21 03:24:41 +00:00
Dan Gohman 85af256779 Check for overflow when scaling up an add or an addrec for
scaled reuse.

llvm-svn: 96692
2010-02-19 19:32:49 +00:00
Charles Davis 7e47767763 Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.
Also, FileCheck'ize a test.

llvm-svn: 96686
2010-02-19 18:17:13 +00:00
Duncan Sands d0bf6f640f Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96672
2010-02-19 11:30:41 +00:00
Evan Cheng d2d9252f35 Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96640
2010-02-19 00:34:39 +00:00
Dan Gohman 2446f57503 When determining the set of interesting reuse factors, consider
strides in foreign loops. This helps locate reuse opportunities
with existing induction variables in foreign loops and reduces
the need for inserting new ones. This fixes rdar://7657764.

llvm-svn: 96629
2010-02-19 00:05:23 +00:00
Mon P Wang c94892513d getSplatIndex assumes that the first element of the mask contains the splat index
which is not always true if the mask contains undefs. Modified it to return
the first non undef value.

llvm-svn: 96621
2010-02-18 22:33:18 +00:00
Jakob Stoklund Olesen c953acbd7f Always normalize spill weights, also for intervals created by spilling.
Moderate the weight given to very small intervals.

The spill weight given to new intervals created when spilling was not
normalized in the same way as the original spill weights calculated by
CalcSpillWeights. That meant that restored registers would tend to hang around
because they had a much higher spill weight that unspilled registers.

This improves the runtime of a few tests by up to 10%, and there are no
significant regressions.

llvm-svn: 96613
2010-02-18 21:33:05 +00:00
Dan Gohman 5ffef745c2 Make CodePlacementOpt detect special EH control flow by
checking whether AnalyzeBranch disagrees with the CFG
directly, rather than looking for EH_LABEL instructions.
EH_LABEL instructions aren't always at the end of the
block, due to FP_REG_KILL and other things. This fixes
an infinite loop compiling MultiSource/Benchmarks/Bullet.

llvm-svn: 96611
2010-02-18 21:25:53 +00:00
Chris Lattner 6a9bdade29 remove empty file
llvm-svn: 96573
2010-02-18 06:29:06 +00:00
Evan Cheng 0ceb68a552 Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

llvm-svn: 96556
2010-02-18 02:13:50 +00:00
Dan Gohman 104207b4c5 Don't check for comments, which vary between subtargets.
llvm-svn: 96434
2010-02-17 01:08:57 +00:00
Dan Gohman 5f10d6c52c Don't attempt to divide INT_MIN by -1; consider such cases to
have overflowed.

llvm-svn: 96428
2010-02-17 00:41:53 +00:00
Chris Lattner 1fc2773a33 roundss is an sse 4 thing, fix the test on non-sse41 builders
like llvm-gcc-x86_64-darwin10-selfhost

llvm-svn: 96417
2010-02-17 00:29:06 +00:00
Chris Lattner afac7dad21 fix rdar://7653908, a crash on a case where we would fold a load
into a roundss intrinsic, producing a cyclic dag.  The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection.  Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.

llvm-svn: 96408
2010-02-16 22:35:06 +00:00
Chris Lattner c98beb567c filecheckize
llvm-svn: 96404
2010-02-16 22:13:43 +00:00
Evan Cheng 82b04130cb Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).

Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335

llvm-svn: 96389
2010-02-16 21:09:44 +00:00
David Greene 9641d06809 Add support for emitting non-temporal stores for DAGs marked
non-temporal.  Fix from r96241 for botched encoding of MOVNTDQ.

Add documentation for !nontemporal metadata.

Add a simpler movnt testcase.

llvm-svn: 96386
2010-02-16 20:50:18 +00:00
Dan Gohman 521efe68ab Split the main for-each-use loop again, this time for GenerateTruncates,
as it also peeks at which registers are being used by other uses. This
makes LSR less sensitive to use-list order.

llvm-svn: 96308
2010-02-16 01:42:53 +00:00
Jakob Stoklund Olesen 2988d573e5 Fix PR6300.
A virtual register can be used before it is defined in the same MBB if the MBB
is part of a loop. Teach the implicit-def pass about this case.

llvm-svn: 96279
2010-02-15 22:03:29 +00:00
Chris Lattner 3818d9763d remove empty file.
llvm-svn: 96271
2010-02-15 21:14:50 +00:00
Chris Lattner bcbaaba532 revert r96241. It breaks two regression tests, isn't documented,
and the testcase needs improvement.

llvm-svn: 96265
2010-02-15 20:53:01 +00:00
Chris Lattner 6fbfe5897c fix PR6305 by handling BlockAddress in a helper function
called by jump threading.

llvm-svn: 96263
2010-02-15 20:47:49 +00:00
David Greene 63cedef74b Add support for emitting non-temporal stores for DAGs marked
non-temporal.

llvm-svn: 96241
2010-02-15 17:02:56 +00:00
Jakob Stoklund Olesen b659c76c77 Fix PR6283.
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.

Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.

llvm-svn: 96072
2010-02-13 02:06:10 +00:00
Bob Wilson 01abf8fc2f Besides removing phi cycles that reduce to a single value, also remove dead
phi cycles.  Adjust a few tests to keep dead instructions from being optimized
away.  This (together with my previous change for phi cycles) fixes Apple
radar 7627077.

llvm-svn: 96057
2010-02-13 00:31:44 +00:00
Anton Korobeynikov b9ce3cc458 Testcases for recent stdcall / fastcall mangling improvements
llvm-svn: 95982
2010-02-12 15:29:13 +00:00
Anton Korobeynikov c9276dfe04 Cleanup stdcall / fastcall name mangling.
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

llvm-svn: 95980
2010-02-12 15:28:40 +00:00
Dan Gohman 45774ce0ad Reapply the new LoopStrengthReduction code, with compile time and
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.

llvm-svn: 95975
2010-02-12 10:34:29 +00:00
Jakob Stoklund Olesen 93c92225af Reapply coalescer fix for better cross-class coalescing.
This time with fixed test cases.

llvm-svn: 95938
2010-02-11 23:55:29 +00:00
Mon P Wang 5b77f0dac1 The previous fix of widening divides that trap was too fragile as it depends on custom
lowering and requires that certain types exist in ValueTypes.h.  Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements.  It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.

llvm-svn: 95823
2010-02-10 23:37:45 +00:00
Bob Wilson 0f52d0c074 Delete dead PHI machine instructions. These can be created due to type
legalization even when the IR-level optimizer has removed dead phis, such
as when the high half of an i64 value is unused on a 32-bit target.
I had to adjust a few test cases that had dead phis.
This is a partial fix for Radar 7627077.

llvm-svn: 95816
2010-02-10 22:58:57 +00:00
Evan Cheng 29b8f554fc Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.
llvm-svn: 95757
2010-02-10 02:17:34 +00:00
Chris Lattner 78360a8184 move tests that depend on the x86 backend out of codegen/generic,
and remove a few old and unreduced ones.  Fixes PR5624. 

llvm-svn: 95656
2010-02-09 06:41:03 +00:00
Chris Lattner 933509287b merge a target-specific add test into x86 directory.
llvm-svn: 95654
2010-02-09 06:35:50 +00:00
Chris Lattner 015ecd85d4 merge another test in, drop the trivially constant folded cases.
llvm-svn: 95653
2010-02-09 06:33:27 +00:00
Chris Lattner c77b9eb31c consolidate and filecheckize two tests.
llvm-svn: 95652
2010-02-09 06:24:00 +00:00
Chris Lattner b6b2164e28 add an x86 implementation of MCTargetExpr for
representing @GOT and friends.  Use it for
personality references as a first use.

llvm-svn: 95588
2010-02-08 22:09:08 +00:00
Dan Gohman 4268d6a7c3 When CodeGen'ing unoptimized code, there may be unfolded constant expressions
in global initializers. Instead of aborting, attempt to fold them on the
spot. If folding succeeds, emit the folded expression instead.

This fixes PR6255.

llvm-svn: 95583
2010-02-08 22:02:38 +00:00
Dan Gohman bd374da130 In guaranteed tailcall mode, don't decline the tailcall optimization
for blocks ending in "unreachable".

llvm-svn: 95565
2010-02-08 20:34:14 +00:00
Evan Cheng ea5c6be766 Run codegen dce pass for all targets at all optimization levels. Previously it's
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.

llvm-svn: 95493
2010-02-06 09:07:11 +00:00
Evan Cheng c72f7882c0 Remove a large test case that (soon will) no longer make sense.
llvm-svn: 95492
2010-02-06 09:00:30 +00:00
Evan Cheng d064aefefc Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments.
llvm-svn: 95475
2010-02-06 03:28:46 +00:00
Jakob Stoklund Olesen 5f9ead2714 Don't unroll loops containing function calls.
llvm-svn: 95454
2010-02-05 23:21:31 +00:00
Evan Cheng c8b4db77be Fix test.
llvm-svn: 95373
2010-02-05 06:37:00 +00:00
Evan Cheng a366c61f77 Handle tail call with byval arguments.
llvm-svn: 95351
2010-02-05 02:21:12 +00:00
Evan Cheng 3b245876c0 When the scheduler unfold a load folding instruction it move some of the predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit.
rdar://7604000

llvm-svn: 95339
2010-02-05 01:27:11 +00:00
Jakob Stoklund Olesen c7c89b8325 Fix small bug in handling instructions with more than one implicitly defined operand.
ProcessImplicitDefs would only mark one operand per instruction with <undef>.
This fixed PR6086.

llvm-svn: 95319
2010-02-04 18:46:28 +00:00
Evan Cheng aeba2250a5 Re-enable x86 tail call optimization.
llvm-svn: 95295
2010-02-04 06:47:24 +00:00
Evan Cheng f4139067ee Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.
llvm-svn: 95259
2010-02-03 21:40:40 +00:00
Evan Cheng 112a871fe2 Make test less fragile
llvm-svn: 95258
2010-02-03 21:39:04 +00:00
Evan Cheng 27a41d5473 Revert 94937 and move the noreturn check to codegen.
llvm-svn: 95198
2010-02-03 03:55:59 +00:00
Evan Cheng 40905b4302 Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
llvm-svn: 95195
2010-02-03 03:28:02 +00:00
Dale Johannesen a466692552 Reapply 95050 with a tweak to check the register class.
llvm-svn: 95183
2010-02-03 01:40:33 +00:00
Chris Lattner dee74e2805 make these less sensitive to asm verbose changes by disabling it for them.
llvm-svn: 95175
2010-02-03 00:48:53 +00:00
Dale Johannesen da431c76fb Test revert 95050; there's a good chance it's causing
buildbot failure.

llvm-svn: 95103
2010-02-02 18:52:56 +00:00
Evan Cheng 55afd2564c Perform sibcall in some cases when arguments are passes memory. Look for cases
where callee's arguments are already in the caller's own caller's stack and
they line up perfectly. e.g.

extern int foo(int a, int b, int c);

int bar(int a, int b, int c) {
  return foo(a, b, c);
}

llvm-svn: 95053
2010-02-02 02:22:50 +00:00
Dale Johannesen c84816a62e Make local RA smarter about reusing input register of a copy
as output.  Needed for (functional) correctness in inline asm,
and should be generally beneficial.  7361612.

llvm-svn: 95050
2010-02-02 02:08:02 +00:00
Evan Cheng a49d8e6d38 Fix PR6196. GV callee may not be a function.
llvm-svn: 95017
2010-02-01 22:40:09 +00:00
Dan Gohman 36bca4e4ba Update this test for a trivial register allocation difference.
llvm-svn: 94989
2010-02-01 19:00:32 +00:00
Evan Cheng ed8ca56eeb Undo r94946 now all the tests are passing again.
llvm-svn: 94970
2010-02-01 02:13:39 +00:00
Evan Cheng 7f62def0f9 Avoid recursive sibcall's.
llvm-svn: 94946
2010-01-31 06:44:49 +00:00
Evan Cheng 70f714fdbe Allow more tailcall optimization: calls with inputs that are all passed in registers.
llvm-svn: 94873
2010-01-30 01:22:00 +00:00
Evan Cheng 297a494f55 Catch more trivial tail call opportunities: no inputs and output types match.
llvm-svn: 94804
2010-01-29 06:45:59 +00:00
Evan Cheng 346af88396 Fix a bug introduced by r94490 where it created a X86ISD::CMP whose output type is different from its inputs.
This fixes PR6146.

llvm-svn: 94731
2010-01-28 01:57:22 +00:00
Chris Lattner 565896b9eb emit a 0 byte instead of a noop if a function is empty on darwin.
"0" is nice and target independent.

llvm-svn: 94718
2010-01-28 01:06:32 +00:00
Chandler Carruth 4fe7a3bc08 Quick fix to a test that is currently failing on every Linux build bot. No idea
if this is the "correct" fix, but it seems a strict improvement.

llvm-svn: 94675
2010-01-27 10:36:15 +00:00
Evan Cheng 85476f304c Perform trivial tail call optimization for callees with "C" ABI. These are done
even when -tailcallopt is not specified and it does not require changing ABI.
First case is the most trivial one. Perform tail call optimization when both
the caller and callee do not return values and when the callee does not take
any input arguments.

llvm-svn: 94664
2010-01-27 06:25:16 +00:00
Chris Lattner b657c4cdc3 emit jump table an alias ".set" directives through MCStreamer as
assignments.

.set x, a-b

is the same as:

x = a-b

llvm-svn: 94596
2010-01-26 21:53:08 +00:00
Chris Lattner 3dd38a8112 eliminate MCAsmInfo::NeedsSet: we now just use .set on any platform
that has it.

llvm-svn: 94581
2010-01-26 20:20:43 +00:00
Evan Cheng 555f61bf58 Implement cond ? -1 : 0 with sbb.
llvm-svn: 94490
2010-01-26 02:00:44 +00:00
Chris Lattner 9b83727cfe we removed support for darwin8 tools.
llvm-svn: 94414
2010-01-25 07:43:40 +00:00
Mon P Wang 4f45512c23 It seems better to scalarize vectors of size 1 instead of widening them.
Add support to widen SETCC.

llvm-svn: 94342
2010-01-24 00:24:43 +00:00
Mon P Wang 586d997e98 Improved widening loads by adding support for wider loads if
the alignment allows.  Fixed a bug where we didn't use a
vector load/store for PR5626.

llvm-svn: 94338
2010-01-24 00:05:03 +00:00
Chris Lattner d1acffc845 Change constantexpr global variable initializers to convert the constants
to MCExpr then emit them through MCStreamer with EmitValue.  I think all
global variable initializers are now going through mcstreamer.

llvm-svn: 94293
2010-01-23 06:17:14 +00:00
Eric Christopher c1451d764f Don't lower splat vector load to relative to the esp if the
stack may be misaligned.

Update test accordingly.

Patch by Evan Cheng!

llvm-svn: 94291
2010-01-23 06:02:43 +00:00
Chris Lattner 68eeb5ec9c emit .ascii and .asciz through MCStreamer.
llvm-svn: 94282
2010-01-23 04:54:10 +00:00
Evan Cheng e1b8b5a01b Fix tests.
llvm-svn: 94271
2010-01-23 01:19:28 +00:00
Chris Lattner 88b8b1b419 make this less constrained, we want blank lines between globals.
llvm-svn: 94201
2010-01-22 19:51:08 +00:00
Dan Gohman 045f81981a Revert LoopStrengthReduce.cpp to pre-r94061 for now.
llvm-svn: 94123
2010-01-22 00:46:49 +00:00
Dan Gohman 51ad99d2c5 Re-implement the main strength-reduction portion of LoopStrengthReduction.
This new version is much more aggressive about doing "full" reduction in
cases where it reduces register pressure, and also more aggressive about
rewriting induction variables to count down (or up) to zero when doing so
reduces register pressure.

It currently uses fairly simplistic algorithms for finding reuse
opportunities, but it introduces a new framework allows it to combine
multiple strategies at once to form hybrid solutions, instead of doing
all full-reduction or all base+index.

llvm-svn: 94061
2010-01-21 02:09:26 +00:00
Chris Lattner f8dcf784a7 emit basic block labels with mcstreamer.
llvm-svn: 93993
2010-01-20 07:24:05 +00:00
Chris Lattner 4c8b1824f0 emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1,
for tidiness.

llvm-svn: 93992
2010-01-20 07:19:19 +00:00
Chris Lattner 03cb2a3035 signficant cleanups to EmitGlobalConstant (including streamerization
of int initializers), change some methods to be static functions,
use raw_ostream::write_hex instead of a smallstring dance with 
APValue::toStringUnsigned(S, 16).

llvm-svn: 93991
2010-01-20 07:11:32 +00:00
Dan Gohman 954f49014d Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some code
that SCEVExpander can produce when running on behalf of LSR.

llvm-svn: 93949
2010-01-19 23:30:49 +00:00
Dan Gohman 221708d826 Make SCEVAddRecExpr's getType return a pointer type when the add
has a pointer member. This helps reduce unnecessary bitcasting
and uglygeps.

llvm-svn: 93939
2010-01-19 22:53:50 +00:00
Dan Gohman fb9bea7150 Add nounwinds.
llvm-svn: 93919
2010-01-19 21:51:51 +00:00
Evan Cheng bf43525a29 Do not extend extension results beyond the use of a PHI instruction at the start of a use block. A PHI use is expected to kill its source values.
llvm-svn: 93895
2010-01-19 19:45:51 +00:00
Chris Lattner a6368219ac don't let asm-verbose break the check-next lines in these tests.
llvm-svn: 93869
2010-01-19 06:39:54 +00:00
Chris Lattner a986aa33eb fix a significant difference between llvm and gcc on ELF systems:
GCC would put weak zero initialized mutable data in the .bss section,
we would put it into a crasy '.gnu.linkonce.b.test,"aw",@nobits' 
section.  Fixing this will allow simplifications next up.

llvm-svn: 93844
2010-01-19 03:06:01 +00:00
Chris Lattner 024734e0f0 there is no need to emit a .section above .comm on linux.
llvm-svn: 93842
2010-01-19 02:46:56 +00:00
Evan Cheng 88b65bc835 Canonicalize -1 - x to ~x.
Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore:
  %t1 = sub i32 0, %a
  %t2 = add i32 %t1, -1
The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A
will fold it to -1 - %a.

llvm-svn: 93773
2010-01-18 21:38:44 +00:00
Chris Lattner 387c6b20cd reduce this test and convert to filecheck, hopefully the linux buildbot
will tell me something more useful.

llvm-svn: 93688
2010-01-17 19:09:12 +00:00
Kenneth Uildriks dd6ddd1aeb When checking for sret-demotion, it needs to use legal types. When using the return value of an sret-demoted call, it needs to use possibly illegal types that match the declared Type of the callee.
llvm-svn: 93667
2010-01-16 23:37:33 +00:00
Chris Lattner 08eff61eeb this teestcase takes a long time to crash, remove it. If someone cares about this, they should file a bug, it's not doing any good as an xfail.
llvm-svn: 93604
2010-01-16 00:53:22 +00:00
David Greene b0c0e6433f Fix PR6019. A load has more than one use if it feeds a bitconvert that
has more than one use.

llvm-svn: 93576
2010-01-15 23:23:41 +00:00
Dan Gohman dd5286dc63 Fix a codegen abort seen in 483.xalancbmk.
llvm-svn: 93417
2010-01-14 03:08:49 +00:00
Chris Lattner fb40a8e5f1 this test requires SSE, thanks to jyasskin for pointing this out.
llvm-svn: 93360
2010-01-13 21:51:41 +00:00
Evan Cheng af0ad65ff2 Commit some changes I had managed to lose last night while refactoring the code. Avoid change use of PHI instructions because it's not legal to insert any instructions before them.
This fixes PR6027.

llvm-svn: 93335
2010-01-13 19:16:39 +00:00
Evan Cheng b5499d09d1 Re-enable extension optimization pass.
llvm-svn: 93313
2010-01-13 08:45:40 +00:00
Evan Cheng d7d8f6d000 Disable opt-ext pass to unbreak the build for now.
llvm-svn: 93286
2010-01-13 01:51:43 +00:00
Jeffrey Yasskin 0ad23efb0f Try to fix the ARM and PPC buildbots. The -mattr=vector-unaligned-mem
flag doesn't exist there, and this is an x86 test.

llvm-svn: 93279
2010-01-13 00:31:43 +00:00
Evan Cheng 30bebff456 Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.

llvm-svn: 93278
2010-01-13 00:30:23 +00:00
Evan Cheng 0e9189371f Add nounwind.
llvm-svn: 93244
2010-01-12 18:29:23 +00:00
Duncan Sands b7168c270e Revert commit 93204, since it causes the assembler to barf
on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix

llvm-svn: 93242
2010-01-12 17:46:16 +00:00
Dan Gohman 9059833de6 Make several tests less fragile.
llvm-svn: 93230
2010-01-12 04:52:47 +00:00
Dan Gohman c119580307 Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS.
llvm-svn: 93229
2010-01-12 04:42:54 +00:00
Evan Cheng 42b07e9600 Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191.
llvm-svn: 93204
2010-01-11 22:59:27 +00:00
Evan Cheng 99789a7a76 Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
llvm-svn: 93191
2010-01-11 22:03:29 +00:00
Chris Lattner f0d26d4b74 reduce this to a sensible testcase.
llvm-svn: 93189
2010-01-11 21:58:19 +00:00
David Greene eb103c404b Shorten up this testcase.
llvm-svn: 93187
2010-01-11 21:50:35 +00:00
Evan Cheng 7bdf339602 Revert 93158. It's breaking quite a few x86_64 tests.
llvm-svn: 93185
2010-01-11 21:13:41 +00:00
Jakob Stoklund Olesen d2a1bee2d4 Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND was constant folded.
This fixes PR5980.

llvm-svn: 93184
2010-01-11 21:02:33 +00:00
Dan Gohman e99a3c191e Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.

FileCheckize, tidy, and extend a testcase to cover this case.

This fixes rdar://7527390.

llvm-svn: 93160
2010-01-11 17:58:34 +00:00
Dan Gohman 3a55686345 Re-instate MOV64r0 and MOV16r0, with adjustments to work with the
new AsmPrinter. This is perhaps less elegant than describing them
in terms of MOV32r0 and subreg operations, but it allows the
current register to rematerialize them.

llvm-svn: 93158
2010-01-11 17:37:57 +00:00
Dan Gohman 31e8637ac2 Generalize this check to avoid depending on a specific register assignment.
llvm-svn: 93157
2010-01-11 17:24:27 +00:00
Dan Gohman 355ebc7f58 Make this test less trivial, to avoid spurious failures.
llvm-svn: 93156
2010-01-11 17:23:56 +00:00
Evan Cheng 64d9f40557 Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed.
llvm-svn: 93152
2010-01-11 17:03:47 +00:00
David Greene 206351a1ff Implement a feature (-vector-unaligned-mem) to allow targets to
ignore alignment requirements for SIMD memory operands.  This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.

llvm-svn: 93151
2010-01-11 16:29:42 +00:00
Jeffrey Yasskin bb857e5d68 Fix http://llvm.org/PR5729: x86-64 tail calls were putting their targets into
R11, and then asserting that the target was in R9.  Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.

llvm-svn: 93065
2010-01-09 18:56:43 +00:00
Dan Gohman 6bd3ef82ff Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.

Also, fix some more issues with legalization of vector casts.

llvm-svn: 93043
2010-01-09 02:13:55 +00:00
Evan Cheng cc6d56bd3b Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock.
llvm-svn: 93028
2010-01-08 23:41:50 +00:00
Evan Cheng 58ec4fec88 ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced. Do not delete dead nodes again.
llvm-svn: 92988
2010-01-08 02:36:12 +00:00
Chris Lattner dab2cd543f Fix rdar://7517201, a regression introduced by r92849.
When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.

This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.

llvm-svn: 92950
2010-01-07 21:59:23 +00:00
Evan Cheng 90dc43fcf5 Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates.
llvm-svn: 92885
2010-01-07 00:54:06 +00:00
Evan Cheng 166a4e6caa Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))

Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.

This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.

llvm-svn: 92849
2010-01-06 19:38:29 +00:00
Dan Gohman f34b289057 Move this test from test/Transforms/IndVarSimplify to
test/CodeGen/X86, as doesn't use -indvars, and it does use
llc -march=x86-64.

llvm-svn: 92799
2010-01-05 22:52:54 +00:00
Bill Wendling 03f0af372c Don't assign the shift the same type as the variable being shifted. This could
result in illegal types for the SHL operator.

llvm-svn: 92797
2010-01-05 22:39:10 +00:00
Dan Gohman fb4193625a Delete useless trailing semicolons.
llvm-svn: 92740
2010-01-05 17:55:26 +00:00
Dan Gohman 8c63ee7e28 Make this test more portable.
llvm-svn: 92514
2010-01-04 21:23:34 +00:00
Dan Gohman 52183c3cc9 Add some tests and update an existing test to reflect recent
x86 isel peeps.

llvm-svn: 92509
2010-01-04 20:53:54 +00:00
Chris Lattner 1dae8766b1 fix PR5930, allowing the asmprinter to emit difference between
two labels as a truncate.

llvm-svn: 92455
2010-01-03 18:33:18 +00:00
Chris Lattner f6a585fc2f add PR#
llvm-svn: 92451
2010-01-03 18:10:58 +00:00
Chris Lattner a7cfc43af8 differences between two blockaddress's don't cause a
global variable initializer to require relocations.

llvm-svn: 92450
2010-01-03 18:09:40 +00:00
Chris Lattner 909c71c96a allow this to work on linux hosts.
llvm-svn: 92407
2010-01-02 00:22:15 +00:00
Chris Lattner 1eea3b0ada Teach codegen to handle:
(X != null) | (Y != null) --> (X|Y) != 0
 (X == null) & (Y == null) --> (X|Y) == 0

so that instcombine can stop doing this for pointers.  This is part of PR3351,
which is a case where instcombine doing this for pointers (inserting ptrtoint)
is pessimizing code.

llvm-svn: 92406
2010-01-02 00:00:03 +00:00
Chris Lattner 6eef072eb6 rename file.
llvm-svn: 92405
2010-01-01 23:55:04 +00:00
Chris Lattner 39f18e545e Teach codegen to lower llvm.powi to an efficient (but not optimal)
multiply sequence when the power is a constant integer.  Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.

This should also make many gfortran programs happier I'd imagine.

llvm-svn: 92388
2010-01-01 03:32:16 +00:00
Chris Lattner f5e3ed64d5 handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a
compare.  On other targets we end up with a call to memcmp because we don't
want 16 individual byte loads.  We should be able to use movups as well, but
we're failing to select the generated icmp.

llvm-svn: 92107
2009-12-24 01:07:17 +00:00
Chris Lattner 1a32ede6fd move an optimization for memcmp out of simplifylibcalls and into
SDISel.  This optimization was causing simplifylibcalls to 
introduce type-unsafe nastiness.  This is the first step, I'll be 
expanding the memcmp optimizations shortly, covering things that
we really really wouldn't want simplifylibcalls to do.

llvm-svn: 92098
2009-12-24 00:37:38 +00:00
Eric Christopher fdb33458fc Update objectsize intrinsic and associated dependencies. Fix
lowering code and update testcases.

llvm-svn: 91979
2009-12-23 02:51:48 +00:00
Evan Cheng 71d7eaa87e Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
llvm-svn: 91910
2009-12-22 17:47:23 +00:00
Evan Cheng b175de6356 Increase opportunities to optimize (brcond (srl (and c1), c2)).
llvm-svn: 91717
2009-12-18 21:31:31 +00:00
Evan Cheng 4cf30b72bf On recent Intel u-arch's, folding loads into some unary SSE instructions can
be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.

movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0

instead of
cvtss2sd (%rdi), %xmm0

An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0

llvm-svn: 91672
2009-12-18 07:40:29 +00:00
Dan Gohman 51fbfb726f Tidy up this testcase and add test for tailcall optimization
with unreachable.

llvm-svn: 91650
2009-12-18 01:05:06 +00:00
Dan Gohman 7f4326f8b6 Remove "tail" keywords. These calls are not intended to be tail calls.
This protects this test from depending on codegen not performing the
tail call optimization by default.

llvm-svn: 91648
2009-12-18 01:02:18 +00:00
Sean Callanan 04d8cb74f3 Instruction fixes, added instructions, and AsmString changes in the
X86 instruction tables.

Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.

This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.

* X86*.td
	Removed tabs and fixed 80-line violations

* X86Instr64bit.td
	(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
		Added
	(CALL, CMOV) Added qualifiers
	(JMP) Added PC-relative jump instruction
	(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
		that it is 64-bit only (ambiguous since it has no
		REX prefix)
	(MOV) Added rr form going the other way, which is encoded
		differently
	(MOV) Changed immediates to offsets, which is more correct;
		also fixed MOV64o64a to have to a 64-bit offset
	(MOV) Fixed qualifiers
	(MOV) Added debug-register and condition-register moves
	(MOVZX) Added more forms
	(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
		(as with MOV) are encoded differently
	(ROL) Made REX.W required
	(BT) Uncommented mr form for disassembly only
	(CVT__2__) Added several missing non-intrinsic forms
	(LXADD, XCHG) Reordered operands to make more sense for
		MRMSrcMem
	(XCHG) Added register-to-register forms
	(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
	(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
		Added
* X86InstrFPStack.td
	(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
	 FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
	 FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
	 FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
	 FXRSTOR)
		Added
	(FCOM, FCOMP) Added qualifiers
	(FSTENV, FSAVE, FSTSW) Fixed opcode names
	(FNSTSW) Added implicit register operand
* X86InstrInfo.td
	(opaque512mem) Added for FXSAVE/FXRSTOR
	(offset8, offset16, offset32, offset64) Added for MOV
	(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
	 LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
	 LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
	 LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
	 CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
	 SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
	 VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
	 VMWRITE, VMXOFF, VMXON) Added
	(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
	(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
	 JGE, JLE, JG, JCXZ) Added 32-bit forms
	(MOV) Changed some immediate forms to offset forms
	(MOV) Added reversed reg-reg forms, which are encoded
		differently
	(MOV) Added debug-register and condition-register moves
	(CMOV) Added qualifiers
	(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
	(BT) Uncommented memory-register forms for disassembler
	(MOVSX, MOVZX) Added forms
	(XCHG, LXADD) Made operand order make sense for MRMSrcMem
	(XCHG) Added register-register forms
	(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
	(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
	change

* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
  qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier

llvm-svn: 91638
2009-12-18 00:01:26 +00:00
Evan Cheng 1be6286028 Re-enable 91381 with fixes.
llvm-svn: 91489
2009-12-16 00:53:11 +00:00
Dale Johannesen 56f041406d Do better with physical reg operands (typically, from inline asm)
in local register allocator.  If a reg-reg copy has a phys reg
input and a virt reg output, and this is the last use of the phys
reg, assign the phys reg to the virt reg.  If a reg-reg copy has
a phys reg output and we need to reload its spilled input, reload
it directly into the phys reg than passing it through another reg.

Following 76208, there is sometimes no dependency between the def of
a phys reg and its use; this creates a window where that phys reg
can be used for spilling (this is true in linear scan also).  This
is bad and needs to be fixed a better way, although 76208 works too
well in practice to be reverted.  However, there should normally be
no spilling within inline asm blocks.  The patch here goes a long way
towards making this actually be true.

llvm-svn: 91485
2009-12-16 00:29:41 +00:00
Kenneth Uildriks 792f0913ee For fastcc on x86, let ECX be used as a return register after EAX and EDX
llvm-svn: 91410
2009-12-15 03:27:52 +00:00
Evan Cheng fcb5453dc7 Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
llvm-svn: 91405
2009-12-15 03:07:11 +00:00
Evan Cheng 852c486946 Make 91378 more conservative.
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.

llvm-svn: 91399
2009-12-15 03:00:32 +00:00
Evan Cheng 0e8b9e32d1 Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
llvm-svn: 91381
2009-12-15 00:53:42 +00:00
Evan Cheng ca7c690d3b Propagate zest through logical shift.
llvm-svn: 91378
2009-12-15 00:41:36 +00:00
Dan Gohman cecad35728 Fix integer cast code to handle vector types.
llvm-svn: 91362
2009-12-14 23:40:38 +00:00
Evan Cheng 26fdd7265b Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
llvm-svn: 91223
2009-12-12 20:03:14 +00:00
Dan Gohman 1d459e4937 Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
llvm-svn: 91158
2009-12-11 21:31:27 +00:00
Dan Gohman bffa061e02 Change this to the correct PR number.
llvm-svn: 91148
2009-12-11 20:09:21 +00:00
Dan Gohman 6d306bb32b Fix the result type of SELECT nodes lowered from Select instructions with
aggregate return values. This fixes PR5754.

llvm-svn: 91145
2009-12-11 19:50:50 +00:00
Anton Korobeynikov fc51282cbe Honour setHasCalls() set from isel.
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

llvm-svn: 91144
2009-12-11 19:39:55 +00:00