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9 Commits

Author SHA1 Message Date
Chris Lattner 94656b1c8c fix the buildvector->insertp[sd] logic to not always create a redundant 
insertp[sd] $0, which is a noop.  Before:

_f32:                                   ## @f32
	pshufd	$1, %xmm1, %xmm2
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm2, %xmm3
	addss	%xmm1, %xmm0
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
	insertps	$0, %xmm0, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

after:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movdqa	%xmm2, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

The extra movs are due to a random (poor) scheduling decision.

llvm-svn: 112379
 2010-08-28 17:59:08 +00:00
Evan Cheng c893115312 Re-enable the test with fix. 
llvm-svn: 108319
 2010-07-14 05:49:23 +00:00
Chris Lattner 711338fb04 temporarily disable to test to fix buildbots. 
llvm-svn: 108310
 2010-07-14 02:21:59 +00:00
Evan Cheng d542414945 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. 
llvm-svn: 108304
 2010-07-14 01:22:19 +00:00
Evan Cheng 7b4a1a221b Try trivial remat before the coalescer gives up on a vr / physreg coalescing for fear of tying up a physical register. 
llvm-svn: 99575
 2010-03-26 00:07:25 +00:00
Chris Lattner 4690af8567 Make the NDEBUG assertion stronger and more clear what is 
happening.

Enhance scheduling to set the DEAD flag on implicit defs
more aggressively.  Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use.  Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.

This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more 
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.

Talking to codegen folks about both these issues, but I need
this patch in in the meantime.

llvm-svn: 99485
 2010-03-25 05:40:48 +00:00
Dan Gohman 355ebc7f58 Make this test less trivial, to avoid spurious failures. 
llvm-svn: 93156
 2010-01-11 17:23:56 +00:00
Dan Gohman 40503396da Eliminate more uses of llvm-as and llvm-dis. 
llvm-svn: 81290
 2009-09-08 23:54:48 +00:00
Evan Cheng 8d0b4d4fd6 MachineLICM CSE should match destination register classes; avoid hoisting implicit_def's. 
llvm-svn: 65592
 2009-02-27 00:02:22 +00:00