Chris Lattner
f0f438a517
remove MachineOpCode typedef.
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llvm-svn: 45679
2008-01-07 02:48:55 +00:00
Owen Anderson
2a3be7bb6c
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner
b0fb17fd34
Fix a bug in my previous patch: refer to the impl not the pure virtual version. It's unclear why gcc would ever compile this...
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llvm-svn: 45476
2008-01-01 01:05:34 +00:00
Chris Lattner
25568e4cef
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
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a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
Owen Anderson
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
6005589faf
More cleanups for MachineOperand:
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- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h
llvm-svn: 45461
2007-12-30 21:56:09 +00:00
Chris Lattner
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
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llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Owen Anderson
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
Dale Johannesen
c68554683d
Handle blocks with 2 unconditional branches in AnalyzeBranch.
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llvm-svn: 37571
2007-06-13 17:59:52 +00:00
Evan Cheng
5514bbef46
Add a utility routine to check for unpredicated terminator instruction.
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llvm-svn: 37528
2007-06-08 21:59:56 +00:00
Evan Cheng
fc94eb66d2
BlockHasNoFallThrough() now returns true if block ends with a return instruction.
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llvm-svn: 37266
2007-05-21 18:44:17 +00:00
Evan Cheng
99be49dd9b
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
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llvm-svn: 37192
2007-05-18 00:05:48 +00:00
Evan Cheng
8cd224e81c
Relex assertions to account for additional implicit def / use operands.
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llvm-svn: 36430
2007-04-25 07:12:14 +00:00
Bill Wendling
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
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llvm-svn: 32333
2006-12-07 22:21:48 +00:00
Evan Cheng
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Chris Lattner
be9377a1e3
convert PPC::BCC to use the 'pred' operand instead of separate predicate
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value and CR reg #. This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(
llvm-svn: 31835
2006-11-17 22:37:34 +00:00
Chris Lattner
e0263794f4
rename PPC::COND_BRANCH to PPC::BCC
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llvm-svn: 31834
2006-11-17 22:14:47 +00:00
Chris Lattner
8c6a41ea12
start using PPC predicates more consistently.
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llvm-svn: 31833
2006-11-17 22:10:59 +00:00
Evan Cheng
dc2c8748a7
Properly transfer kill / dead info.
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llvm-svn: 31765
2006-11-15 20:58:11 +00:00
Evan Cheng
dbd3d294e6
Matches MachineInstr changes.
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llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Chris Lattner
113f7470e6
implement the BlockHasNoFallThrough hook
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llvm-svn: 31264
2006-10-28 17:35:02 +00:00
Chris Lattner
23f22de26f
Implement support for branch reversal, fix a bug in branch analysis.
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This provides stuff like:
cmpw cr0, r15, r29
mr r14, r15
- bge cr0, LBB3_111 ;bb656
- b LBB3_90 ;bb501
+ blt cr0, LBB3_90 ;bb501
LBB3_111: ;bb656
lwz r18, 68(r1)
which is particularly good for dispatch group formation.
llvm-svn: 31101
2006-10-21 06:03:11 +00:00
Chris Lattner
d881660366
Simplify code, no functionality change
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llvm-svn: 31097
2006-10-21 05:42:09 +00:00
Chris Lattner
94e04442eb
implement support for inserting a cond branch
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llvm-svn: 31096
2006-10-21 05:36:13 +00:00
Chris Lattner
a61f0105bd
add support for inserting an uncond branch
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llvm-svn: 31003
2006-10-17 18:06:55 +00:00
Chris Lattner
a47294ed7a
implement branch inspection/modification methods.
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llvm-svn: 30946
2006-10-13 21:21:17 +00:00
Chris Lattner
71227c23b1
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
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llvm-svn: 29096
2006-07-11 00:48:23 +00:00
Chris Lattner
52a956da52
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
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llvm-svn: 28889
2006-06-20 23:18:58 +00:00
Chris Lattner
49cadab385
Implement the getPointerRegClass method, which is required for the ptr_rc
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magic to work.
llvm-svn: 28847
2006-06-17 00:01:04 +00:00
Chris Lattner
10d6341618
Move some methods out of MachineInstr into MachineOperand
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llvm-svn: 28102
2006-05-04 17:52:23 +00:00
Chris Lattner
91400bd413
teach the ppc backend how to spill/reload vector regs
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llvm-svn: 26806
2006-03-16 22:24:02 +00:00
Chris Lattner
fd9f3e8ed3
Add support for copying registers. still needed: spilling and reloading them
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llvm-svn: 26800
2006-03-16 20:03:58 +00:00
Chris Lattner
ea79d9fd73
implement TII::insertNoop
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llvm-svn: 26562
2006-03-05 23:49:55 +00:00
Nate Begeman
4efb328926
add 64b gpr store to the possible list of isStoreToStackSlot opcodes.
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llvm-svn: 25916
2006-02-02 21:07:50 +00:00
Chris Lattner
c327d71e06
implement isStoreToStackSlot for PPC
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llvm-svn: 25914
2006-02-02 20:16:12 +00:00
Chris Lattner
bb53acd03c
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Chris Lattner
5f37623218
teach ppc backend these are copies
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llvm-svn: 23813
2005-10-19 01:50:36 +00:00
Nate Begeman
0b71e007ef
First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
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purely mechanical.
llvm-svn: 23778
2005-10-18 00:28:58 +00:00
Nate Begeman
6cca84e43c
More PPC32 -> PPC changes, as well as merging some classes that were
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redundant after the change.
llvm-svn: 23759
2005-10-16 05:39:50 +00:00
Chris Lattner
6f3b954662
Rename PPC32*.h to PPC*.h
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This completes the grand PPC file renaming
llvm-svn: 23745
2005-10-14 23:59:06 +00:00