Commit Graph

375797 Commits

Author SHA1 Message Date
Chris Morin 2c8f5bd539 [MLIR] Make ComplexType buildable if its element type is buildable
If a ComplexType's element type is buildable, then that ComplexType should be
buildable. This is accomplished by the introduction of a new ODS class called
`SameBuildabilityAs`. This can be used by other types that are conditionally
buildable.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D93892
2020-12-29 23:31:42 +00:00
LLVM GN Syncbot 92207b2cce [gn build] Port 21314940c4 2020-12-29 23:18:48 +00:00
Yuanfang Chen 21314940c4 Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline"
This reverts commit 94427af60c (relands
4646de5d75 with fix).

Use "return std::move(AsmStreamer);" instead of "return AsmStreamer;" in
LVMTargetMachine::createMCStreamer. Unlike Clang, GCC seems having trouble
inserting a implicit lvalue->rvalue conversion.
2020-12-29 15:17:23 -08:00
Haowei Wu fddb417449 [llvm-elfabi] Add flag to preserve timestamp when output is the same
This change adds '--write-if-changed' flag to llvm-elfabi tool. When
enabled, llvm-elfabi will not overwrite the existing file if the
content of the file will not be changed, which preserves the
timestamp.

Differential Revision: https://reviews.llvm.org/D92902
2020-12-29 14:43:47 -08:00
Peter Collingbourne 7e5a187de3 CrashReason: Add MTE tag check faults to the list of crash reasons.
As of Linux 5.10, the kernel may report either of the two following
crash reasons:
- SEGV_MTEAERR: async MTE tag check fault
- SEGV_MTESERR: sync MTE tag check fault

Teach LLDB about them.

Differential Revision: https://reviews.llvm.org/D93495
2020-12-29 14:36:50 -08:00
Jacques Pienaar 5fd2b3a124 [mlir] Add error message when failing to add pass
Ran into failure without any error message previously here.

Differential Revision: https://reviews.llvm.org/D93910
2020-12-29 14:20:19 -08:00
Siddharth Krishna 14056c88d6 [mlir][Python] Add an Operation.name property
Reviewed By: stellaraccident, mehdi_amini

Differential Revision: https://reviews.llvm.org/D93474
2020-12-29 14:14:32 -08:00
Stella Laurenzo f5665a2486 [mlir][python] Add Operation.verify().
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D93913
2020-12-29 14:10:31 -08:00
Vitaly Buka 3c0d36f977 [NFC][lsan] Add nested leak in test 2020-12-29 14:01:43 -08:00
Vitaly Buka ababeca34b [NFC][sanitizer] Add SortAndDedup function 2020-12-29 14:01:43 -08:00
Vitaly Buka 4e74480e02 [NFC][sanitizer] Simplify InternalLowerBound 2020-12-29 14:01:43 -08:00
Vitaly Buka 673b12e76f [tsan] Remove stdlib.h from dd_interceptors.cpp
This fixes "realpath already defined" error.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D93877
2020-12-29 14:00:54 -08:00
Jacques Pienaar e03266994a [mlir] Skip empty op-pipelines in inliner textual opt parsing
Avoids failing on cases like

inline{default-pipeline=canonicalize max-iterations=4 op-pipelines=},

as produced by crash reproducer.
2020-12-29 13:59:53 -08:00
Andrew Litteken df4a931c63 [IROutliner] Adding OptRemarks to the IROutliner Pass
This prints OptRemarks at each location where a decision is made to not
outline, or to outline a specific section for the IROutliner pass.

Test:
llvm/test/Transforms/IROutliner/opt-remarks.ll

Reviewers: jroelofs, paquette

Differential Revision: https://reviews.llvm.org/D87300
2020-12-29 15:52:08 -06:00
Roman Lebedev 39a56f7f17
[SimplifyCFG] Teach SimplifyTerminatorOnSelect() to preserve DomTree 2020-12-30 00:48:12 +03:00
Roman Lebedev ec0b671a61
[SimplifyCFG] Teach SimplifyCondBranchToCondBranch() to preserve DomTree 2020-12-30 00:48:12 +03:00
Roman Lebedev 307156246f
[SimplifyCFG] Teach mergeConditionalStoreToAddress() to preserve DomTree 2020-12-30 00:48:11 +03:00
Roman Lebedev d4c0abb4a3
[SimplifyCFG] Teach FoldCondBranchOnPHI() to preserve DomTree 2020-12-30 00:48:11 +03:00
Roman Lebedev b8121b2e62
[SimplifyCFG] Teach SinkCommonCodeFromPredecessors() to preserve DomTree 2020-12-30 00:48:11 +03:00
Roman Lebedev 18c407bf4c
[SimplifyCFG] Teach HoistThenElseCodeToIf() to preserve DomTree 2020-12-30 00:48:10 +03:00
Roman Lebedev fe9bdd9621
[SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPredecessor() to preserve DomTree, part 2 2020-12-30 00:48:10 +03:00
Roman Lebedev 6027e05dbf
[SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPredecessor() to preserve DomTree, part 1 2020-12-30 00:48:10 +03:00
James Y Knight 145cbef587 Copy demangle changes from libcxxabi to llvm with cp_to_llvm.sh.
This includes changes from these commits:
5641b1dfdd
8d31392753
2020-12-29 16:18:10 -05:00
Sanjay Patel 8d18bc8e6d [Utils] reduce code in createTargetReduction(); NFC
The switch duplicated the translation in getRecurrenceBinOp().
This code is still weird because it translates to the TTI
ReductionFlags for min/max, but then createSimpleTargetReduction()
converts that back to RecurrenceDescriptor::MinMaxRecurrenceKind.
2020-12-29 15:56:19 -05:00
Stella Laurenzo df7ddeea66 [mlir][python] Add FlatSymbolRef attribute.
Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D93909
2020-12-29 12:24:28 -08:00
Sanjay Patel 21a3a0225d [SLP] replace local reduction enum with RecurrenceKind; NFCI
I'm not sure if the SLP enum was created before the IVDescriptor
RecurrenceDescriptor / RecurrenceKind existed, but the code in
SLP is now redundant with that class, so it just makes things
more complicated to have both. We eventually call LoopUtils
createSimpleTargetReduction() to create reduction ops, so we
might as well standardize on those enum names.

There's still a question of whether we need to use TTI::ReductionFlags
vs. MinMaxRecurrenceKind, but that can be another clean-up step.

Another option would just be to flatten the enums in RecurrenceDescriptor
into a single enum. There isn't much benefit (smaller switches?) to
having a min/max subset.
2020-12-29 14:52:11 -05:00
Fraser Cormack f7f09e2b1c [RISCV] Fill out basic integer RVV ISel patterns
This complements the existing RVV ISel patterns for arithmetic, bitwise
and shifts with the remaining operations in those categories: sub, and,
xor, sra.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93852
2020-12-29 19:32:18 +00:00
Juneyoung Lee 278aa65cc4 [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder
This patch updates IRBuilder to create insertelement/shufflevector using poison as a placeholder.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93793
2020-12-30 04:21:04 +09:00
Andrew Litteken 6df161a2fb [IROutliner] Adding a cost model, and debug option to turn the model off.
This adds a cost model that takes into account the total number of
machine instructions to be removed from each region, the number of
instructions added by adding a new function with a set of instructions,
and the instructions added by handling arguments.

Tests not adding flags:

llvm/test/Transforms/IROutliner/outlining-cost-model.ll

Reviewers: jroelofs, paquette

Differential Revision: https://reviews.llvm.org/D87299
2020-12-29 12:43:41 -06:00
Craig Topper 79cbb003c5 [RISCV] Don't use tail agnostic policy on instructions where destination is tied to source
If the destination is tied, then user has some control of the
register used for input. They would have the ability to control
the value of any tail elements. By using tail agnostic we take
this option away from them.

Its not clear that the intrinsics are defined such that this isn't
supposed to work. And undisturbed is a valid implementation for agnostic
so code wouldn't even fail to work on all systems if we always used
agnostic.

The vcompress intrinsic is defined to require tail undisturbed so
at minimum we need this for that instruction or need to redefine
the intrinsic.

I've made an exception here for vmv.s.x/fmv.s.f and reduction
instructions which only write to element 0 regardless of the tail
policy. This allows us to keep the agnostic policy on those which
should allow better redundant vsetvli removal.

An enhancement would be to check for undef input and keep the
agnostic policy, but we don't have good test coverage for that yet.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D93878
2020-12-29 10:37:58 -08:00
Arthur Eubanks 7ecbe0c7a0 [NewPM][AMDGPU] Port amdgpu-lower-kernel-attributes
And add it to the AMDGPU opt pipeline.

This is a function pass instead of a module pass (like the legacy pass)
because it's getting added to a CGSCCPassManager, and you can't put a
module pass in a CGSCCPassManager.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D93885
2020-12-29 10:26:06 -08:00
Florian Hahn b980bed34b
[MSSAUpdater] Skip renaming when inserting def in unreachable block.
This fixes a updater crash when moving memory defs between unreachable
blocks.

Fixes PR48616.
2020-12-29 18:22:12 +00:00
Craig Topper 2ae760e27e [RISCV] Add earlyclobber of destination register to vmsbf.m/vmsif.m/vmsof.m instructions
The spec for these instructions include this note. "The destination register
cannot overlap either the source register or the mask register ('v0') if the
instruction is masked." So we need earlyclobber to enforce this constraint.

I've regenerated the tests with update_llc_test_checks.py to show the
effects of the earlyclobber.

Reviewed By: khchen, frasercrmck

Differential Revision: https://reviews.llvm.org/D93867
2020-12-29 10:00:04 -08:00
Michael Stapelberg c1e85b6c1b sanitizer: fix typo/spelling: Dissassemble → Disassemble
Differential Revision: https://reviews.llvm.org/D93902
2020-12-29 12:26:57 -05:00
Thomas Raoux cf216670a0 [mlir][linalg] Add vectorization for linalg on tensor ops
Support vectorization of linalg ops using tensor inputs/outputs.

Differential Revision: https://reviews.llvm.org/D93890
2020-12-29 09:02:23 -08:00
Nicolai Hähnle b76014a4f1 RegionInfo: use a range-based for loop [NFCI]
Change-Id: I9985d72191a2b0680195032acf8a14ad2ba954ed

Differential Revision: https://reviews.llvm.org/D92932
2020-12-29 16:00:26 +01:00
Roman Lebedev 374ef57f13
[InstCombine] 'hoist xor-by-constant from xor-by-value': completely give up on constant exprs
As Mikael Holmén is noting in the post-commit review for the first fix
https://reviews.llvm.org/rGd4ccef38d0bb#967466
not hoisting constantexprs is not enough,
because if the xor originally was a constantexpr (i.e. X is a constantexpr).
`SimplifyAssociativeOrCommutative()` in `visitXor()` will immediately
undo this transform, thus again causing an infinite combine loop.

This transform has resulted in a surprising number of constantexpr failures.
2020-12-29 16:28:18 +03:00
Nemanja Ivanovic 7486de1b2e [PowerPC] Provide patterns for permuted scalar to vector for pre-P8
We will emit these permuted nodes on all VSX little endian subtargets
but don't have the patterns available to match them on subtargets
that don't have direct moves.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=47916
2020-12-29 06:49:25 -06:00
Fraser Cormack aebb4a6052 [RISCV] Rewrite and simplify helper function. NFC.
Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D93851
2020-12-29 11:29:44 +00:00
Nemanja Ivanovic 0a19fc3088 [PowerPC] Disable CTR loops containing operations on half-precision
On subtargets prior to Power9, conversions to/from half precision
are lowered to libcalls. This makes loops containing such operations
invalid candidates for HW loops.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=48519
2020-12-29 05:12:50 -06:00
Mark Murray 5abfeccf10 [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM
This patch upstreams support for the Armv8-a Cortex-A78C
processor for AArch64 and ARM.

In detail:

Adding cortex-a78c as cpu option for aarch64 and arm targets in clang
Adding Cortex-A78C CPU name and ProcessorModel in llvm
Details of the CPU can be found here:
https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a78c
2020-12-29 10:18:59 +00:00
Pavel Labath a0b68a2925 [lldb] Deduplicate some tests in TestLldbGdbServer
Use the new gdb-remote test case factory to generate debugserver and
llgs variants, handling the simple cases first.
2020-12-29 09:37:01 +01:00
Juneyoung Lee ae6e89327b Precommit tests that have poison as shufflevector's placeholder
This commit copies existing tests at llvm/Transforms containing
'shufflevector X, undef' and replaces them with 'shufflevector X, poison'.
The new copied tests have *-inseltpoison.ll suffix at its file name
(as db7a2f347f did)
See https://reviews.llvm.org/D93793

Test files listed using

grep -R -E "^[^;]*shufflevector <.*> .*, <.*> undef" | cut -d":" -f1 | uniq

Test files copied & updated using

file_org=llvm/test/Transforms/$1
if [[ "$file_org" = *-inseltpoison.ll ]]; then
  file=$file_org
else
  file=${file_org%.ll}-inseltpoison.ll
  if [ ! -f $file ]; then
    cp $file_org $file
  fi
fi
sed -i -E 's/^([^;]*)shufflevector <(.*)> (.*), <(.*)> undef/\1shufflevector <\2> \3, <\4> poison/g' $file
head -1 $file | grep "Assertions have been autogenerated by utils/update_test_checks.py" -q
if [ "$?" == 1 ]; then
  echo "$file : should be manually updated"
  # The test is manually updated
  exit 1
fi
python3 ./llvm/utils/update_test_checks.py --opt-binary=./build-releaseassert/bin/opt $file
2020-12-29 17:09:31 +09:00
Georgii Rymar ed146d6291 [LLD][ELF] - Use LLVM_ELF_IMPORT_TYPES_ELFT instead of multiple types definitions. NFCI.
We can reduce the number of "using" declarations.
`LLVM_ELF_IMPORT_TYPES_ELFT` was extended in D93801.

Differential revision: https://reviews.llvm.org/D93856
2020-12-29 10:50:07 +03:00
Pavel Labath 53f80d6b3a [lldb] Fix logging in lldb-server tests 2020-12-29 08:33:12 +01:00
Fangrui Song a8970dff1a [ubsan][test] FLush stdout before checking interleaved stdout/stderr
Detected by musl.
2020-12-28 20:30:32 -08:00
Arthur Eubanks c5d100fdf2 [test] Fix conditional-temporaries.cpp
Broken by https://reviews.llvm.org/D93880.
(but now the test is much better :) )
2020-12-28 20:17:31 -08:00
Arthur Eubanks c2ef06d3dd [NewPM] Port infer-address-spaces
And add it to the AMDGPU opt pipeline.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D93880
2020-12-28 19:58:12 -08:00
Fangrui Song 55d13e6a86 [asan][test] Annotate glibc specific tests with REQUIRES: glibc-2.27 2020-12-28 19:56:08 -08:00
Kazu Hirata 2883cd98f3 [CFGPrinter] Use succ_empty (NFC) 2020-12-28 19:55:20 -08:00