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3171 Commits

Author SHA1 Message Date
Eric Christopher 2c8e7f421c Remove assert, add comment. 
llvm-svn: 115009
 2010-09-29 00:49:09 +00:00
Evan Cheng c35d7bbe43 Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub. 
llvm-svn: 115008
 2010-09-29 00:27:46 +00:00
Evan Cheng 0097dd0d5a Add support to model pipeline bypass / forwarding. 
llvm-svn: 115005
 2010-09-28 23:50:49 +00:00
Eric Christopher a86a6d2fed 32-bit constant ints only for now. 
llvm-svn: 115001
 2010-09-28 22:47:54 +00:00
Oscar Fuentes b4b12535e8 Removed a bunch of unnecessary target_link_libraries. 
llvm-svn: 114999
 2010-09-28 22:39:14 +00:00
Owen Anderson a3181e2d79 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.

llvm-svn: 114995
 2010-09-28 21:57:50 +00:00
Eric Christopher 953b1afd5f Integer materialization needed the same thinko change. 
llvm-svn: 114994
 2010-09-28 21:55:34 +00:00
Nick Lewycky 7d483d352b Resolve this GCC warning: 
ARMTargetMachine.cpp:53: error: control reaches end of non-void function

llvm-svn: 114992
 2010-09-28 21:40:26 +00:00
Anton Korobeynikov 81bdc93bbb User proper libcall names & condcodes while compiling for ARM EABI. 
Patch by Evzen Muller!

llvm-svn: 114991
 2010-09-28 21:39:26 +00:00
Owen Anderson 88af7d00fc Part one of switching to using a more sane heuristic for determining if-conversion profitability. 
Rather than having arbitrary cutoffs, actually try to cost model the conversion.

For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.

llvm-svn: 114973
 2010-09-28 18:32:13 +00:00
Jim Grosbach 45c83d496f Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

llvm-svn: 114964
 2010-09-28 17:05:56 +00:00
Oscar Fuentes 3da4255d07 Add ARM Disassembler to the CMake build. 
llvm-svn: 114949
 2010-09-28 11:48:19 +00:00
Eric Christopher bf86fd3c47 80-col fixups. 
llvm-svn: 114943
 2010-09-28 04:18:29 +00:00
Bob Wilson 3dc97324c1 Add a command line option "-arm-strict-align" to disallow unaligned memory 
accesses for ARM targets that would otherwise allow it.  Radar 8465431.

llvm-svn: 114941
 2010-09-28 04:09:35 +00:00
Eric Christopher 7990df1ae2 Rework builtin handling and call setup. The builtin handling 
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.

llvm-svn: 114934
 2010-09-28 01:21:42 +00:00
Eric Christopher e68635acdb Fix typo. 
llvm-svn: 114931
 2010-09-28 00:35:33 +00:00
Eric Christopher 6f98bfd870 Fix fp constant loads to have a destination register. 
llvm-svn: 114930
 2010-09-28 00:35:09 +00:00
Jim Grosbach 175d6411c8 Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

llvm-svn: 114915
 2010-09-27 22:28:11 +00:00
Jim Grosbach 9e9ed98305 ARM-mode eh.sjlj.longjmp MC lowering 
llvm-svn: 114896
 2010-09-27 21:47:04 +00:00
Jim Grosbach 11fed543c9 Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

llvm-svn: 114892
 2010-09-27 21:28:44 +00:00
Daniel Dunbar 6b2aaf1a36 Hard to imagine there are still people using inferior compilers. 
llvm-svn: 114862
 2010-09-27 20:12:58 +00:00
Rafael Espindola 69aa15155f Odd additional stub framework for the ARM MC ELF emission. 
llc now recognizes the "intent" to support MC/obj emission for ARM, but
given that they are all stubs, it asserts on --filetype=obj --march=arm

Patch by Jason Kim.

llvm-svn: 114856
 2010-09-27 18:31:37 +00:00
Eric Christopher 0720611e3a Insert missing coherency in comment. Add a quick check for hardware 
divide support also.

llvm-svn: 114813
 2010-09-27 06:08:12 +00:00
Eric Christopher 29ab6d1f82 Mass rename for Jim. 
llvm-svn: 114812
 2010-09-27 06:02:23 +00:00
Evan Cheng 48cc21620f Fix IIC_iEXTAr itinerary class of Cortex-A9. 
llvm-svn: 114784
 2010-09-25 01:09:28 +00:00
Evan Cheng 8f9a2244fc Remove a unused instruction itinerary class. 
llvm-svn: 114782
 2010-09-25 01:06:02 +00:00
Evan Cheng 62d626ce86 Fix zero and sign extension instructions scheduling itineraries. 
llvm-svn: 114780
 2010-09-25 00:49:35 +00:00
Evan Cheng e37da03e60 More pseudo instruction scheduling itinerary fixes. 
llvm-svn: 114768
 2010-09-24 22:41:41 +00:00
Evan Cheng 1d35ad62cc Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions. 
llvm-svn: 114766
 2010-09-24 22:03:46 +00:00
Jim Grosbach 4a6ab13fb9 Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence. 
llvm-svn: 114758
 2010-09-24 20:47:58 +00:00
Evan Cheng dbcc4b4d4d Enable code placement optimization pass for ARM. 
llvm-svn: 114746
 2010-09-24 19:07:23 +00:00
Evan Cheng 40a4222996 Fix a potential null dereference bug. 
llvm-svn: 114723
 2010-09-24 05:18:35 +00:00
Owen Anderson 2c5df619c4 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further 
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!

llvm-svn: 114710
 2010-09-23 23:45:25 +00:00
Bob Wilson 7fbbe9a43a Set alignment operand for NEON VST instructions. 
llvm-svn: 114709
 2010-09-23 23:42:37 +00:00
Jim Grosbach c0aed7179a ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion 
llvm-svn: 114707
 2010-09-23 23:33:56 +00:00
Jim Grosbach 2f3728f576 #+4 --> #4 for consistency with other asm output 
llvm-svn: 114706
 2010-09-23 23:32:38 +00:00
Jim Grosbach 07f07290d8 Fix formatting of output .s code 
llvm-svn: 114705
 2010-09-23 23:03:26 +00:00
Owen Anderson bd57e0ce3d Add isConditionalMove bits to X86 and ARM instructions. 
llvm-svn: 114703
 2010-09-23 22:57:01 +00:00
Bob Wilson 9eeb890172 Set alignment operand for NEON VLD instructions. 
llvm-svn: 114696
 2010-09-23 21:43:54 +00:00
Jim Grosbach 7d34837676 never mind. I can't read, apparently 
llvm-svn: 114689
 2010-09-23 19:42:17 +00:00
Evan Cheng 1596f7f6f3 Fix r114632. Return if the only terminator is an unconditional branch after the redundant ones are deleted. 
llvm-svn: 114688
 2010-09-23 19:42:03 +00:00
Jim Grosbach 836341a17a Fix opcode value for the 'trap' instruction, keeping the type suffix on the 
constant. Hopefully the non-Darwin bots will like it...

llvm-svn: 114687
 2010-09-23 19:32:40 +00:00
Jim Grosbach 3d50a3e237 explicit 'unsigned long' on constant value. Hopefully make bots happier. 
llvm-svn: 114686
 2010-09-23 19:08:04 +00:00
Benjamin Kramer e38495dbc0 Unbreak build. Jim, please review. 
llvm-svn: 114684
 2010-09-23 18:57:26 +00:00
Jim Grosbach 8503054410 Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't 
(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.

Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.

llvm-svn: 114679
 2010-09-23 18:05:37 +00:00
Jim Grosbach ea20e257b2 nuke unused var 
llvm-svn: 114676
 2010-09-23 17:58:00 +00:00
Evan Cheng 66c8cd2b32 If there are multiple unconditional branches terminating a block, eliminate all 
but the first one. Those will never be executed. There was logic to do this
but it was faulty.

llvm-svn: 114632
 2010-09-23 06:54:40 +00:00
Jim Grosbach 85dcd3d0f4 Add support for ELF PLT references for ARM MC asm printing. Adding a 
new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure
there's a more straightforward way to get the printing difference captured.
(i.e., x86 uses @PLT, ARM uses (PLT)).

llvm-svn: 114613
 2010-09-22 23:27:36 +00:00
Jim Grosbach a9424d4f2f Enable a few additional asserts in MC instruction lowering. 
llvm-svn: 114601
 2010-09-22 23:01:28 +00:00
Bob Wilson 463a05342a Change VDUPLANE DAG combiner to just return the result instead of calling 
CombineTo to avoid putting the result on the worklist.  I don't think it makes
much difference for now, but it might help someday as we add more DAG
combine optimizations.

llvm-svn: 114595
 2010-09-22 22:27:30 +00:00