Commit Graph

500 Commits

Author SHA1 Message Date
Craig Topper c7277d9485 [X86] Move AVX512 STATIC_ROUNDING enum to X86BaseInfo.h to fix a layering violation in AsmParser.
llvm-svn: 256426
2015-12-25 22:09:49 +00:00
Marina Yatsina 8dfd5cbb73 [X86][ms-inline asm] Add support for memory operands that include structs
Add ability to reference struct symbols in memory operands.
Test case will be added on the clang side (review http://reviews.llvm.org/D15749)

Differential Revision: http://reviews.llvm.org/D15748

llvm-svn: 256381
2015-12-24 12:09:51 +00:00
Michael Zuckerman 02ecd43c63 [X86][inline asm] support even directive
The .even directive aligns content to an evan-numbered address.

In at&t syntax .even 
In Microsoft syntax even (without the dot).

Differential Revision: http://reviews.llvm.org/D15413

llvm-svn: 255462
2015-12-13 17:07:23 +00:00
Marina Yatsina 497d44a081 [X86] Adding support for FWORD type for MS inline asm
Adding support for FWORD type for MS inline asm.

Differential Revision: http://reviews.llvm.org/D15268

llvm-svn: 254904
2015-12-07 13:09:20 +00:00
Marina Yatsina 4b1aea0802 [X86] MS inline asm: produce error when encountering "<type> ptr <reg name>"
Currently "<type> ptr <reg name>" treated as <reg name> in MS inline asm, ignoring the "<type> ptr" completely and possibly ignoring the intention of the user.
Fixed llvm to produce an error when encountering "<type> ptr <reg name>" operands.

For example: andpd xmm1,xmmword ptr xmm1 --> andpd xmm1, xmm1 
though andpd has 2 possible matching formats - andpd xmm, xmm/m128

Patch by: ziv.izhar@intel.com
Differential Revision: http://reviews.llvm.org/D14607

llvm-svn: 254607
2015-12-03 12:17:03 +00:00
Akira Hatanaka b11ef0897c Reduce the size of MCRelaxableFragment.
MCRelaxableFragment previously kept a copy of MCSubtargetInfo and
MCInst to enable re-encoding the MCInst later during relaxation. A copy
of MCSubtargetInfo (instead of a reference or pointer) was needed
because the feature bits could be modified by the parser.

This commit replaces the MCSubtargetInfo copy in MCRelaxableFragment
with a constant reference to MCSubtargetInfo. The copies of
MCSubtargetInfo are kept in MCContext, and the target parsers are now
responsible for asking MCContext to provide a copy whenever the feature
bits of MCSubtargetInfo have to be toggled.
 
With this patch, I saw a 4% reduction in peak memory usage when I
compiled verify-uselistorder.lto.bc using llc.

rdar://problem/21736951

Differential Revision: http://reviews.llvm.org/D14346

llvm-svn: 253127
2015-11-14 06:35:56 +00:00
Akira Hatanaka bd9fc28444 [MCTargetAsmParser] Move the member varialbes that reference
MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a
member function getSTI.

This is done in preparation for making changes to shrink the size of
MCRelaxableFragment. (see http://reviews.llvm.org/D14346).

llvm-svn: 253124
2015-11-14 05:20:05 +00:00
Michael Zuckerman fd3fe9e45a [x86] translating "fp" (floating point) instructions from {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp}
LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr.
GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions.

Differential Revision: http://reviews.llvm.org/D14217

llvm-svn: 252908
2015-11-12 16:58:51 +00:00
David Majnemer a375b26144 [MC] Don't crash when .word is given bogus values
We didn't validate that the .word directive was given a sane value,
leading to crashes when we attempt to write out the object file.

Instead, perform some validation and issue a diagnostic pointing at the
start of the diagnostic.

llvm-svn: 251270
2015-10-26 02:45:50 +00:00
Craig Topper d6b661dbf0 [X86] Add support to assembler and MCInst lowering to use the other vmovq %xmmX, %xmmX encoding if it would be a shorter VEX encoding.
llvm-svn: 250014
2015-10-12 04:57:59 +00:00
Craig Topper 95fffba227 [X86] Add some instruction aliases to get the assembly parser table to favor arithmetic instructions with 8-bit immediates over the forms that implicitly use the ax/eax/rax.
This allows us to remove the explicit code for working around the existing priority

llvm-svn: 250011
2015-10-12 03:39:57 +00:00
Craig Topper 87990ee4ec [X86] Remove special validation for INT immediate operand from AsmParser. Instead mark its operand type as u8imm which will cause it to fail to match. This is more consistent with other instruction behavior.
This also fixes a bug where negative immediates below -128 were not being reported as errors.

llvm-svn: 249989
2015-10-11 18:27:24 +00:00
Craig Topper 7143d8001a Use range-based for loops. NFC.
llvm-svn: 249941
2015-10-10 05:25:06 +00:00
Craig Topper 7d5b23101c Use emplace_back instead of a constructor call and push_back. NFC
llvm-svn: 249940
2015-10-10 05:25:02 +00:00
NAKAMURA Takumi 0a7d0ad95f Untabify.
llvm-svn: 248264
2015-09-22 11:15:07 +00:00
NAKAMURA Takumi a9cb538a74 Reformat blank lines.
llvm-svn: 248263
2015-09-22 11:14:39 +00:00
NAKAMURA Takumi 70ad98aca4 Reformat.
llvm-svn: 248261
2015-09-22 11:13:55 +00:00
Reid Kleckner c2b9254426 [ms-inline-asm] Relax assertion around funky identifiers slightly
A corresponding clang change will make it so that clang can consume part
of an assembler token. The assembler treats '.' as an identifier
character while clang does not, so it's view of the token stream is a
little different.

llvm-svn: 246089
2015-08-26 21:57:25 +00:00
Michael Zuckerman 9beca2e7e2 [X86] Add support for mmword memory operand size for Intel-syntax x86 assembly
Differential Revision: http://reviews.llvm.org/D12151

llvm-svn: 245835
2015-08-24 10:26:54 +00:00
Michael Zuckerman 2fe19db94f first commit to llvm
llvm-svn: 245825
2015-08-24 07:48:50 +00:00
Marina Yatsina a0e02410e1 Test commit to verify commit access
llvm-svn: 244438
2015-08-10 11:33:10 +00:00
Michael Kuperstein cdb076b8d4 [X86] Recognize "flags" as an identifier, not a register in Intel-syntax inline asm
Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11512

llvm-svn: 243630
2015-07-30 10:10:25 +00:00
Colin LeMahieu fe2c8b8015 [llvm-mc] Pushing plumbing through for --fatal-warnings flag.
llvm-svn: 243334
2015-07-27 21:56:53 +00:00
Duncan P. N. Exon Smith d531322149 X86: Use dyn_cast instead of isa+cast, NFC
llvm-svn: 243034
2015-07-23 19:27:07 +00:00
Michael Kuperstein ffcc7663a2 [X86] Fix order of operands for ins and outs instructions when parsing intel syntax
Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11337

llvm-svn: 243001
2015-07-23 10:23:48 +00:00
Michael Kuperstein 69e40a4c85 [X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly
Differential Revision: http://reviews.llvm.org/D11257
Patch by: marina.yatsina@intel.com

llvm-svn: 242639
2015-07-19 11:03:08 +00:00
Ranjeet Singh 86ecbb7b54 Reverting r241058 because it's causing buildbot failures.
llvm-svn: 241061
2015-06-30 12:32:53 +00:00
Ranjeet Singh 5b119091a1 There are a few places where subtarget features are still
represented by uint64_t, this patch replaces these
usages with the FeatureBitset (std::bitset) type.

Differential Revision: http://reviews.llvm.org/D10542

llvm-svn: 241058
2015-06-30 11:30:42 +00:00
Michael Kuperstein e3de07a529 Add support for parsing the XOR operator in Intel syntax inline assembly.
Differential Revision: http://reviews.llvm.org/D10385
Patch by marina.yatsina@intel.com

llvm-svn: 239695
2015-06-14 12:59:45 +00:00
Jim Grosbach 13760bd152 MC: Clean up MCExpr naming. NFC.
llvm-svn: 238634
2015-05-30 01:25:56 +00:00
Michael Kuperstein db0712f986 Use std::bitset for SubtargetFeatures.
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures.
Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. 
This should now be fixed.

llvm-svn: 238192
2015-05-26 10:47:10 +00:00
Jim Grosbach 6f482000e9 MC: Clean up method names in MCContext.
The naming was a mish-mash of old and new style. Update to be consistent
with the new. NFC.

llvm-svn: 237594
2015-05-18 18:43:14 +00:00
Jim Grosbach e9119e41ef MC: Modernize MCOperand API naming. NFC.
MCOperand::Create*() methods renamed to MCOperand::create*().

llvm-svn: 237275
2015-05-13 18:37:00 +00:00
Michael Kuperstein c3434b390d Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).

llvm-svn: 237245
2015-05-13 10:28:46 +00:00
Michael Kuperstein aba4a34ef2 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first two times this was committed (r229831, r233055), it caused several buildbot failures. 
At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed.

llvm-svn: 237234
2015-05-13 08:27:08 +00:00
Elena Demikhovsky 29792e9a80 AVX-512: Added all forms of FP compare instructions for KNL and SKX.
Added intrinsics for the instructions. CC parameter of the intrinsics was changed from i8 to i32 according to the spec.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 236714
2015-05-07 11:24:42 +00:00
Yaron Keren 075759aadd Remove more superfluous .str() and replace std::string concatenation with Twine.
Following r233392, http://llvm.org/viewvc/llvm-project?rev=233392&view=rev.

llvm-svn: 233555
2015-03-30 15:42:36 +00:00
Michael Kuperstein 29704e7fb4 Revert "Use std::bitset for SubtargetFeatures"
This reverts commit r233055.

It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time.

llvm-svn: 233068
2015-03-24 12:56:59 +00:00
Michael Kuperstein 774b441b5e Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first time this was committed (r229831), it caused several buildbot failures. 
At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed.

Differential Revision: http://reviews.llvm.org/D8542

llvm-svn: 233055
2015-03-24 09:17:25 +00:00
Elena Demikhovsky 18fd49602b AVX-512: Add assembly parser support for Rounding mode
By Asaf Badouh <asaf.badouh@intel.com>

llvm-svn: 230962
2015-03-02 15:00:34 +00:00
Michael Kuperstein efd7a96d2e Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.
llvm-svn: 229841
2015-02-19 11:38:11 +00:00
Michael Kuperstein ba5b04c798 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.

No functional change.

Differential Revision: http://reviews.llvm.org/D7065

llvm-svn: 229831
2015-02-19 09:01:04 +00:00
Craig Topper 78c424dfca [X86] Add assembly parser support for mnemonic aliases for AVX-512 vpcmp instructions.
llvm-svn: 229287
2015-02-15 07:13:48 +00:00
Craig Topper 43860838dc [X86] Improve parsing support AVX/SSE floating point compare instruction mnemonic aliases. They'll now print with the alias the parser received instead of converting to the explicit immediate form.
llvm-svn: 229266
2015-02-14 21:54:03 +00:00
Craig Topper 916708f152 [X86] Add support for parsing and printing the mnemonic aliases for the XOP VPCOM instructions.
llvm-svn: 229078
2015-02-13 07:42:25 +00:00
Saleem Abdulrasool c3f8ad3e83 X86: fix comment typo in AsmParser
Fix a typo.  NFC.

llvm-svn: 226313
2015-01-16 20:16:06 +00:00
David Majnemer 7efc6139d9 Use the operand vector instead so inline assembly can be validated too
The buildbots got upset after r225941, this should hopefully fix things.

llvm-svn: 225954
2015-01-14 06:14:36 +00:00
Saleem Abdulrasool aa32297fb8 X86: only access operands if they are present
If there is no associated immediate (MS style inline asm), do not try to access
the operand, assume that it is valid.  This should fix the buildbots after SVN
r225941.

llvm-svn: 225950
2015-01-14 05:37:10 +00:00
Saleem Abdulrasool ca24b1d638 X86: validate 'int' instruction
The int instruction takes as an operand an 8-bit immediate value.  Validate that
the input is valid rather than silently truncating the value.

llvm-svn: 225941
2015-01-14 05:10:21 +00:00
Craig Topper 589ceee7f4 Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers.
Make sure they all have llvm_unreachable on the default path out of the switch. Remove unnecessary "default: break". Remove a 'return' after unreachable. Fix some indentation.

llvm-svn: 225114
2015-01-03 08:16:34 +00:00