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83938 Commits

Author SHA1 Message Date
Evan Cheng 2c452fcd14 Mark a few more pattern-less instructions with neverHasSideEffects. This is especially important on instructions like t2LEApcreal which are prime candidate for machine LICM. 
llvm-svn: 104102
 2010-05-19 01:52:25 +00:00
Chandler Carruth eba788efa6 Fix an obvious goof that rjmccall found by inspection. No testcase, suggestions 
welcome for one.

llvm-svn: 104101
 2010-05-19 01:37:01 +00:00
Dan Gohman 744c96dd48 Add a comment explaining why this code uses Append mode. 
llvm-svn: 104095
 2010-05-19 01:21:34 +00:00
Evan Cheng abd0ad54a4 Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. 
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.

Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.

llvm-svn: 104094
 2010-05-19 01:08:17 +00:00
Dan Gohman 58c6f21453 Factor out the code for picking integer arithmetic with immediate 
opcodes into a helper function. This fixes a few places in the code
which were not properly selecting the 8-bit-immediate opcodes.

llvm-svn: 104091
 2010-05-19 00:53:19 +00:00
Eric Christopher c09d5a29d8 Add a test to make sure that we're lowering the shift amount correctly. 
llvm-svn: 104090
 2010-05-19 00:22:04 +00:00
Dan Gohman beebef4137 Add a comment. 
llvm-svn: 104089
 2010-05-18 23:55:57 +00:00
Dan Gohman 50f8f2c23d Fix the predicate which checks for non-sensical formulae which have 
constants in registers which partially cancel out their immediate fields.

llvm-svn: 104088
 2010-05-18 23:48:08 +00:00
Dan Gohman 4cf99b5303 Factor out the code for recomputing an LSRUse's Regs set after some 
of its formulae have been removed into a helper function, and also
teach it how to update the RegUseTracker.

llvm-svn: 104087
 2010-05-18 23:42:37 +00:00
Bob Wilson 055c01d9dc Fix a crash when debugging the coalescer. DebugValue instructions are not 
in the coalescer's instruction map.

llvm-svn: 104086
 2010-05-18 23:19:42 +00:00
Douglas Gregor bd130a2962 Basic test for user-defined conversions involving vector types 
llvm-svn: 104085
 2010-05-18 23:05:44 +00:00
Fariborz Jahanian 9f963c2488 Misc. fixes to bring Objetive-C++'s handling of 
gc attributes to be inline with Objective-C
(for radar 7925141).

llvm-svn: 104084
 2010-05-18 23:04:17 +00:00
Douglas Gregor bdb604a806 Protect isIntegerConstantExpr from seeing type- or value-dependent 
expressions in attributes, pragmas.

llvm-svn: 104083
 2010-05-18 23:01:22 +00:00
Dan Gohman a4eca05174 Factor out code for estimating search space complexity into a helper 
function.

llvm-svn: 104082
 2010-05-18 22:51:59 +00:00
Douglas Gregor 4618868a7d Implement C++ support for vector and extended vector types. This 
involves extending implicit conversion sequences to model vector
conversions and vector splats, along with teaching the C++ conditional
operator-checking code about vector types.

Fixes <rdar://problem/7983501>.

llvm-svn: 104081
 2010-05-18 22:42:18 +00:00
Dan Gohman 63e9015248 Add some more debug output. 
llvm-svn: 104080
 2010-05-18 22:41:32 +00:00
Dan Gohman f1c7b1b42f Factor out the code for deleting a formula from an LSRUse into 
a helper function.

llvm-svn: 104079
 2010-05-18 22:39:15 +00:00
Dan Gohman 8aca7ef903 Make some debug output more informative. 
llvm-svn: 104078
 2010-05-18 22:37:37 +00:00
Dan Gohman 06ab08f795 Print an error message in Formula::print if the HasBaseReg flag 
is inconsistent with the BaseRegs field. It's not print's job to
assert on an invalid condition, but it can make one more obvious.

llvm-svn: 104077
 2010-05-18 22:35:55 +00:00
Dan Gohman 248c41d108 Rename RegUseTracker's RegUses member to RegUsesMap to avoid 
confusion with LSRInstance's RegUses member.

llvm-svn: 104076
 2010-05-18 22:33:00 +00:00
Ted Kremenek a10f12829f Add function 'clang_isTagDeclDefinition()' to allow clients of libclang to distinguish between 
forward declarations and definitions of structs/classes/enums.

llvm-svn: 104075
 2010-05-18 22:32:15 +00:00
Jakob Stoklund Olesen 430b6e40ab Remember to update VirtRegLastUse when spilling without killing before a call. 
llvm-svn: 104074
 2010-05-18 22:20:09 +00:00
Nick Kledzik 62713dac19 Add set_new_handler and nothrow implementations 
llvm-svn: 104073
 2010-05-18 22:17:13 +00:00
Dan Gohman f8bf663873 Teach mode load folding and unfolding code about CMP32ri8 and friends. 
llvm-svn: 104068
 2010-05-18 21:54:15 +00:00
Bill Wendling 4ed63f8687 Don't eliminate frame pointers from leaf functions if "--disable-fp-elim" is 
specified.

llvm-svn: 104066
 2010-05-18 21:47:08 +00:00
Dan Gohman 887dd1cd31 When converting a test to a cmp to fold a load, use the cmp that has an 
8-bit immediate field rather than one with a wider immediate field.

llvm-svn: 104064
 2010-05-18 21:42:03 +00:00
Eric Christopher 7f173d1d27 Quick test to make sure we're emitting the tbss section correctly. 
llvm-svn: 104063
 2010-05-18 21:40:20 +00:00
Chris Lattner 9f46539e07 make mcinstlower remove all but the first operand to CALL64pcrel32. 
The register use operands (e.g. the first argument is passed in a 
register) is currently being modeled as a normal register use,
instead of correctly being an implicit use.  This causes the operand
to get propagated onto the mcinst, which was causing the encoder to
emit a rex prefix byte, which generates an invalid call.

This fixes rdar://7998435

llvm-svn: 104062
 2010-05-18 21:40:18 +00:00
Evan Cheng f19384d54a Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 
llvm-svn: 104060
 2010-05-18 21:31:17 +00:00
Eric Christopher feedc90c57 Implement EmitTBSSSymbol for MachOStreamer. 
Fixes build failure as well.

llvm-svn: 104059
 2010-05-18 21:26:41 +00:00
mike-m b125532b64 Fix enum to address array bounds regression. 
llvm-svn: 104058
 2010-05-18 21:22:12 +00:00
Eric Christopher 5c87be766d Make EmitTBSSSymbol take a section argument so that we can find it later. 
Fix up callers and users.

llvm-svn: 104057
 2010-05-18 21:16:04 +00:00
Jakob Stoklund Olesen 663543b4d7 Properly handle multiple definitions of a virtual register in the same 
instruction.

This can happen on ARM:

>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>

llvm-svn: 104056
 2010-05-18 21:10:50 +00:00
Ted Kremenek 49be9e0819 Teach CursorVisitor about duplicate ObjCPropertyDecls that can arise because of a current 
design limitation in how we handle Objective-C class extensions.  This was causing the CursorVisitor
to essentially visit an @property twice (once in the @interface, the other in the class extension).
Fixes <rdar://problem/7410145>.

llvm-svn: 104055
 2010-05-18 21:09:07 +00:00
Dale Johannesen 6338d15939 Test passed on ppc, to my surprise; if it worked 
there it may work everywhere...

llvm-svn: 104053
 2010-05-18 20:47:04 +00:00
Howard Hinnant ecbb921cbf [rand.dist.norm.t] 
llvm-svn: 104052
 2010-05-18 20:08:04 +00:00
Evan Cheng 45b3f702ab Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices. 
llvm-svn: 104051
 2010-05-18 20:07:47 +00:00
Evan Cheng e7fc64a5c9 Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE. 
llvm-svn: 104050
 2010-05-18 20:03:28 +00:00
Dale Johannesen fb7df5317a Testcase for llvm-gcc checkin 104042. 
llvm-svn: 104043
 2010-05-18 19:03:51 +00:00
Fariborz Jahanian 87b915a9bc These test now run in objective-c++ mode we well. 
llvm-svn: 104041
 2010-05-18 18:24:06 +00:00
Kevin Enderby 7bcc9e9450 Incorporate Daniel's suggestion and use !isdigit(CurPtr[0]) and not 
CurPtr[0] == '\n' when testing the character after a "0b" when looking
to see if it part of a something like "jmp 0b".

llvm-svn: 104039
 2010-05-18 18:09:20 +00:00
Kevin Enderby 53e0631516 Fixed the problem with a branch to "0b" that was not parsed by llvm-mc 
correctly.  The Lexer was incorrectly eating the newline casusing it to branch
to address 0.  Updated the test case to use a "0:" label and a branch to "0b".

llvm-svn: 104038
 2010-05-18 17:51:35 +00:00
Douglas Gregor 162b419a02 Add missing test case, provided by Steven Watanabe. 
llvm-svn: 104037
 2010-05-18 17:43:51 +00:00
Howard Hinnant e31e36f910 [rand.dist.norm.f] 
llvm-svn: 104035
 2010-05-18 17:32:30 +00:00
Jakob Stoklund Olesen 4843178d6b Teach the machine code verifier to use getSubRegisterRegClass(). 
The old approach was wrong. It had an off-by-one error.

llvm-svn: 104034
 2010-05-18 17:31:12 +00:00
Daniel Dunbar d5563f420a MC/Mach-O: Implement support for setting indirect symbol table offset in section header. 
Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

llvm-svn: 104033
 2010-05-18 17:28:24 +00:00
Daniel Dunbar f16c12d7a1 MC/Mach-O: Remove some FIXMEs. 
llvm-svn: 104032
 2010-05-18 17:28:20 +00:00
Daniel Dunbar 39617bb08a MC/Mach-O: Fail faster/harder when we see .file, which isn't yet supported. 
llvm-svn: 104031
 2010-05-18 17:28:17 +00:00
Daniel Dunbar a4820fcc78 MC/X86: Implement custom lowering to make sure we match things like 
X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

llvm-svn: 104030
 2010-05-18 17:22:24 +00:00
Daniel Dunbar 62bc96a1a5 llc (et al): Add support for --show-encoding and --show-inst. 
llvm-svn: 104029
 2010-05-18 17:22:19 +00:00