Commit Graph

403974 Commits

Author SHA1 Message Date
Jon Chesterfield 2c37ae6d14 [nfc] Refactor CGGPUBuiltin to help review D112680 2021-11-08 15:00:08 +00:00
Mindong Chen 495e258fd7 [AArch64][SVE] Add FP types to the supported SVE structure load/stores vector type list
This adds FP type support to the SVE Container type list as a supplement to D112303.

Reviewed By: peterwaller-arm, paulwalker-arm

Differential Revision: https://reviews.llvm.org/D113333
2021-11-08 22:29:08 +08:00
Quinn Pham c3b15b71ce [NFC] Inclusive Language: change master to main for .chm files
[NFC] As part of using inclusive language within the llvm project,
this patch replaces master with main when referring to `.chm` files.

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D113299
2021-11-08 08:23:04 -06:00
Denys Petrov a12bfac292 [analyzer] Retrieve a value from list initialization of multi-dimensional array declaration.
Summary: Add support of multi-dimensional arrays in `RegionStoreManager::getBindingForElement`. Handle nested ElementRegion's getting offsets and checking for being in bounds. Get values from the nested initialization lists using obtained offsets.

Differential Revision: https://reviews.llvm.org/D111654
2021-11-08 16:17:55 +02:00
Simon Pilgrim f059b04f7b [DAG] Add SelectionDAG::ComputeMinSignedBits helper
As suggested on D113371, this adds a wrapper to SelectionDAG::ComputeNumSignBits, similar to the llvm::ComputeMinSignedBits wrapper.

I've included some usage, its not exhaustive, just the more obvious cases where the intention is obvious.

Differential Revision: https://reviews.llvm.org/D113396
2021-11-08 14:12:45 +00:00
Anton Afanasyev fba1f36d13 [Test][SCCP] Precommit tests for PR52253 2021-11-08 16:59:38 +03:00
Anton Afanasyev 2118623330 [Test][SCCP] Update autogenerated test before precommit 2021-11-08 16:59:38 +03:00
David Sherwood 8d38c24fb6 [SVE][CodeGen] Improve codegen for some FP insert_subvector cases
When inserting an unpacked FP subvector into a packed vector we
can simply cast the unpacked value into a packed value, since
both types are legal for SVE. We can then use this as the input
for the UZP instruction. This avoids us expanding the operation
by going through the stack.

Differential Revision: https://reviews.llvm.org/D113270
2021-11-08 13:45:55 +00:00
Zahira Ammarguellat 438437cbb6 Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables FFP-CONTRACT
FMA is enabled.

Fix for https://bugs.llvm.org/show_bug.cgi?id=50222
2021-11-08 08:35:19 -05:00
Anastasia Stulova a10a69fe9c [SPIR-V] Add SPIR-V triple and clang target info.
Add new triple and target info for ‘spirv32’ and ‘spirv64’ and,
thus, enabling clang (LLVM IR) code emission to SPIR-V target.

The target for SPIR-V is mostly reused from SPIR by derivation
from a common base class since IR output for SPIR-V is mostly
the same as SPIR. Some refactoring are made accordingly.

Added and updated tests for parts that are different between
SPIR and SPIR-V.

Patch by linjamaki (Henry Linjamäki)!

Differential Revision: https://reviews.llvm.org/D109144
2021-11-08 13:34:10 +00:00
Nico Weber 0425087b8b Revert "Making the code compliant to the documentation about Floating Point"
This reverts commit 17d9560294.
Breaks check-clang everywhere, see e.g.:
https://lab.llvm.org/buildbot/#/builders/105/builds/17229
https://lab.llvm.org/buildbot/#/builders/109/builds/25831
https://lab.llvm.org/buildbot/#/builders/188/builds/5493
https://lab.llvm.org/buildbot/#/builders/123/builds/7073
2021-11-08 08:32:42 -05:00
Valentin Clement 7e92b759ed
[fir] Add fir.box type conversion
This patch add the `!fir.box` type conversion to llvm.
`fir.box` is converted to the descriptor as defined in the ISO_Fortran_binding.h
and the addendum defined in descriptor.h.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D113288

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
2021-11-08 14:18:11 +01:00
Zahira Ammarguellat 17d9560294 Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables FFP-CONTRACT
FMA is enabled.

Fix for https://bugs.llvm.org/show_bug.cgi?id=50222
2021-11-08 07:51:29 -05:00
Dmitry Makogon 8d4eba6c0d Revert "[IndVars] Pass TTI to replaceCongruentIVs"
This reverts commit db289340c8.

The patch caused 2 crashes with expensive checks enabled.
2021-11-08 19:35:14 +07:00
Matt 4a59694ba1 [AArch64][SVE] Combine FADD and FMUL aarch64 intrinsics to FMLA
This is a refinement to the work in
https://reviews.llvm.org/D111638

Fold (fadd p a (fmul p b c)) into (fma p a b c)

Differential Revision: https://reviews.llvm.org/D113095
2021-11-08 12:22:38 +00:00
Dmitry Makogon db289340c8 [IndVars] Pass TTI to replaceCongruentIVs
In IndVarSimplify after simplifying and extending loop IVs we call 'replaceCongruentIVs'.
This function optionally takes a TTI argument to be able to replace narrow IVs uses
with truncates of the widest one.
For some reason the TTI wasn't passed to the function, so it couldn't perform such
transform.
This patch fixes it.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D113024
2021-11-08 19:20:53 +07:00
Simon Pilgrim f60d3ec0c7 [DAG] Add BuildVectorSDNode::getConstantRawBits helper
We have several places where we need to extract the raw bits data from a BUILD_VECTOR node, so consolidate this to a single helper function that handles Undefs and Integer/FP constants, including implicit truncation.

This should make it easier to extend D113202 to handle more constant folding of bitcasted constant data.

Differential Revision: https://reviews.llvm.org/D113351
2021-11-08 12:07:38 +00:00
Tobias Gysi 1726c956ae [mlir][linalg] Improve hoist padding buffer size computation.
Adapt the Fourier Motzkin elimination to take into account affine computations happening outside of the cloned loop nest.

Depends On D112713

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D112838
2021-11-08 12:02:57 +00:00
@t-msn 0808d956c4 [OpenMP] libomp: Fix handling of barrier pattern environment variables
It is better to set all barrier patterns to use "dist" when at least
one environment variable specifies "dist". Otherwise if only one
environment is set to "dist" and others left blank inadvertently,
it would result in mixing dist barrier with default hyper barrier
pattern.

Differential Revision: https://reviews.llvm.org/D112597
2021-11-08 15:01:26 +03:00
Andrzej Warzynski ddd11b9a4b [flang][CodeGen] Transform `fir.call` to `llvm.call`
This patch extends the `FIRToLLVMLowering` pass in Flang by adding a
hook to transform `fir.call` to `llvm.call`.

This is part of the upstreaming effort from the `fir-dev` branch in [1].

[1] https://github.com/flang-compiler/f18-llvm-project

Patch originally written by:
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>

Differential Revision: https://reviews.llvm.org/D113278
2021-11-08 11:43:54 +00:00
Simon Moll c2b91eef27 [VE] default to integrated asm in AsmInfo
VE integrated asm has been the default in Clang. Also use the default setting for integrated asm in the backend.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D113384
2021-11-08 11:58:29 +01:00
Simon Pilgrim 1f60302a37 [AArch64] Precommit i256 test from D111530 2021-11-08 10:47:57 +00:00
Tobias Gysi 9fbcad3298 [mlir][linalg] Improve the padding packing loop computation.
The revision updates the packing loop search in hoist padding. Instead of considering all loops in the backward slice, we now compute a separate backward slice containing the index computations only. This modification ensures we do not add packing loops that are not used to index the packed buffer due to spurious dependencies. One instance where such spurious dependencies can appear is the extract slice operation introduced between the tile loops of a double tiling.

Depends On D112412

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D112713
2021-11-08 10:20:33 +00:00
David Green a982940eb5 [AArch64] Combine fptoi.sat(fmul) to fixed point cvtf
We already have patterns for fptosi and fptoui plus fmul to fixed point
convert, this adds equivalent patterns for fptosi.sat and fptoui.sat,
which should apply equally well for the legal saturating variants.

Differential Revision: https://reviews.llvm.org/D113199
2021-11-08 10:07:34 +00:00
Jean Perier 4375430689 [flang] Set the addendum when establishing pointer section in descriptor
If the source has an addendum, the descriptor that is being established
to describe a section over the source needs to copy the addendum so that
derived type information is correctly set in the descriptor being
established.

This allows namelist IO with derived type to work correctly.

Differential Revision: https://reviews.llvm.org/D113258
2021-11-08 11:05:31 +01:00
David Sherwood c42bb30b9e [LoopVectorize] Permit fixed-width epilogue loops for scalable vector bodies
At the moment in LoopVectorizationCostModel::selectEpilogueVectorizationFactor
we bail out if the main vector loop uses a scalable VF. This patch adds
support for generating epilogue vector loops using a fixed-width VF when the
main vector loop uses a scalable VF.

I've changed LoopVectorizationCostModel::selectEpilogueVectorizationFactor
so that we convert the scalable VF into a fixed-width VF and do profitability
checks on that instead. In addition, since the scalable and fixed-width VFs
live in different VPlans that means I had to change the calls to
LVP.hasPlanWithVFs so that we only pass in the fixed-width VF.

New tests added here:

  Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll

Differential Revision: https://reviews.llvm.org/D109432
2021-11-08 09:41:13 +00:00
Qiu Chaofan 9b5e2b5261 [PowerPC] Implement basic macro fusion in Power10
Including basic fusion types around arithmetic and logical instructions.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D111693
2021-11-08 17:23:56 +08:00
Andrew Wei bf3784b882 [AArch64] Canonicalize X*(Y+1) or X*(1-Y) to madd/msub
Performing the rearrangement for add/sub and mul instructions to match the madd/msub pattern

Reviewed By: dmgreen, sdesmalen, david-arm

Differential Revision: https://reviews.llvm.org/D111862
2021-11-08 16:49:31 +08:00
Konstantin Varlamov 12b55821a5 [libc++][NFC] Inline most of `__vector_base` into `vector`.
`__vector_base` exists for historical reasons and cannot be eliminated
entirely without breaking the ABI. Member variables are left
untouched -- this patch only does changes that clearly cannot affect the
ABI.

Differential Revision: https://reviews.llvm.org/D112976
2021-11-08 00:45:48 -08:00
Konstantin Varlamov d7ab283996 Revert "[libc++] Always define a key function for std::bad_function_call in the dylib"
This reverts commit bc74231756. It was
committed accidentally.
2021-11-08 00:44:47 -08:00
Valentin Clement 29abf2a4a4
[fir] Add test for FIR types conversion
Add a separate file to test FIR types conversion to LLVM types.
Conversion comes from `flang/lib/Optimizer/CodeGen/TypeConverter.h`

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan, awarzynski

Differential Revision: https://reviews.llvm.org/D113283
2021-11-08 09:41:39 +01:00
Louis Dionne bc74231756 [libc++] Always define a key function for std::bad_function_call in the dylib
However, whether applications rely on the std::bad_function_call vtable
being in the dylib is still controlled by the ABI macro, since changing
that would be an ABI break.

Differential Revision: https://reviews.llvm.org/D92397
2021-11-08 00:31:00 -08:00
skc7 a0633f5ccb [AMDGPU] Test Commit. NFC
Reviewed By: hsmhsm

Differential Revision: https://reviews.llvm.org/D113379
2021-11-08 07:09:09 +00:00
Esme-Yi 9b6f264d2b [XCOFF][llvm-readobj] improve the relocation output.
Summary:
	1. implemented the unexpanded relocations output.
	2. modified the expanded output format to align.

Reviewed By: shchenz, jhenderson

Differential Revision: https://reviews.llvm.org/D111700
2021-11-08 03:15:52 +00:00
Ben Shi e32cf690df [RISCV] Optimize (add (mul r, c0), c1)
Optimize (add (mul x, c0), c1) ->
         (add (mul (add x, c1/c0+1), c0), c1%c0-c0),
if c1/c0+1 and c1%c0-c0 are simm12, while c1 is not.

Optimize (add (mul x, c0), c1) ->
         (add (mul (add x, c1/c0-1), c0), c1%c0+c0),
if c1/c0-1 and c1%c0+c0 are simm12, while c1 is not.

Reviewed By: craig.topper, asb

Differential Revision: https://reviews.llvm.org/D111141
2021-11-08 02:58:25 +00:00
Chen Zheng 7c6f5950f0 [PowerPC] comment for different input register classes; nfc
Add comments to explain why XXPERMDIs and XXPERMDI have different input register
classes, vsfrc for XXPERMDIs and vsrc for XXPERMDI.

This addresses the comments in abandoned patch D113178, we keep using `f0` instead
of using `vs0` for XXPERMDIs on purpose.
2021-11-08 02:21:30 +00:00
Zi Xuan Wu 4fb282fec5 [CSKY] Add CSKY 16-bit instruction format and encoding
CSKY is a ARCH which supports mixture of 16-bit and 32-bit instructions natively,
and there is not an indivual predictor or feature to enable/disable 16-bit instruction.
So I think it's better to add 16-bit instruction early, and naturally to use 16-bit and 32-bit instructions.

Differential Revision: https://reviews.llvm.org/D112919
2021-11-08 10:02:15 +08:00
Chen Zheng 50acbbe3cd [AsmPrinter][ORE] use correct opcode name
Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D113173
2021-11-08 01:51:24 +00:00
Chen Zheng c7d27f90e7 [ORE][AsmPrinter] add testcase for D113173; NFC 2021-11-08 01:47:22 +00:00
Kazu Hirata 0d182d9d1e [Transforms] Use make_early_inc_range (NFC) 2021-11-07 17:03:15 -08:00
Simon Pilgrim 55e4cd8485 [X86][AVX2] Recognise 256-bit truncation shuffles and mask 256-bit source
For v8i16 shuffle patterns that are lowered with AND+PACKUS, check to see if the sources are from a 256-bit vector and perform the masking using BLENDW at the 256-bit level.

With the test changes we can see more examples of duplicate XMM/YMM zero vectors (PR26018) :(
2021-11-07 21:24:55 +00:00
Valentin Clement 54c563474a
[fir] Add fir.extract_value and fir.insert_value conversion
This patch add the conversion pattern for fir.extract_value
and fir.insert_value. fir.extract_value is lowered to llvm.extractvalue
anf fir.insert_value is lowered to llvm.insertvalue.
This patch also adds the type conversion for the BoxType and RecordType
needed to have some comprehensive tests.

This patch is part of the upstreaming effort from fir-dev branch.

This patch was landed and reverted once.
TypeBuilderFunc getModel<Fortran::ISO::CFI_index_t>() was clashing
with getModel<long long> on windows since they both are 64 bits
signed interger. On linux CFI_index_t is long. Change CFI_index_t
to getModel<long>.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D112961

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2021-11-07 21:59:01 +01:00
Nikita Popov 2060895c9c [ConstantRange] Add exact union/intersect (NFC)
For some optimizations on comparisons it's necessary that the
union/intersect is exact and not a superset. Add methods that
return Optional<ConstantRange> only if the result is exact.

For the sake of simplicity this is implemented by comparing
the subset and superset approximations for now, but it should be
possible to do this more directly, as unionWith() and intersectWith()
already distinguish the cases where the result is imprecise for the
preferred range type functionality.
2021-11-07 21:46:06 +01:00
Nikita Popov cf71a5ea8f [ConstantRange] Support zero size in isSizeLargerThan()
From an API perspective, it does not make a lot of sense that 0
is not a valid argument to this function. Add the exact check needed
to support it.
2021-11-07 21:22:45 +01:00
Jonas Devlieghere d09a21a0b3 [lldb] Remove failures case from TestTaggedPointerCmd
Somehow every pointer looks like it's tagged on GreenDragon. Removing
the check to unblock the bot until we can get to the bottom of this.
2021-11-07 10:40:43 -08:00
David Green 17acd6d940 [AArch64] Rewrite and update fcvt-fixed.ll. NFC
This rewrites the fcvt-fixed.ll test case to be separate functions, not
one large function with volatile global stores. It also adds fp16 and
fptoi.sat testing at the same time.
2021-11-07 18:11:49 +00:00
Nikita Popov a8c318b50e [BasicAA] Use index size instead of pointer size
When accumulating the GEP offset in BasicAA, we should use the
pointer index size rather than the pointer size.

Differential Revision: https://reviews.llvm.org/D112370
2021-11-07 18:56:11 +01:00
Kazu Hirata aee86f9b6c [AMDGPU] Remove unused declaration selectSMRD (NFC)
The function body proper was removed on Feb 20, 2019 in commit
79b5c3842b.
2021-11-07 09:53:18 -08:00
Kazu Hirata 41ef3187e0 [ARM, X86] Use MachineBasicBlock::{predecessors,successors} (NFC) 2021-11-07 09:53:16 -08:00
Kazu Hirata eb1c7c1339 [AST, Analysis] Use llvm::reverse (NFC) 2021-11-07 09:53:14 -08:00