Commit Graph

6008 Commits

Author SHA1 Message Date
Nemanja Ivanovic aede24ecaa [PowerPC] Treat 'Z' inline asm constraint as a true memory constraint
We currently emit incorrect codegen for this constraint because we set it as a
constraint that allows registers. This will cause the value to be copied to the
stack and that address to be passed as the address. This is not what we want.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=42762

Differential revision: https://reviews.llvm.org/D77542
2020-05-22 07:59:21 -05:00
Craig Topper 4cd696f92f [X86] Allow avx512vp2intersect to be used with __builtin_cpu_supports.
compiler-rt and trunk libgcc support this now.
2020-05-21 21:54:54 -07:00
Zequan Wu e36076ee3a [clang] Add nomerge function attribute to clang
Differential Revision: https://reviews.llvm.org/D79121
2020-05-21 17:07:39 -07:00
Zequan Wu b0a0f01bc1 Revert "Add nomerge function attribute to clang"
This reverts commit 307e853954.
2020-05-21 16:13:18 -07:00
Zequan Wu 307e853954 Add nomerge function attribute to clang 2020-05-21 15:28:27 -07:00
Yaxun (Sam) Liu 361e4f14e3 Fix debug info for NoDebug attr
NoDebug attr does not totally eliminate debug info about a function when
inlining is enabled. This is inconsistent with when inlining is disabled.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D79967
2020-05-21 09:02:56 -04:00
Melanie Blower 827be690dc [clang] FastMathFlags.allowContract should be initialized only from FPFeatures.allowFPContractAcrossStatement
Summary: Fix bug introduced in D72841 adding support for pragma float_control

Reviewers: rjmccall, Anastasia

Differential Revision: https://reviews.llvm.org/D79903
2020-05-20 06:19:10 -07:00
Eli Friedman 62f3ef2b53 [CGCall] Annotate references with "align" attribute.
If we're going to assume references are dereferenceable, we should also
assume they're aligned: otherwise, we can't actually dereference them.

See also D80072.

Differential Revision: https://reviews.llvm.org/D80166
2020-05-19 20:21:30 -07:00
jasonliu 7f5d91d3ff [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX
Summary:
Created AIXABIInfo and AIXTargetCodeGenInfo for AIX ABI.

Reviewed By: Xiangling_L, ZarkoCA

Differential Revision: https://reviews.llvm.org/D79035
2020-05-19 15:00:48 +00:00
Xiang1 Zhang bcc0c894f3 Add cet.h for writing CET-enabled assembly code
Summary:
Add x86 feature with IBT and/or SHSTK bits to ELF program property if they  are enabled. Otherwise, contents in this header file are unused.
This file is mainly design for assembly source code which want to enable CET

Reviewers: hjl.tools, annita.zhang, LuoYuanke, craig.topper, tstellar, pengfei, rsmith

Reviewed By: LuoYuanke

Subscribers: cfe-commits, mgorny

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79617
2020-05-19 14:03:17 +08:00
Xiang1 Zhang 62a9eca859 Test asm-cet.S fail for window clang
This reverts commit e7e84ff24a.
2020-05-19 13:18:05 +08:00
Xiang1 Zhang e7e84ff24a Add cet.h for writing CET-enabled assembly code
Summary:
Add x86 feature with IBT and/or SHSTK bits to ELF program property if they  are enabled. Otherwise, contents in this header file are unused.
This file is mainly design for assembly source code which want to enable CET

Reviewers: hjl.tools, annita.zhang, LuoYuanke, craig.topper, tstellar, pengfei, rsmith

Reviewed By: LuoYuanke

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D79617
2020-05-19 10:37:46 +08:00
Francesco Petrogalli b593bfd4d8 [clang][SveEmitter] SVE builtins for `svusdot` and `svsudot` ACLE.
Summary:
Intrinsics, guarded by `__ARM_FEATURE_SVE_MATMUL_INT8`:

* svusdot[_s32]
* svusdot[_n_s32]
* svusdot_lane[_s32]
* svsudot[_s32]
* svsudot[_n_s32]
* svsudot_lane[_s32]

Reviewers: sdesmalen, efriedma, david-arm, rengolin

Subscribers: tschuett, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79877
2020-05-18 23:07:23 +00:00
Fangrui Song 82904401e3 Map -O to -O1 instead of -O2
rL82131 changed -O from -O1 to -O2, because -O1 was not different from
-O2 at that time.

GCC treats -O as -O1 and there is now work to make -O1 meaningful.
We can change -O back to -O1 again.

Reviewed By: echristo, dexonsmith, arphaman

Differential Revision: https://reviews.llvm.org/D79916
2020-05-18 15:53:41 -07:00
Francesco Petrogalli e2cc12e412 [SveEmitter] Builtins for SVE matrix multiply `mmla`.
Summary:
Guarded by __ARM_FEATURE_SVE_MATMUL_INT8:

* svmmla_u32
* svmmla_s32
* svusmmla_s32

Guarded by __ARM_FEATURE_SVE_MATMUL_FP32:

* svmmla_f32

Guarded by __ARM_FEATURE_SVE_MATMUL_FP64:

* svmmla_f64

Reviewers: sdesmalen, kmclaughlin, efriedma, rengolin

Subscribers: tschuett, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79639
2020-05-18 22:02:19 +00:00
Jim Lin 7ee479a760 [RISCV] Fix passing two floating-point values in complex separately by two GPRs on RV64
Summary:
This patch fixed the error of counting the remaining FPRs. Complex floating-point
values should be passed by two FPRs for the hard-float ABI. If no two FPRs are
available, it should be passed via a 64-bit GPR (fp+fp). `ArgFPRsLeft` is only
decreased one while the type is complex floating-point. It causes two floating-point
values in the complex are passed separately by two GPRs.

Reviewers: asb, luismarques, lenary

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, s.egerton, pzheng, sameer.abuasal, apazos, evandro, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79770
2020-05-18 13:13:22 +08:00
Hubert Tong 3f5fc73a9d [test][ARM][CMSE] Use clang_cc1 in arm_cmse.h tests
Summary:
The `arm_cmse.h` header includes standard headers, but some tests that
include this header explicitly specify a target. The standard headers
found via the standard include paths need not be compatible with the
explicitly-specified target from the tests. In order to avoid test
failures caused by such incompatibility, this patch uses `%clang_cc1`,
which doesn't pick up the host system headers.

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D79693
2020-05-15 17:34:00 -04:00
Nikita Popov f89f7da999 [IR] Convert null-pointer-is-valid into an enum attribute
The "null-pointer-is-valid" attribute needs to be checked by many
pointer-related combines. To make the check more efficient, convert
it from a string into an enum attribute.

In the future, this attribute may be replaced with data layout
properties.

Differential Revision: https://reviews.llvm.org/D78862
2020-05-15 19:41:07 +02:00
Yonghong Song 072cde03aa [Clang][BPF] implement __builtin_btf_type_id() builtin function
Such a builtin function is mostly useful to preserve btf type id
for non-global data. For example,
   extern void foo(..., void *data, int size);
   int test(...) {
     struct t { int a; int b; int c; } d;
     d.a = ...; d.b = ...; d.c = ...;
     foo(..., &d, sizeof(d));
   }

The function "foo" in the above only see raw data and does not
know what type of the data is. In certain cases, e.g., logging,
the additional type information will help pretty print.

This patch implemented a BPF specific builtin
  u32 btf_type_id = __builtin_btf_type_id(param, flag)
which will return a btf type id for the "param".
flag == 0 will indicate a BTF local relocation,
which means btf type_id only adjusted when bpf program BTF changes.
flag == 1 will indicate a BTF remote relocation,
which means btf type_id is adjusted against linux kernel or
future other entities.

Differential Revision: https://reviews.llvm.org/D74668
2020-05-15 09:44:54 -07:00
Melanie Blower 7b8e306560 [clang] Fix bug in #pragma float_control(push/pop)
Summary: #pragma float_control(pop) was failing to restore the expected
floating point settings because the settings were not correctly preserved
at #pragma float_control(push).
2020-05-14 05:58:11 -07:00
Huihui Zhang fd842d3626 [CodeGen][NFC] Fix test/CodeGen/pr45476.cpp to specify target triple.
Summary:
Use explicit target triple to match more accurately the output for libcall
or native atomic.

Similar to D74847, without explicit target triple, this test will fail for ARM.

This patch update test pr45476.cpp to check for both native atomic and libcall.

Reviewers: efriedma, ekatz, rjmccall, rsmith, luismarques

Reviewed By: efriedma

Subscribers: kristof.beyls, jfb, cfe-commits, llvm-commits

Tags: #llvm, #clang

Differential Revision: https://reviews.llvm.org/D79914
2020-05-13 18:04:14 -07:00
Alina Sbirlea bd541b217f [NewPassManager] Add assertions when getting statefull cached analysis.
Summary:
Analyses that are statefull should not be retrieved through a proxy from
an outer IR unit, as these analyses are only invalidated at the end of
the inner IR unit manager.
This patch disallows getting the outer manager and provides an API to
get a cached analysis through the proxy. If the analysis is not
stateless, the call to getCachedResult will assert.

Reviewers: chandlerc

Subscribers: mehdi_amini, eraman, hiraditya, zzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72893
2020-05-13 12:38:38 -07:00
Joel E. Denny a1fd188223 [FileCheck] Support comment directives
Sometimes you want to disable a FileCheck directive without removing
it entirely, or you want to write comments that mention a directive by
name.  The `COM:` directive makes it easy to do this.  For example,
you might have:

```
; X32: pinsrd_1:
; X32:    pinsrd $1, 4(%esp), %xmm0

; COM: FIXME: X64 isn't working correctly yet for this part of codegen, but
; COM: X64 will have something similar to X32:
; COM:
; COM:   X64: pinsrd_1:
; COM:   X64:    pinsrd $1, %edi, %xmm0
```

Without this patch, you need to use some combination of rewording and
directive syntax mangling to prevent FileCheck from recognizing the
commented occurrences of `X32:` and `X64:` above as directives.
Moreover, FileCheck diagnostics have been proposed that might complain
about the occurrences of `X64` that don't have the trailing `:`
because they look like directive typos:

  <http://lists.llvm.org/pipermail/llvm-dev/2020-April/140610.html>

I think dodging all these problems can prove tedious for test authors,
and directive syntax mangling already makes the purpose of existing
test code unclear.  `COM:` can avoid all these problems.

This patch also updates the small set of existing tests that define
`COM` as a check prefix:

- clang/test/CodeGen/default-address-space.c
- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
- clang/test/Driver/hip-device-libs.hip
- llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll

I think lit should support `COM:` as well.  Perhaps `clang -verify`
should too.

Reviewed By: jhenderson, thopre

Differential Revision: https://reviews.llvm.org/D79276
2020-05-13 11:29:48 -04:00
Thomas Lively 3d49d1cfa7 [WebAssembly] Implement pseudo-min/max SIMD instructions
Summary:
As proposed in https://github.com/WebAssembly/simd/pull/122. Since
these instructions are not yet merged to the SIMD spec proposal, this
patch makes them entirely opt-in by surfacing them only through LLVM
intrinsics and clang builtins. If these instructions are made
official, these intrinsics and builtins should be replaced with simple
instruction patterns.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D79742
2020-05-12 09:39:01 -07:00
Fangrui Song 25a95f49b0 [gcov][test] Fix clang test 2020-05-12 09:21:19 -07:00
Melanie Blower 7f2db99350 [PATCH] #pragma float_control should be permitted in namespace scope.
Summary: Erroneous error diagnostic observed in VS2017 <numeric> header
Also correction to propagate usesFPIntrin from template func to instantiation.

Reviewers: rjmccall, erichkeane (no feedback received)

Differential Revision: https://reviews.llvm.org/D79631
2020-05-12 06:10:19 -07:00
Sander de Smalen d6936be2ef [SveEmitter] Add builtins for svdup and svindex
Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D79357
2020-05-12 11:02:32 +01:00
Joel E. Denny d0e7fd6b62 Revert "[FileCheck] Support comment directives"
This reverts commit 9a9a5f9893 to try to
fix a bot:

http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/23489
2020-05-11 19:41:22 -04:00
Joel E. Denny 9a9a5f9893 [FileCheck] Support comment directives
Sometimes you want to disable a FileCheck directive without removing
it entirely, or you want to write comments that mention a directive by
name.  The `COM:` directive makes it easy to do this.  For example,
you might have:

```
; X32: pinsrd_1:
; X32:    pinsrd $1, 4(%esp), %xmm0

; COM: FIXME: X64 isn't working correctly yet for this part of codegen, but
; COM: X64 will have something similar to X32:
; COM:
; COM:   X64: pinsrd_1:
; COM:   X64:    pinsrd $1, %edi, %xmm0
```

Without this patch, you need to use some combination of rewording and
directive syntax mangling to prevent FileCheck from recognizing the
commented occurrences of `X32:` and `X64:` above as directives.
Moreover, FileCheck diagnostics have been proposed that might complain
about the occurrences of `X64` that don't have the trailing `:`
because they look like directive typos:

  <http://lists.llvm.org/pipermail/llvm-dev/2020-April/140610.html>

I think dodging all these problems can prove tedious for test authors,
and directive syntax mangling already makes the purpose of existing
test code unclear.  `COM:` can avoid all these problems.

This patch also updates the small set of existing tests that define
`COM` as a check prefix:

- clang/test/CodeGen/default-address-space.c
- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
- clang/test/Driver/hip-device-libs.hip
- llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll

I think lit should support `COM:` as well.  Perhaps `clang -verify`
should too.

Reviewed By: jhenderson, thopre

Differential Revision: https://reviews.llvm.org/D79276
2020-05-11 14:53:48 -04:00
Florian Hahn 1065869195 [Matrix] Add matrix type to Clang.
This patch adds a matrix type to Clang as described in the draft
specification in clang/docs/MatrixSupport.rst. It introduces a new option
-fenable-matrix, which can be used to enable the matrix support.

The patch adds new MatrixType and DependentSizedMatrixType types along
with the plumbing required. Loads of and stores to pointers to matrix
values are lowered to memory operations on 1-D IR arrays. After loading,
the loaded values are cast to a vector. This ensures matrix values use
the alignment of the element type, instead of LLVM's large vector
alignment.

The operators and builtins described in the draft spec will will be added in
follow-up patches.

Reviewers: martong, rsmith, Bigcheese, anemet, dexonsmith, rjmccall, aaron.ballman

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D72281
2020-05-11 18:55:45 +01:00
Thomas Lively 8e3e56f2a3 [WebAssembly] Add wasm-specific vector shuffle builtin and intrinsic
Summary:

Although using `__builtin_shufflevector` and the `shufflevector`
instruction works fine, they are not opaque to the optimizer. As a
result, DAGCombine can potentially reduce the number of shuffles and
change the shuffle masks. This is unexpected behavior for users of the
WebAssembly SIMD intrinsics who have crafted their shuffles to
optimize the code generated by engines. This patch solves the problem
by adding a new shuffle intrinsic that is opaque to the optimizers in
line with the decision of the WebAssembly SIMD contributors at
https://github.com/WebAssembly/simd/issues/196#issuecomment-622494748. In
the future we may implement custom DAG combines to properly optimize
shuffles and replace this solution.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D66983
2020-05-11 10:01:55 -07:00
Kamlesh Kumar 9aee35bcc9 [Clang] Fix the incorrect return type of atomic_is_lock_free
Fixing the return type of atomic_is_lock_free as per
https://en.cppreference.com/w/c/atomic/atomic_is_lock_free

Differential Revision: https://reviews.llvm.org/D79504
2020-05-11 10:48:35 -04:00
Sander de Smalen 4cad97595f [SveEmitter] Add builtins for svmovlb and svmovlt
These builtins are expanded in CGBuiltin to use intrinsics
for (signed/unsigned) shift left long top/bottom.

Reviewers: efriedma, SjoerdMeijer

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D79579
2020-05-11 09:41:58 +01:00
Fangrui Song 25544ce2df [gcov] Default coverage version to '407*' and delete CC1 option -coverage-cfg-checksum
Defaulting to -Xclang -coverage-version='407*' makes .gcno/.gcda
compatible with gcov [4.7,8)

In addition, delete clang::CodeGenOptionsBase::CoverageExtraChecksum and GCOVOptions::UseCfgChecksum.
We can infer the information from the version.

With this change, .gcda files produced by `clang --coverage a.o` linked executable can be read by gcov 4.7~7.
We don't need other -Xclang -coverage* options.
There may be a mismatching version warning, though.

(Note, GCC r173147 "split checksum into cfg checksum and line checksum"
 made gcov 4.7 incompatible with previous versions.)
2020-05-10 16:14:07 -07:00
Fangrui Song 13a633b438 [gcov] Delete CC1 option -coverage-no-function-names-in-data
rL144865 incorrectly wrote function names for GCOV_TAG_FUNCTION
(this might be part of the reasons the header says
"We emit files in a corrupt version of GCOV's "gcda" file format").

rL176173 and rL177475 realized the problem and introduced -coverage-no-function-names-in-data
to work around the issue. (However, the description is wrong.
libgcov never writes function names, even before GCC 4.2).

In reality, the linker command line has to look like:

clang --coverage -Xclang -coverage-version='407*' -Xclang -coverage-cfg-checksum -Xclang -coverage-no-function-names-in-data

Failing to pass -coverage-no-function-names-in-data can make gcov 4.7~7
either produce wrong results (for one gcov-4.9 program, I see "No executable lines")
or segfault (gcov-7).
(gcov-8 uses an incompatible format.)

This patch deletes -coverage-no-function-names-in-data and the related
function names support from libclang_rt.profile
2020-05-10 12:37:44 -07:00
Sanjay Patel d02b3aba37 [CodeGen] fix test to be (mostly) independent of LLVM optimizer; NFC
This test would break with the proposed change to IR canonicalization
in D79171.

The test tried to do the right thing by only using -mem2reg with opt,
but it was using -O3 before that step, so the opt part was meaningless.
2020-05-10 11:25:37 -04:00
Sanjay Patel bcc5ed7b24 [CodeGen] fix test to be (mostly) independent of LLVM optimizer; NFC
This test would break with the proposed change to IR canonicalization
in D79171. The raw unoptimized IR from clang is massive, so I've
replaced -instcombine with -mem2reg to make it more manageable,
but still be unlikely to break with unrelated changed to optimization.
2020-05-10 11:19:43 -04:00
Thomas Lively ebb69b8baf [clang][WebAssembly] Only expose wait and notify builtins with atomics
Summary:
Since the underlying wait and notify instructions are only available
when the atomics feature is enabled, it only makes sense to expose
their builtin functions when atomics are enabled.

Reviewers: aheejin, sunfish

Subscribers: dschuff, sbc100, jgravelle-google, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79534
2020-05-08 13:54:29 -07:00
Sriraman Tallam e8147ad822 Uniuqe Names for Internal Linkage Symbols.
This is a standalone patch and this would help Propeller do a better job of code
layout as it can accurately attribute the profiles to the right internal linkage
function.

This also helps SampledFDO/AutoFDO correctly associate sampled profiles to the
right internal function. Currently, if there is more than one internal symbol
foo, their profiles are aggregated by SampledFDO.

This patch adds a new clang option, -funique-internal-funcnames, to generate
unique names for functions with internal linkage. This patch appends the md5
hash of the module name to the function symbol as a best effort to generate a
unique name for symbols with internal linkage.

Differential Revision: https://reviews.llvm.org/D73307
2020-05-07 18:18:37 -07:00
Sander de Smalen 96a581d0f0 [SveEmitter] Add builtins for SVE2 svtbx (extended table lookup)
This patch adds builtins for:
- svtbx
2020-05-07 16:15:57 +01:00
Sander de Smalen e46043bba7 [SveEmitter] Add builtins for SVE2 Optional extensions (AES, SHA3, SM4, BITPERM)
This patch adds various builtins under their corresponding feature macros:

Defined under __ARM_FEATURE_SVE2_AES:
- svaesd
- svaese
- svaesimc
- svaesmc
- svpmullb_pair
- svpmullt_pair

Defined under __ARM_FEATURE_SVE2_SHA3:
- svrax1

Defined under __ARM_FEATURE_SVE2_SM4:
- svsm4e
- svsm4ekey

Defined under __ARM_FEATURE_SVE2_BITPERM:
- svbdep
- svbext
- svbgrp
2020-05-07 16:15:57 +01:00
Sander de Smalen f22cdc3cc3 [SveEmitter] Add builtins for SVE2 Character match instructions
This patch adds builtins for:
- svmatch
- svnmatch
2020-05-07 16:15:57 +01:00
Sander de Smalen ae652241bd [SveEmitter] Add builtins for SVE2 Vector histogram count instructions
This patch adds builtins for:
- svhistcnt
- svhistseg
2020-05-07 16:15:57 +01:00
Sander de Smalen fa0371f4fd [SveEmitter] Add builtins for SVE2 Floating-point integer binary logarithm instructions
This patch adds builtins for:
- svlogb
2020-05-07 16:15:57 +01:00
Sander de Smalen 086722c18e [SveEmitter] Add builtins for SVE2 Floating-point widening multiply-accumulate
This patch adds builtins for:
- svmlalb, svmlalb_lane
- svmlalt, svmlalt_lane
- svmlslb, svmlslb_lane
- svmlslt, svmlslt_lane
2020-05-07 16:15:57 +01:00
Sander de Smalen e76256e7c1 [SveEmitter] Add builtins for SVE2 Complex integer dot product
This patch adds builtins for:
- svcdot, svcdot_lane
2020-05-07 16:09:31 +01:00
Sander de Smalen 867bfae93f [SveEmitter] Add builtins for SVE2 Widening complex integer arithmetic
This patch adds builtins for:
- svaddlbt
- svqdmlalbt
- svqdmlslbt
- svsublbt
- svsubltb
2020-05-07 16:09:31 +01:00
Sander de Smalen f525820755 [SveEmitter] Add builtins for SVE2 Narrowing DSP operations
This patch adds builtins for:
- svaddhnb
- svaddhnt
- svqrshrnb
- svqrshrnt
- svqrshrunb
- svqrshrunt
- svqshrnb
- svqshrnt
- svqshrunb
- svqshrunt
- svqxtnb
- svqxtnt
- svqxtunb
- svqxtunt
- svraddhnb
- svraddhnt
- svrshrnb
- svrshrnt
- svrsubhnb
- svrsubhnt
- svshrnb
- svshrnt
- svsubhnb
- svsubhnt
2020-05-07 16:09:31 +01:00
Sander de Smalen b0b658e7fc [SveEmitter] Add builtins for SVE2 Widening DSP operations
This patch adds builtins for:
- svabalb
- svabalt
- svabdlb
- svabdlt
- svaddlb
- svaddlt
- svaddwb
- svaddwt
- svmlalb, svmlalb_lane
- svmlalt, svmlalt_lane
- svmlslb, svmlslb_lane
- svmlslt, svmlslt_lane
- svmullb, svmullb_lane
- svmullt, svmullt_lane
- svqdmlalb, svqdmlalb_lane
- svqdmlalt, svqdmlalt_lane
- svqdmlslb, svqdmlslb_lane
- svqdmlslt, svqdmlslt_lane
- svqdmullb, svqdmullb_lane
- svqdmullt, svqdmullt_lane
- svshllb
- svshllt
- svsublb
- svsublt
- svsubwb
- svsubwt
2020-05-07 16:09:31 +01:00
Sander de Smalen ce7f50c2ce [SveEmitter] Add builtins for SVE2 Uniform complex integer arithmetic
This patch adds builtins for:
- svcadd
- svqcadd
- svcmla
- svcmla_lane
- svqrdcmlah
- svqrdcmlah_lane
2020-05-07 16:09:31 +01:00
Sander de Smalen 5e9bc21eea [SveEmitter] Add builtins for SVE2 Multiplication by indexed elements
This patch adds builtins for:
- svmla_lane
- svmls_lane
- svmul_lane
2020-05-07 15:21:37 +01:00
Sander de Smalen 60615cfb43 [SveEmitter] Add builtins for SVE2 Large integer arithmetic
This patch adds builtins for:
- svadclb
- svadclt
- svsbclb
- svsbclt
2020-05-07 15:21:37 +01:00
Sander de Smalen 36aab0c055 [SveEmitter] Add builtins for SVE2 Bitwise ternary logical instructions
This patch adds builtins for:
- svbcax
- svbsl
- svbsl1n
- svbsl2n
- sveor3
- svnbsl
- svxar
2020-05-07 15:21:37 +01:00
Sander de Smalen b0348af108 [SveEmitter] Add builtins for SVE2 widening pairwise arithmetic
This patch adds builtins for:
- svadalp
2020-05-07 15:21:37 +01:00
Sander de Smalen 7ff05002d0 [SveEmitter] Add builtins for SVE2 Non-widening pairwise arithmetic
This patch adds builtins for:
- svaddp
- svmaxnmp
- svmaxp
- svminnmp
- svminp
2020-05-07 15:21:37 +01:00
Sander de Smalen 0d22076531 [SveEmitter] Add builtins for SVE2 uniform DSP operations
This patch adds builtins for:
- svqdmulh, svqdmulh_lane
- svqrdmlah, svqrdmlah_lane
- svqrdmlsh, svqrdmlsh_lane
- svqrdmulh, svqrdmulh_lane
2020-05-07 13:31:46 +01:00
Sander de Smalen 5fa0eeec6e [SveEmitter] Add more SVE2 builtins for shift operations
This patch adds builtins for:
- svqshlu
- svrshr
- svrsra
- svsli
- svsra
- svsri
2020-05-07 13:31:46 +01:00
Sander de Smalen dc2986f9dc [SveEmitter] Add builtins for SVE2 saturating shift left and addition
This patch adds builtins for:
- svqrshl
- svqshl
- svsqadd
- svuqadd
2020-05-07 13:31:46 +01:00
Sander de Smalen b32d14c30e [SveEmitter] Add builtins for SVE2 uniform DSP operations
This patch adds builtins for:
- svqadd, svhadd, svrhadd
- svqsub, svhsub, svqusbr, svhsubr
- svqabs
- svqneg
- svrecpe
- svrsqrte
2020-05-07 13:31:46 +01:00
Sander de Smalen 35de496550 [SveEmitter] Add builtins for svqdecp and svqincp
This patch adds builtins for saturating increment/decrement by svcntp,
in scalar and vector forms.
2020-05-07 13:31:46 +01:00
Sander de Smalen cac06263a4 [SveEmitter] Add builtins for svinsr 2020-05-07 13:31:46 +01:00
Sander de Smalen 4f94e1a9f7 [SveEmitter] Add builtins for svasrd (zeroing/undef predication)
This patch adds builtins for arithmetic shift right (round towards zero)
instructions for zeroing (_z) and undef (_x) predication.
2020-05-07 12:28:18 +01:00
Sander de Smalen dbc6a07bcc [SveEmitter] Add builtins for address calculations.
This patch adds builtins for:
- svadrb, svadrh, svadrw, svadrd
2020-05-07 12:28:18 +01:00
Sander de Smalen 827c8b06d3 [SveEmitter] Add builtins for svcntp 2020-05-07 12:28:18 +01:00
Sander de Smalen ac894a5181 [SveEmitter] Add builtins for FFR manipulation
This patch adds builtins for:
- svrdffr, svrdffr_z
- svsetffr
- svwrffr
2020-05-07 12:28:18 +01:00
Sander de Smalen 91cb13f90d [SveEmitter] Add builtins for svqadd, svqsub and svdot
This patch adds builtins for saturating add/sub instructions:
- svqadd, svqadd_n
- svqsub, svqsub_n

and builtins for dot product instructions:
- svdot, svdot_lane
2020-05-07 12:28:18 +01:00
Sander de Smalen 3cb8b4c193 [SveEmitter] Add builtins for SVE2 Polynomial arithmetic
This patch adds builtins for:
- sveorbt
- sveortb
- svpmul
- svpmullb, svpmullb_pair
- svpmullt, svpmullt_pair

The svpmullb and svpmullt builtins are expressed using the svpmullb_pair
and svpmullt_pair LLVM IR intrinsics, respectively.

Reviewers: SjoerdMeijer, efriedma, rengolin

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D79480
2020-05-07 11:53:04 +01:00
Craig Topper 16c800b8b7 [X86] Remove support for Y0 constraint as an alias for Yz in inline assembly.
Neither gcc or icc support this. Split out from D79472. I want
to remove more, but it looks like icc does support some things
gcc doesn't and I need to double check our internal test suites.
2020-05-06 14:58:53 -07:00
Artem Belevich 314f99e7d4 [CUDA] Enable existing builtins for PTX7.0 as well.
Differential Revision: https://reviews.llvm.org/D79515
2020-05-06 14:24:21 -07:00
Melanie Blower e5578013b1 When pragma FENV_ACCESS is ignored do not modify Sema.CurFPFeatures
Bug reported by @uabelho against reviews.llvm.org/D72841

Reviewers: rjmccall

Differential Revision: https://reviews.llvm.org/D79510
2020-05-06 13:18:59 -07:00
Melanie Blower c355bec749 Add support for #pragma clang fp reassociate(on|off)
Reviewers: rjmccall, erichkeane, sepavloff

Differential Revision: https://reviews.llvm.org/D78827
2020-05-06 08:05:44 -07:00
Erich Keane 8a1c999c9b Implement _ExtInt ABI for all ABIs in Clang, enable type for ABIs
This is the result of an audit of all of the ABIs in clang to implement
and enable the type for those targets.

Additionally, this finds an issue with integer-promotion passing for a
few platforms when using _ExtInt of < int, so this also corrects that
resulting in signext/zeroext being on a params of those types in some
platforms.

Differential Revisions: https://reviews.llvm.org/D79118
2020-05-06 06:52:18 -07:00
Craig Topper 0fac1c1912 [X86] Allow Yz inline assembly constraint to choose ymm0 or zmm0 when avx/avx512 are enabled and type is 256 or 512 bits
gcc supports selecting ymm0/zmm0 for the Yz constraint when used with 256 or 512 bit vector types.

Fixes PR45806

Differential Revision: https://reviews.llvm.org/D79448
2020-05-05 21:12:30 -07:00
Artem Belevich 844096b996 [CUDA] Make NVVM builtins available with CUDA-11/PTX6.5
Differential Revision: https://reviews.llvm.org/D79449
2020-05-05 15:43:32 -07:00
Sander de Smalen 5ba329059f [SveEmitter] Add builtins for svreinterpret
The reinterpret builtins are generated separately because they
need the cross product of all types, 121 functions in total,
which is inconvenient to specify in the arm_sve.td file.

Reviewers: SjoerdMeijer, efriedma, ctetreau, rengolin

Reviewed By: efriedma

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78756
2020-05-05 13:04:44 +01:00
Sander de Smalen aed6bd6f42 Reland D78750: [SveEmitter] Add builtins for svdupq and svdupq_lane
Edit: Changed a few CHECK lines into CHECK-DAG lines.

This reverts commit 90f3f62cb0.
2020-05-05 10:42:11 +01:00
Sander de Smalen 90f3f62cb0 Revert "[SveEmitter] Add builtins for svdupq and svdupq_lane"
It seems this patch broke some buildbots, so reverting until I
have had a chance to investigate.

This reverts commit 6b90a6887d.
2020-05-04 21:31:55 +01:00
Sander de Smalen 6b90a6887d [SveEmitter] Add builtins for svdupq and svdupq_lane
* svdupq builtins that duplicate scalars to every quadword of a vector
  are defined using builtins for svld1rq (load and replicate quadword).
* svdupq builtins that duplicate boolean values to fill a predicate vector
  are defined using `svcmpne`.

Reviewers: SjoerdMeijer, efriedma, ctetreau

Reviewed By: efriedma

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78750
2020-05-04 20:38:47 +01:00
Sander de Smalen 54fa46aa0a [SveEmitter] Add builtins for Int & FP reductions
This patch adds integer builtins for:
- svaddv, svandv, sveorv,
  svmaxv, svminv, svorv.

And FP builtins for:
- svadda, svaddv, svmaxv, svmaxnmv,
  svminv, svminnmv
2020-05-04 19:50:16 +01:00
Melanie Blower 7cbb495ab4 Fix LABEL match for test case for D72841 #pragma float_control 2020-05-04 07:27:40 -07:00
Melanie Blower f5360d4bb3 Reapply "Add support for #pragma float_control" with buildbot fixes
Add support for #pragma float_control

Reviewers: rjmccall, erichkeane, sepavloff

Differential Revision: https://reviews.llvm.org/D72841

This reverts commit fce82c0ed3.
2020-05-04 05:51:25 -07:00
Thomas Lively e0f52842c8 [WebAssembly] Renumber SIMD opcodes
Summary:
As described in https://github.com/WebAssembly/simd/pull/209. This is
the final reorganization of the SIMD opcode space before
standardization. It has been landed in concert with corresponding
changes in other projects in the WebAssembly SIMD ecosystem.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79224
2020-05-01 17:20:49 -07:00
Sander de Smalen 334931f54b [SveEmitter] Add builtins for shifts.
This patch adds builtins for:
- svasrd
- svlsl
- svlsr
2020-05-01 22:27:24 +01:00
Melanie Blower fce82c0ed3 Revert "Reapply "Add support for #pragma float_control" with improvements to"
This reverts commit 69aacaf699.
2020-05-01 10:31:09 -07:00
Melanie Blower 69aacaf699 Reapply "Add support for #pragma float_control" with improvements to
test cases
Add support for #pragma float_control

Reviewers: rjmccall, erichkeane, sepavloff

Differential Revision: https://reviews.llvm.org/D72841

This reverts commit 85dc033cac, and makes
corrections to the test cases that failed on buildbots.
2020-05-01 10:03:30 -07:00
Sander de Smalen 1a720d49dc [SveEmitter] Add builtins for various FP operations
Unary:
- svexpa, svtmad, svtsmul, svtssel,
  svscale, svrecpe, svrecps, svrsqrte,
  svrsqrts,

Binary:
- svabd, svadd, svdiv, svdivr,
  svmin, svmax, svminnm, svmaxnm,
  svmul, svmulx, svsub, svsubr,
  svmul_lane

Complex:
- svcadd, svcmla
2020-05-01 17:37:43 +01:00
Melanie Blower 85dc033cac Revert "Add support for #pragma float_control"
This reverts commit 4f1e9a17e9.
due to fail on buildbot, sorry for the noise
2020-05-01 06:36:58 -07:00
Melanie Blower 4f1e9a17e9 Add support for #pragma float_control
Reviewers: rjmccall, erichkeane, sepavloff

Differential Revision: https://reviews.llvm.org/D72841
2020-05-01 06:14:24 -07:00
Nikita Popov afc287e0ab Fix clang test after D76886 2020-04-30 23:42:38 +02:00
Aaron Smith 4eabd00612 [Windows SEH] Fix abnormal-exits in _try
Summary:
Per Windows SEH Spec, except _leave, all other early exits of a _try (goto/return/continue/break) are considered abnormal exits.  In those cases, the first parameter passes to its _finally funclet should be TRUE to indicate an abnormal-termination.

One way to implement abnormal exits in _try is to invoke Windows runtime _local_unwind() (MSVC approach) that will invoke _dtor funclet where abnormal-termination flag is always TRUE when calling _finally.  Obviously this approach is less optimal and is complicated to implement in Clang.

Clang today has a NormalCleanupDestSlot mechanism to dispatch multiple exits at the end of _try.  Since  _leave (or try-end fall-through) is always Indexed with 0 in that NormalCleanupDestSlot,  this fix takes the advantage of that mechanism and just passes NormalCleanupDest ID as 1st Arg to _finally.

Reviewers: rnk, eli.friedman, JosephTremoulet, asmith, efriedma

Reviewed By: efriedma

Subscribers: efriedma, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77936
2020-04-30 09:38:19 -07:00
Erich Keane b5a4deec6a [NFC] Split ext-int calling convention tests into their own file.
I'm currently auditing all of the calling convention implications of
_ExtInt for all platforms, so splitting them up into their own test will
make this a much easier task to organize.
2020-04-29 12:20:21 -07:00
Erich Keane 5a1d9c0f5a Fix x86/x86_64 calling convention for _ExtInt
After speaking with Craig Topper about some recent defects, he pointed
out that _ExtInts should be passed indirectly if larger than the largest
int register, and like ints when smaller than that.  This patch
implements that.

Note that this changed the way vaargs worked quite a bit, but they still
work.

Differential Revision: https://reviews.llvm.org/D78785
2020-04-29 11:04:25 -07:00
Sander de Smalen a4dac6d4e0 [SveEmitter] Add builtins for svmov_b and svnot_b.
These are custom expanded in CGBuiltin:

  svmov_b_z(pg, op) <=> svand_b_z(pg, op, op)
  svnot_b_z(pg, op) <=> sveor_b_z(pg, op, pg)

Reviewers: SjoerdMeijer, efriedma, ctetreau, rengolin

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D79039
2020-04-29 13:33:18 +01:00
Sander de Smalen 42a56bf63f [SveEmitter] Add builtins for gather prefetches
Patch by Andrzej Warzynski

Reviewed By: efriedma

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78677
2020-04-29 11:52:49 +01:00
Momchil Velikov 102b4105e3 [CMSE] Clear padding bits of struct/unions/fp16 passed by value
When passing a value of a struct/union type from secure to non-secure
state (that is returning from a CMSE entry function or passing an
argument to CMSE-non-secure call), there is a potential sensitive
information leak via the padding bits in the structure. It is not
possible in the general case to ensure those bits are cleared by using
Standard C/C++.

This patch makes the compiler emit code to clear such padding
bits. Since type information is lost in LLVM IR, the code generation
is done by Clang.

For each interesting record type, we build a bitmask, in which all the
bits, corresponding to user declared members, are set. Values of
record types are returned by coercing them to an integer. After the
coercion, the coerced value is masked (with bitwise AND) and then
returned by the function. In a similar manner, values of record types
are passed as arguments by coercing them to an array of integers, and
the coerced values themselves are masked.

For union types, we effectively clear only bits, which aren't part of
any member, since we don't know which is the currently active one.
The compiler will issue a warning, whenever a union is passed to
non-secure state.

Values of half-precision floating-point types are passed in the least
significant bits of a 32-bit register (GPR or FPR) with the most
significant bits unspecified. Since this is also a potential leak of
sensitive information, this patch also clears those unspecified bits.

Differential Revision: https://reviews.llvm.org/D76369
2020-04-28 17:05:58 +01:00
Sander de Smalen 43d1d52ad2 [SveEmitter] Add builtins for logical and predicate operations.
This patch adds builtins for logical ops:
- svand, svbic, sveor, svorr, svcnot, svnot

and builtins for predicate operations:
- svand_b_z, svbic_b_z, sveor_b_z, svnand_b_z, svnor_b_z, svorn_b_z, svorr_b_z
- svbrka_b_z, svbrkb_b_z, svbrkpa_b_z, svbrkpb_b_z, svbrkn_b_z
- svpfirst_b
- svpnext
- svptest_any
- svptest_first
- svptest_last
2020-04-28 16:37:17 +01:00
Sander de Smalen 476ba8127b [SveEmitter] Add builtins for zero/sign extension and bit/byte reversal.
This patch adds builtins for predicated unary builtins
svext[bhw] and svrev[bhw] and svrbit.
2020-04-28 14:06:51 +01:00
Sander de Smalen c57720125f [SveEmitter] Add builtins for bitcount operations
This patch adds builtins for svcls, svclz and svcnt.

For merging (_m), zeroing (_z) and don't-care (_x) predication.
2020-04-28 13:53:54 +01:00
Sander de Smalen 6f588c6ef3 [SveEmitter] Add builtins for permutations and selection
This patch adds builtins for:
- svlasta and svlastb
- svclasta and svclastb
- svunpkhi and svunpklo
- svuzp1 and svuzp2
- svzip1 and svzip2
- svrev
- svsel
- svcompact
- svsplice
- svtbl
2020-04-28 13:43:11 +01:00
Sander de Smalen e1932ffbd9 [SveEmitter] Add builtins for ternary ops (fmla, fmad, etc)
This patch adds builtins for:
- svmad, svmla, svmls, svmsb
  svnmad, svnmla, svnmls, svnmsb
  svmla_lane, svmls_lane

These builtins come in several flavours:
- Merge into first source vector (`_m`)
- False lanes are undef (`_x`)
- False lanes are zeroed (`_z`)

And can also have `_n` to indicate the last operand is a scalar.

For example:

  svint32_t svmla[_n_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3)

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D78960
2020-04-28 10:59:38 +01:00