Commit Graph

314001 Commits

Author SHA1 Message Date
Louis Dionne 2b0da3d63e [NFC] Correct outdated links to the Itanium C++ ABI documentation
Those are now hosted on GitHub.

rdar://problem/36557462

llvm-svn: 358191
2019-04-11 16:37:07 +00:00
Max Moroz 9d5e7ee296 [libFuzzer] Fallback to default Mutate when MutateWithMask fails.
Summary:
In case the current corpus input doesn't have bytes going into the
focus function, MutateWithMask is useless and may fail gently, allowing the
default mutation routine happen, rather than crashing on an assertion.

For more context and the initial fix suggestion, see:
https://github.com/google/oss-fuzz/issues/1632#issuecomment-481862879

Reviewers: kcc, morehouse

Reviewed By: kcc

Subscribers: delcypher, #sanitizers, llvm-commits

Tags: #llvm, #sanitizers

Differential Revision: https://reviews.llvm.org/D60567

llvm-svn: 358190
2019-04-11 16:24:53 +00:00
Louis Dionne 7c142fcc06 [libc++] Make sure we don't eagerly diagnose non-const comparators for containers of incomplete types
Summary:
In r348529, I improved the library-defined diagnostic for using containers
with a non-const comparator/hasher. However, the check is now performed
too early, which leads to the diagnostic being emitted in cases where it
shouldn't. See PR41360 for details.

This patch moves the diagnostic to the destructor of the containers, which
means that the diagnostic will only be emitted when the container is instantiated
at a point where the comparator and the key/value are required to be complete.
We still retain better diagnostics than before r348529, because the diagnostics
are performed in the containers themselves instead of __tree and __hash_table.

As a drive-by fix, I improved the diagnostic to mention that we can't find
a _viable_ const call operator, as suggested by EricWF in PR41360.

Reviewers: EricWF, mclow.lists

Subscribers: christof, jkorous, dexonsmith, libcxx-commits, zoecarver

Tags: #libc

Differential Revision: https://reviews.llvm.org/D60540

llvm-svn: 358189
2019-04-11 16:14:56 +00:00
Michal Gorny b971b59709 [lldb] [lit/Register] Mark x86-mm-xmm-read XFAIL on Windows
llvm-svn: 358188
2019-04-11 16:06:14 +00:00
Sanjay Patel fd314eca8f [DAGCombiner] refactor narrowing of extracted vector binop; NFC
There's a TODO comment about handling patterns with insert_subvector,
and we do want to match that.

llvm-svn: 358187
2019-04-11 15:59:47 +00:00
Simon Pilgrim 40b647ae8e [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask support
Completes SimplifyDemandedVectorElts's basic variable shuffle mask support which should help D60512 + D60562 

llvm-svn: 358186
2019-04-11 15:29:15 +00:00
Serge Guelton 3742bb89f8 Make llvm-nm -help great again
Only display help from the llvm-nm category instead of all llvm options, which make it much more usable.
There's still an issue with -s, which is probably a bug in llvm::cl and worth another commit.

Differential Revision: https://reviews.llvm.org/D60411

llvm-svn: 358185
2019-04-11 15:22:48 +00:00
Michal Gorny 53373432cf [lldb] [lit/Register] Fix test to use %clangxx
llvm-svn: 358184
2019-04-11 15:13:17 +00:00
Roger Ferrer Ibanez b621f04135 [RISCV] Diagnose invalid second input register operand when using %tprel_add
RISCVMCCodeEmitter::expandAddTPRel asserts that the second operand must be
x4/tp. As we are not currently checking this in the RISCVAsmParser, the assert
is easy to trigger due to wrong assembly input.

This patch does a late check of this constraint.

An alternative could be using a singleton register class for x4/tp similar to
the current one for sp. Unfortunately it does not result in a good diagnostic.
Because add is an overloaded mnemonic, if no matching is possible, the
diagnostic of the first failing alternative seems to be used as the diagnostic
itself. This means that this case the %tprel_add is diagnosed as an invalid
operand (because the real add instruction only has 3 operands).

Differential Revision: https://reviews.llvm.org/D60528

llvm-svn: 358183
2019-04-11 15:13:12 +00:00
Simon Pilgrim a41275a398 [X86][AVX] Tweak X86ISD::VPERMV3 demandedelts test
Original test was too dependent on the order of the combines that could cause the inserted element being demanded after all

llvm-svn: 358182
2019-04-11 15:09:03 +00:00
Andrey Churbanov 705384be97 Fixed possible out of bound array access.
The check of index value moved to before the write to the array.

Differential Revision: https://reviews.llvm.org/D60471

llvm-svn: 358181
2019-04-11 15:03:44 +00:00
Jonas Devlieghere d843da6218 [test] Convert CommandScriptImmediateOutput from pexpect to lit
This converts the CommandScriptImmediateOutput test from a python test
using pexpect to a lit test.

Differential revision: https://reviews.llvm.org/D60566

llvm-svn: 358180
2019-04-11 15:03:07 +00:00
Luo, Yuanke a2b4d3fab6 [X86] Add MM register mapping from CodeView to MC register id
Differential Revision: https://reviews.llvm.org/D60437

Change-Id: I2183a6d825d0284b22705d423b88882992b236c5
llvm-svn: 358179
2019-04-11 15:01:03 +00:00
Michal Gorny 40733618bd [lldb] [Process/NetBSD] Fix wrongly mapping mm* registers
Fix mistake that mapped mm* registers into the space for xmm* registers,
rather than the one shared with st* registers.  In other words,
'register read mmN' now correctly shows the mmN register rather than
part of xmmN.

Includes a minimal lit regression test.

Differential Revision: https://reviews.llvm.org/D60325

llvm-svn: 358178
2019-04-11 14:58:48 +00:00
Michal Gorny 3ec58c4ef6 [llvm] [lit] Add target-x86* features
Add a 'target-x86' and 'target-x86_64' feature sthat indicates that
the default target is 32-bit or 64-bit x86, appropriately.  Combined
with 'native' feature, we're going to use this to control x86-specific
LLDB native process tests.

Differential Revision: https://reviews.llvm.org/D60474

llvm-svn: 358177
2019-04-11 14:58:39 +00:00
Pavel Labath d7e12574c6 YAMLIO: Fix serialization of strings with embedded nuls
Summary:
A bug/typo in Output::scalarString caused us to round-trip a StringRef
through a const char *. This meant that any strings with embedded nuls
were unintentionally cut short at the first such character. (It also
could have caused accidental buffer overruns, but it seems that all
StringRefs coming into this functions were formed from null-terminated
strings.)

This patch fixes the bug and adds an appropriate test.

Reviewers: sammccall, jhenderson

Subscribers: kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60505

llvm-svn: 358176
2019-04-11 14:57:34 +00:00
Simon Pilgrim 34686b6e97 [X86][AVX] Add X86ISD::VPERMV3 demandedelts test
llvm-svn: 358175
2019-04-11 14:48:46 +00:00
Simon Pilgrim 8a25154fa7 [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV mask support
llvm-svn: 358174
2019-04-11 14:35:45 +00:00
Simon Pilgrim b237b54c2d [X86][AVX] Add X86ISD::VPERMV demandedelts test
llvm-svn: 358173
2019-04-11 14:26:32 +00:00
Sanjay Patel c0f4a35e68 [DAGCombiner][x86] scalarize inserted vector FP ops
// bo (build_vec ...undef, x, undef...), (build_vec ...undef, y, undef...) -->
// build_vec ...undef, (bo x, y), undef...

The lifetime of the nodes in these examples is different for variables versus constants,
but they are all build vectors briefly, so I'm proposing to catch them in this form to
handle all of the leading examples in the motivating test file.

Before we have build vectors, we might have insert_vector_element. After that, we might
have scalar_to_vector and constant pool loads.

It's going to take more work to ensure that FP vector operands are getting simplified
with undef elements, so this transform can apply more widely. In a non-loose FP environment,
we are likely simplifying FP elements to NaN values rather than undefs.

We also need to allow more opcodes down this path. Eg, we don't handle FP min/max flavors
yet.

Differential Revision: https://reviews.llvm.org/D60514

llvm-svn: 358172
2019-04-11 14:21:57 +00:00
Diogo N. Sampaio 8ddfd46c61 [AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
Summary:  Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64

Reviewers: pbarrio, DavidSpickett, LukeGeeson

Reviewed By: LukeGeeson

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60259

llvm-svn: 358171
2019-04-11 14:19:43 +00:00
Simon Pilgrim 6f3866c6fb [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMILPV mask support
llvm-svn: 358170
2019-04-11 14:15:01 +00:00
Pavel Labath 71b88b91f7 Minidump: extend UUID byte-swapping to windows platform
Summary:
D59433 added code to swap bytes UUIDs coming from minidump files, but
only enabled it for apple platforms. Based on my research, I believe
this is the correct thing to do for windows as well, as the natural way
of printing U(G)UIDs on this platforms is to print the first three
components as (4 or 2)-byte integers printed in natural (big-endian)
order. This makes the UUID string coming out of lldb match the strings
produced by other windows tools.

The decision to byte-swap the age field is somewhat arbitrary, because
the age field is usually printed separately from the file GUID (and
often in decimal). However, for our purposes (telling whether two files
are identical), including it in the UUID is correct, and printing it in
big-endian makes it easier to recognize the age value.

This also makes the UUIDs generated here (almost) match up with the
UUIDs computed for breakpad symbol files
(BreakpadRecords.cpp:parseModuleId), which already implemented the
byte-swapping. The "almost" is here because ObjectFileBreakpad does not
swap the age field, but I'll fix that in a follow-up.

There is no UUID support in ObjectFileCOFF at the moment, but ideally
the algorithms used here and in ObjectFileCOFF should be in sync so that
object file matching works correctly.

Reviewers: clayborg, amccarth, markmentovai, asmith

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D60501

llvm-svn: 358169
2019-04-11 14:14:07 +00:00
Simon Pilgrim 886e32e0f2 [X86][AVX] Add X86ISD::VPERMILPV demandedelts tests
llvm-svn: 358168
2019-04-11 14:09:35 +00:00
Simon Pilgrim cb5218ad48 [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMIL2 mask support
llvm-svn: 358167
2019-04-11 14:04:19 +00:00
Simon Pilgrim 7021dec26e [X86][XOP] Add X86ISD::VPERMIL2 demandedelts test
llvm-svn: 358166
2019-04-11 13:52:43 +00:00
Simon Pilgrim e468cc7f14 [X86] SimplifyDemandedVectorElts - add VPPERM support
We need to add support for all variable shuffle mask ops, but VPPERM is the only one that already has test coverage.

llvm-svn: 358165
2019-04-11 13:30:38 +00:00
Petr Hosek 3aeb6585d3 [libunwind] Fix the typo in unw_save_vfp_as_X alias
This was accidentaly introduced in r357640.

llvm-svn: 358164
2019-04-11 13:08:44 +00:00
Sander de Smalen 4f5d2df48d [ValueTracking] Change if-else chain into switch in computeKnownBitsFromAssume
This is a follow-up patch to D60504 to further improve
performance issues in computeKnownBitsFromAssume.
    
The patch is NFC, but may improve compile-time performance
if the compiler isn't clever enough to do the optimization
itself.

llvm-svn: 358163
2019-04-11 13:02:19 +00:00
Oliver Stannard 6fa145e429 Test commit access
llvm-svn: 358162
2019-04-11 12:53:33 +00:00
Fangrui Song 71cce580b9 Use llvm::lower_bound. NFC
llvm-svn: 358161
2019-04-11 10:25:41 +00:00
Andrea Di Biagio 2050dff996 [MCA] Remove wrong comments from a test. NFC
llvm-svn: 358160
2019-04-11 10:15:04 +00:00
Eric Liu 00d99bd1c4 [clangd] Use identifiers in file as completion candidates when build is not ready.
Summary:
o Lex the code to get the identifiers and put them into a "symbol" index.
o Adds a new completion mode without compilation/sema into code completion workflow.
o Make IncludeInserter work even when no compile command is present, by avoiding
inserting non-verbatim headers.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, jdoerfert, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D60126

llvm-svn: 358159
2019-04-11 09:36:36 +00:00
Ilya Biryukov 6ef53b3bf2 [ADT] Fix template parameter names of llvm::{upper|lower}_bound
Summary:
Rename template parameter for a search value from 'ForwardIt' to 'T'.
While here, also use perfect forwarding to pass the value to STL algos.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60510

llvm-svn: 358158
2019-04-11 09:00:36 +00:00
Sam McCall c218813cba [clangd] Include compile command heuristic in logs
llvm-svn: 358157
2019-04-11 08:17:15 +00:00
Hans Wennborg 74e4f8a5ed try to fix the sphinx build some more
llvm-svn: 358156
2019-04-11 07:46:25 +00:00
Hans Wennborg 136a6a612a Fix two sphinx warnings
llvm-svn: 358155
2019-04-11 07:31:03 +00:00
Hans Wennborg 147e0ddaa9 Try to fix the shpinx build
llvm-svn: 358154
2019-04-11 07:30:56 +00:00
Roman Lebedev fbb823891d [llvm-exegesis] Fix serialization/deserialization of special NoRegister register (PR41448)
Summary:
A *lot* of instructions have this special register.
It seems this never really worked, but i finally noticed it only
because it happened to break for `CMOV16rm` instruction.

We serialized that register as "" (empty string), which is naturally
'ignored' during deserialization, so we re-create a `MCInst` with
too few operands.

And when we then happened to try to resolve variant sched class
for this mis-serialized instruction, and the variant predicate
tried to read an operand that was out of bounds since we got less operands,
we crashed.

Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=41448 | PR41448 ]].

Reviewers: craig.topper, courbet

Reviewed By: courbet

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60517

llvm-svn: 358153
2019-04-11 07:20:50 +00:00
Mikael Holmen 58c080a3b1 Add { } to silence compiler warning [NFC]
At least clang 3.6 warns on the original code:

../tools/clang/lib/CodeGen/CGNonTrivialStruct.cpp:829:34: error: suggest braces around initialization of subobject [-Werror,-Wmissing-braces]
  return std::array<Address, 1>({Address(nullptr, CharUnits::Zero())});
                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                                 {                                  }
../tools/clang/lib/CodeGen/CGNonTrivialStruct.cpp:833:34: error: suggest braces around initialization of subobject [-Werror,-Wmissing-braces]
  return std::array<Address, 2>({Address(nullptr, CharUnits::Zero()),
                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.

llvm-svn: 358152
2019-04-11 06:57:12 +00:00
Alexey Sotkin 1b01f9728f [OpenCL] Re-fix invalid address space generation for clk_event_t arguments of enqueue_kernel builtin function
Summary:
https://reviews.llvm.org/D53809 fixed wrong address space(assert in debug build)
generated for event_ret argument. But exactly the same problem exists for
event_wait_list argument. This patch should fix both.

Reviewers: Anastasia, yaxunl

Reviewed By:  Anastasia

Subscribers: kristina, ebevhan, cfe-commits

Differential Revision: https://reviews.llvm.org/D59985

llvm-svn: 358151
2019-04-11 06:18:17 +00:00
Shiva Chen 7cc03bd064 [RISCV] Put data smaller than eight bytes to small data section
Because of gp = sdata_start_address + 0x800, gp with signed twelve-bit offset
could covert most of the small data section. Linker relaxation could transfer
the multiple data accessing instructions to a gp base with signed twelve-bit
offset instruction.

Differential Revision: https://reviews.llvm.org/D57493

llvm-svn: 358150
2019-04-11 04:59:13 +00:00
John McCall 98da442b6d Prospective test fix in response to r358104.
llvm-svn: 358149
2019-04-11 03:04:04 +00:00
Fangrui Song 6a285dfe71 [DWARF] Set discriminator to 0 for DW_LNS_copy
Summary:
Make DW_LNS_copy set the discriminator register to 0, to conform to
DWARF 4 & 5: "Then it sets the discriminator register to 0, and sets the
basic_block, prologue_end and epilogue_begin registers to false."

Because all of DW_LNE_end_sequence, DN_LNS_copy, and special opcodes reset
discriminator to 0, we can move discriminator=0 to appendRowToMatrix.

Also, make DW_LNS_copy print before appending the row, as it is similar
to a address+=0,line+=0 special opcode, which prints before appending
the row.

Reviewers: dblaikie, probinson, aprantl

Reviewed By: dblaikie

Subscribers: danielcdh, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60364

llvm-svn: 358148
2019-04-11 02:02:44 +00:00
Jonathan Metzman ff79ee144c Remove repeated words from BuildingLibcxx.rst
Summary: Remove repeated words from docs.

Reviewers: phosek

Reviewed By: phosek

Subscribers: christof

Differential Revision: https://reviews.llvm.org/D60530

llvm-svn: 358147
2019-04-10 23:44:27 +00:00
Erik Pilkington cb5c7bd9eb Fix a hang when lowering __builtin_dynamic_object_size
If the ObjectSizeOffsetEvaluator fails to fold the object size call, then it may
litter some unused instructions in the function. When done repeatably in
InstCombine, this results in an infinite loop. Fix this by tracking the set of
instructions that were inserted, then removing them on failure.

rdar://49172227

Differential revision: https://reviews.llvm.org/D60298

llvm-svn: 358146
2019-04-10 23:42:11 +00:00
JF Bastien 2f46de8c0b [NFC] Use clearer naming for local variables
llvm-svn: 358145
2019-04-10 23:23:17 +00:00
Amara Emerson 213e0bde04 [AArch64][GlobalISel] Make <2 x p0> = G_BUILD_VECTOR legal.
The existing isel support already works for p0 once the legalizer accepts it.

llvm-svn: 358144
2019-04-10 23:06:14 +00:00
Amara Emerson a7ff111b04 [AArch64][GlobalISel] Add legalizer support for <8 x s16> and <16 x s8> G_ADD.
llvm-svn: 358143
2019-04-10 23:06:11 +00:00
Amara Emerson ae878dab03 [AArch64][GlobalISel] Scalarize vector SDIV.
llvm-svn: 358142
2019-04-10 23:06:08 +00:00