Juergen Ributzka
d12ccbd343
[weak vtables] Remove a bunch of weak vtables
...
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
llvm-svn: 195064
2013-11-19 00:57:56 +00:00
Alexey Samsonov
49109a279c
Revert r194865 and r194874.
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This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.
llvm-svn: 194997
2013-11-18 09:31:53 +00:00
Juergen Ributzka
dbedae89b9
[weak vtables] Remove a bunch of weak vtables
...
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
llvm-svn: 194865
2013-11-15 22:34:48 +00:00
Roman Divacky
b6517850fb
Expand rotate instructions on sparcv9 as well.
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llvm-svn: 194500
2013-11-12 19:04:45 +00:00
Venkatraman Govindaraju
5ae77f7564
[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
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llvm-svn: 193957
2013-11-03 12:28:40 +00:00
Venkatraman Govindaraju
f1d807ee13
[Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128.
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llvm-svn: 193947
2013-11-03 08:00:19 +00:00
Venkatraman Govindaraju
5615aca219
[SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap.
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llvm-svn: 193941
2013-11-03 05:59:07 +00:00
Roman Divacky
2262cfaf19
SparcV9 doesnt have rem instruction either.
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llvm-svn: 193789
2013-10-31 19:22:33 +00:00
Rafael Espindola
79858aa3df
Add a helper getSymbol to AsmPrinter.
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llvm-svn: 193627
2013-10-29 17:07:16 +00:00
Rafael Espindola
43c4e24fad
Add a MCAsmInfoELF class and factor some code into it.
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We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before.
llvm-svn: 192760
2013-10-16 01:34:32 +00:00
Venkatraman Govindaraju
8812485d41
[Sparc] Disable tail call optimization for sparc64.
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This patch fixes PR17506.
llvm-svn: 192294
2013-10-09 12:50:39 +00:00
NAKAMURA Takumi
c22f85331c
SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default]
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llvm-svn: 192179
2013-10-08 10:29:09 +00:00
NAKAMURA Takumi
2949f670d5
Prune trailing linefeeds.
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llvm-svn: 192178
2013-10-08 10:29:03 +00:00
Venkatraman Govindaraju
2ea4c2880c
[Sparc] Implement JIT for SPARC.
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No new testcases. However, this patch makes all supported JIT testcases in
test/ExecutionEngine pass on Sparc.
llvm-svn: 192176
2013-10-08 07:15:22 +00:00
Venkatraman Govindaraju
8223c553cf
[Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
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llvm-svn: 192160
2013-10-08 02:50:29 +00:00
Rafael Espindola
e90fd9c5e0
Remove getEHExceptionRegister and getEHHandlerRegister.
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They haven't been used for a long time. Patch by MathOnNapkins.
llvm-svn: 192099
2013-10-07 13:39:22 +00:00
Venkatraman Govindaraju
f482d3d338
[Sparc] Do not emit nop after fcmp* instruction with V9.
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llvm-svn: 192056
2013-10-06 07:06:44 +00:00
Venkatraman Govindaraju
572d5057e3
[Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
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This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.
llvm-svn: 192054
2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju
1230342fd2
[Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.
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addx/subx does not modify conditional codes whereas addxcc/subxx does.
llvm-svn: 192053
2013-10-06 02:11:10 +00:00
Venkatraman Govindaraju
ece63dbd0d
[Sparc] Use correct alignment while loading/storing fp128 values.
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llvm-svn: 192023
2013-10-05 02:29:47 +00:00
Venkatraman Govindaraju
30781deb1c
[Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand.
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llvm-svn: 192015
2013-10-05 00:31:41 +00:00
Venkatraman Govindaraju
84f1523cac
[Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition().
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llvm-svn: 192006
2013-10-04 23:54:30 +00:00
Venkatraman Govindaraju
4c0cdd734c
[Sparc] Implements exception handling in SPARC with DwarfCFI.
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llvm-svn: 191432
2013-09-26 15:11:00 +00:00
Venkatraman Govindaraju
94629eb861
[Sparc] Use correct instruction pattern for CMPri.
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llvm-svn: 191180
2013-09-22 18:54:54 +00:00
Venkatraman Govindaraju
51270837aa
[Sparc] Make SPARC instructions' encoding well defined such that TableGen can automatically generate code emitter.
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llvm-svn: 191168
2013-09-22 09:54:42 +00:00
Venkatraman Govindaraju
709d154d69
[Sparc] Clean up MOVcc instructions so that TableGen can encode them correctly. No functionality change intended.
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llvm-svn: 191167
2013-09-22 09:18:26 +00:00
Venkatraman Govindaraju
2fb440fbad
[Sparc] Clean up branch instructions, so that TableGen can encode branch conditions as well. No functionality change intended.
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llvm-svn: 191166
2013-09-22 08:51:55 +00:00
Tim Northover
31d093c705
ISelDAG: spot chain cycles involving MachineNodes
...
Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.
Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.
This should fix PR15840.
llvm-svn: 191165
2013-09-22 08:21:56 +00:00
Venkatraman Govindaraju
cb1dca602c
[Sparc] Add support for TLS in sparc.
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llvm-svn: 191164
2013-09-22 06:48:52 +00:00
Venkatraman Govindaraju
7e7eb8ce69
[SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.
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llvm-svn: 191160
2013-09-22 01:40:24 +00:00
Venkatraman Govindaraju
e9ef51222b
[Sparc] Emit .register directive to declare the use of global registers %g2, %g4, %g6 and %g7.
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llvm-svn: 191158
2013-09-22 00:42:30 +00:00
Venkatraman Govindaraju
829aec5900
[Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.
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llvm-svn: 191154
2013-09-21 23:51:08 +00:00
Venkatraman Govindaraju
55ecb10e99
[Sparc] Correctly handle call to functions with ReturnsTwice attribute.
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In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores
the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7)
using the stored %fp and register windows. However, this does not guarantee that the longjmp
will restore the registers, as they were when the setjmp was called. This is because these
registers may be clobbered after returning from setjmp, but before calling longjmp.
This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask.
llvm-svn: 190033
2013-09-05 05:32:16 +00:00
Venkatraman Govindaraju
b803cec00e
[Sparc] Fix an assertion failure while lowering fcmp on long double.
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This assertion is triggered because an integer constant is created with wrong
type.
llvm-svn: 189948
2013-09-04 15:15:20 +00:00
Venkatraman Govindaraju
59039dc1bf
[Sparc] Add support for soft long double (fp128).
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llvm-svn: 189780
2013-09-03 04:11:59 +00:00
Venkatraman Govindaraju
01cb19f93c
[Sparc] Implement spill and load for long double(f128) registers.
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llvm-svn: 189768
2013-09-02 18:32:45 +00:00
Venkatraman Govindaraju
35e0c382d5
[Sparc] Add long double (f128) instructions to sparc backend.
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llvm-svn: 189198
2013-08-25 18:30:06 +00:00
Venkatraman Govindaraju
12d8089b8e
[Sparc] Added V9's extra floating point registers and their aliases.
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llvm-svn: 189195
2013-08-25 17:03:02 +00:00
Jakob Stoklund Olesen
0c00704f27
Use register masks on SPARC call instructions.
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llvm-svn: 189085
2013-08-23 02:33:47 +00:00
Jakob Stoklund Olesen
a8960a1f7c
Add an OtherPreserved field to the CalleeSaved TableGen class.
...
This field specifies registers that are preserved across function calls,
but that should not be included in the generates SaveList array.
This can be used ot generate regmasks for architectures that save
registers through other means, like SPARC's register windows.
llvm-svn: 189084
2013-08-23 02:25:47 +00:00
Venkatraman Govindaraju
f625773bca
[Sparc] Use HWEncoding instead of unused Num field in Sparc register definitions. Also, correct the definitions of RETL and RET instructions.
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llvm-svn: 188738
2013-08-20 01:26:14 +00:00
Venkatraman Govindaraju
b50bf5a0e3
[Sparc] Enable xword directive in sparcv9.
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llvm-svn: 188141
2013-08-10 20:13:20 +00:00
NAKAMURA Takumi
aaf66c7357
Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen.
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Without explicit dependencies, both per-file action and in-CommonTableGen action could run in parallel.
It races to emit *.inc files simultaneously.
llvm-svn: 187780
2013-08-06 06:38:37 +00:00
Venkatraman Govindaraju
fee76fac2f
[Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add
...
register i7 as a live-in if current function's return address is taken.
This revision fixes PR16269.
llvm-svn: 187433
2013-07-30 19:53:10 +00:00
Venkatraman Govindaraju
fdcc498a25
[Sparc] Use call's debugloc for the unimp instruction.
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llvm-svn: 187402
2013-07-30 02:26:29 +00:00
Craig Topper
b94011fd28
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
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llvm-svn: 186274
2013-07-14 04:42:23 +00:00
Venkatraman Govindaraju
6f0b450530
[Sparc]: Add memory operands for the frame references in the storeRegToStackSlot
...
and loadRegFromStackSlot.
llvm-svn: 184935
2013-06-26 12:40:16 +00:00
Chad Rosier
295bd43adb
The getRegForInlineAsmConstraint function should only accept MVT value types.
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llvm-svn: 184642
2013-06-22 18:37:38 +00:00
Bill Wendling
a3cd350249
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
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llvm-svn: 184360
2013-06-19 21:36:55 +00:00
David Blaikie
b735b4d6db
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
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Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.
llvm-svn: 184067
2013-06-16 20:34:27 +00:00