Commit Graph

224447 Commits

Author SHA1 Message Date
Quentin Colombet 2a7676b442 [X86] Fix the lowering of setjmp intrinsic on i386.
When the lowering of the setjmp intrinsic requires
a global base pointer to be set, make sure such pointer
gets defined by the CGBR pass.

This fixes PR26742.

llvm-svn: 262762
2016-03-05 00:31:04 +00:00
Rafael Espindola 888f2c33d4 lto: Start taking symbol visibility into consideration.
llvm-svn: 262761
2016-03-05 00:09:37 +00:00
Quentin Colombet fb5be7a37f Add missing triple in my previous commit!
llvm-svn: 262760
2016-03-04 23:36:32 +00:00
Quentin Colombet 13b524597d [X86] Do not use cmpxchgXXb when we need the base pointer (RBX).
cmpxchgXXb uses RBX as one of its implicit argument. I.e., when
we use that instruction we need to clobber RBX. This is generally
fine, expect when RBX is a reserved register because in that case,
the register allocator will not track its value and will not
save and restore it when interferences occur.

rdar://problem/24851412

llvm-svn: 262759
2016-03-04 23:29:39 +00:00
Sanjay Patel 216b275994 [x86] add tests for masked loads with constant masks
llvm-svn: 262758
2016-03-04 23:28:07 +00:00
Mike Aizatsky 243fe2b3a0 [libfuzzer] adding std:string to allowed adaptable argument.
llvm-svn: 262757
2016-03-04 23:18:01 +00:00
David Majnemer 71a1c2c619 Fix build breakage
llvm-svn: 262756
2016-03-04 23:02:15 +00:00
David Majnemer d2f767d2f6 [X86] Support cleaning more than 2**16 bytes of stack
The x86 ret instruction has a 16 bit immediate indicating how many bytes
to pop off of the stack beyond the return address.

There is a problem when extremely large structs are passed by value: we
might not be able to fit the number of bytes to pop into the return
instruction.

To fix this, expand RET_FLAG a little later and use a special sequence
to clean the stack:

pop  %ecx     ; return address is now in %ecx
add  $n, %esp ; clean the stack
push %ecx     ; bring the return address back on the stack
ret           ; pop the return address and jmp to it's value

llvm-svn: 262755
2016-03-04 22:56:17 +00:00
Kostya Serebryany 5c3701c621 [libFuzzer] log less when re-loading files; fix a silly bug: when running single files actually run all of them, not just the first one
llvm-svn: 262754
2016-03-04 22:35:40 +00:00
Richard Smith 560a3579b2 Update diagnostics now that hexadecimal literals look likely to be part of C++17.
llvm-svn: 262753
2016-03-04 22:32:06 +00:00
David Blaikie ac92893a93 PR5941 - improve diagnostic for * vs & confusion when choosing overload candidate with a parameter of incomplete (ref or pointer) type
Reviewers: dblaikie

Differential Revision: http://reviews.llvm.org/D16949

llvm-svn: 262752
2016-03-04 22:29:11 +00:00
Philip Reames a0c9f6e736 [LVI] Fix a bug which prevented use of !range metadata within a query
The diff is relatively large since I took a chance to rearrange the code I had to touch in a more obvious way, but the key bit is merely using the !range metadata when we can't analyze the instruction further.  The previous !range metadata code was essentially just dead since no binary operator or cast will have !range metadata (per Verifier) and it was otherwise dropped on the floor.

llvm-svn: 262751
2016-03-04 22:27:39 +00:00
Rong Xu ecdc98fdae [PGO] Add a commandline option to control number of the VP annotation metadata.
llvm-svn: 262750
2016-03-04 22:08:44 +00:00
Nico Weber 381ec2afbf clang-cl: Enable PCH flags by default.
Now that pragma comment and pragma detect_mismatch are implemented, this might
just work.

Some pragmas aren't serialized yet (from the top of my head: code_seg, bss_seg,
data_seg, const_seg, init_seg, section, vtordisp), but these are as far as I
know usually pushed and popped within the header and usually don't leak out.
If it turns out the current PCH support isn't good enough yet, we can turn it
off again.

llvm-svn: 262749
2016-03-04 21:59:42 +00:00
Rafael Espindola d405f4721c Refactor target independent code.
The rules for when we can relax tls relocations are target independent.
The only things that are target dependent are the relocation values.

llvm-svn: 262748
2016-03-04 21:37:09 +00:00
Richard Smith 8ee39e31bb Implement P0036R0: remove support for empty unary folds of +, *, |, &.
llvm-svn: 262747
2016-03-04 21:27:21 +00:00
Michael Kuperstein b89f0fa2a2 [DAGCombine] Fix divrem combine not to assume div/rem type is simple.
The divrem combine assumed the type of the div/rem is simple, which isn't
necessarily true. This probably worked fine until r250825, since it only
saw legal types, but now breaks when it runs as a pre-type-legalization 
combine.

This fixes PR26835.

Differential Revision: http://reviews.llvm.org/D17878

llvm-svn: 262746
2016-03-04 21:23:29 +00:00
Teresa Johnson 5d07531d02 Fix new gold test to specify emulation mode.
The thinlto_linkonceresolution.ll gold linker test introduced in r262727
included a target triple, but didn't set the emulation mode, which is
necessary since the default linker target may be different.

Patch by H.J. Lu

llvm-svn: 262745
2016-03-04 21:19:08 +00:00
Samuel Antao bf4d18d3d2 Revert r262741 - [OPENMP] Codegen for distribute directive
Was causing a failure in one of the buildbot slaves.

llvm-svn: 262744
2016-03-04 21:02:14 +00:00
Richard Smith f006a96aff Update cxx_status with likely new features from Jacksonville WG21 meeting.
llvm-svn: 262743
2016-03-04 21:01:14 +00:00
Stephen Hines e3f91e31ab Switch krait to use -mcpu=cortex-a15 for assembler tool invocations.
Summary:
Using -no-integrated-as causes -mcpu=krait to be transformed into
-march=armv7-a today. This precludes the assembler from using
instructions like sdiv, which are present for krait. Cortex-a15 is the
closest subset of functionality for krait, so we should switch the
assembler to use that instead.

Reviewers: cfe-commits, apazos, weimingz

Subscribers: aemerson

Differential Revision: http://reviews.llvm.org/D17874

llvm-svn: 262742
2016-03-04 20:57:22 +00:00
Carlo Bertolli 4a56e3831d [OPENMP] Codegen for distribute directive
This patch provide basic implementation of codegen for teams directive, excluding all clauses except dist_schedule. It also fixes parts of AST reader/writer to enable correct pre-compiled header handling.

http://reviews.llvm.org/D17170

llvm-svn: 262741
2016-03-04 20:24:58 +00:00
Dan Gohman e6b81362e9 [WebAssembly] Add another possible code-size optimization to README.txt
llvm-svn: 262740
2016-03-04 20:09:57 +00:00
James Y Knight dc395b9d2b Update after r262737 in clang changed the accessor.
llvm-svn: 262739
2016-03-04 19:30:53 +00:00
Renato Golin 175c6d6d95 [ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.

This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.

Second attempt, creating TLI.isOperationCustom like isOperationExpand, to make
sure we only emit valid types or the ones that were explicitly marked as custom.
Now, passing check-all and test-suite on x86, ARM and AArch64.

This patch fixes PR17193 (and a long time FIXME in the tests).

llvm-svn: 262738
2016-03-04 19:19:36 +00:00
James Y Knight b214cbc785 Make TargetInfo store an actual DataLayout instead of a string.
Use it to calculate UserLabelPrefix, instead of specifying it (often
incorrectly).

Note that the *actual* user label prefix has always come from the
DataLayout, and is handled within LLVM. The main thing clang's
TargetInfo::UserLabelPrefix did was to set the #define value. Having
these be different from each-other is just silly.

Differential Revision: http://reviews.llvm.org/D17183

llvm-svn: 262737
2016-03-04 19:00:41 +00:00
Xinliang David Li 31f251f1f0 [PGO] Add API to check compatibility of profile data in buffer
This is needed by client which uses in-process merge API.

llvm-svn: 262736
2016-03-04 18:58:30 +00:00
Rui Ueyama d4530c6eb8 Add a comment about _DYNAMIC.
llvm-svn: 262735
2016-03-04 18:34:14 +00:00
Xinliang David Li 6534a8a837 Fix api visibility
llvm-svn: 262734
2016-03-04 18:33:49 +00:00
Filipe Cabecinhas 6448fe632a [ubsan/float-cast-overflow] Make the test also work with C++11 narrowing
llvm-svn: 262733
2016-03-04 18:33:44 +00:00
Tom Stellard 649b5db557 AMDGPU/SI: Add support for spiling SGPRs to scratch buffer
Summary:
This is necessary for when we run out of VGPRs and can no
longer use v_{read,write}_lane for spilling SGPRs.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17592

llvm-svn: 262732
2016-03-04 18:31:18 +00:00
Teresa Johnson 3b8f6126ac Fix bot failure from r262721: unintented change in gold-plugin save-temps
The split code gen task ID should not be appended to save-temps output
file when the parallelism factor is 1 (not actually splitting).

llvm-svn: 262731
2016-03-04 18:16:00 +00:00
Sanjoy Das fefc4d50ed [Statepoint docs] Delete trailing whitespace
llvm-svn: 262730
2016-03-04 18:14:09 +00:00
Devin Coughlin a604679897 [analyzer] Add diagnostic in ObjCDeallocChecker for use of -dealloc instead of -release.
In dealloc methods, the analyzer now warns when -dealloc is called directly on
a synthesized retain/copy ivar instead of -release. This is intended to find mistakes of
the form:

- (void)dealloc {
  [_ivar dealloc]; // Mistaken call to -dealloc instead of -release

  [super dealloc];
}

rdar://problem/16227989

llvm-svn: 262729
2016-03-04 18:09:58 +00:00
Tom Stellard ebef6f9771 AMDGPU/SI: Enable frame index scavenging during PrologEpilogueInserter
Summary:
This allows us to use virtual registers when we need extra registers
for inserting spill instructions in SIRegisterInfo:eliminateFrameIndex().

Once all the frame indices have been eliminated, the
PrologEpilogueInserter does an extra pass over the program to replace
all virtual registers with physical ones.

This allows us to make more efficient use of our emergency spill slots,
so we only need to create one.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17591

llvm-svn: 262728
2016-03-04 18:02:01 +00:00
Teresa Johnson a17f2cd1a3 [ThinLTO] Ensure prevailing linkonce emitted as weak in ThinLTO backends
Summary:
Since IR files are all compiled into separate independent object files
in ThinLTO mode, the prevailing linkonce symbols must be emitted in its
object file even if it is no longer referenced there, e.g. if no
references remain in the module after inlining, since it may be
referenced by another ThinLTO compiled object file. This is done by
changing LDPR_PREVAILING_DEF_IRONLY* symbols to LDPR_PREVAILING_DEF,
which converts the prevailing linkonce to weak. We also don't need the
other prevailing IRONLY handling for internalization, which is not
currently performed for ThinLTO.

Test case included.

Reviewers: davidxl, rafael

Subscribers: rafael, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D16173

llvm-svn: 262727
2016-03-04 17:48:35 +00:00
Krzysztof Parzyszek 51155fc0d1 [Hexagon] Fix lowering of calls with the return type of i1
This fixes an assertion in test/CodeGen/Hexagon/ifcvt-edge-weight.ll
when run with -debug-only=isel

llvm-svn: 262726
2016-03-04 17:38:05 +00:00
Zoran Jovanovic a68b67d1ed [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.
Author: milena.vujosevic.janicic
Reviewers: dsanders
Differential Revision: http://reviews.llvm.org/D17373

llvm-svn: 262725
2016-03-04 17:34:31 +00:00
Teresa Johnson 7cffaf3ad0 [ThinLTO] Launch importing backends in parallel threads from gold plugin
Summary:
Launch ThinLTO backends (LTO and codegen pipelines with importing) in
parallel using a ThreadPool, after creating the combined index.
The number of threads is controlled by the existing -jobs gold plugin
option, or the hardware concurrency if not specified.

The old behavior of exiting after creating the combined index can be
invoked via a new thinlto-index-only plugin option.

This commit involves just the ThinLTO-specific pieces of D15390, the NFC
and other restructuring pieces were committed independently:
  r262677: Add hardware_concurrency interface to llvm::thread (NFC)
  r262719: Change split code gen to use ThreadPool
  r262721: Refactor gold-plugin codegen to prepare for ThinLTO threads (NFC)

Reviewers: pcc, joker.eph, rafael

Subscribers: rafael, davidxl, llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D15390

llvm-svn: 262724
2016-03-04 17:06:02 +00:00
Filipe Cabecinhas 8144d3b091 [ubsan/cmake] Make sure we end up adding -frtti to ubsan_type_hash_itanium.cc, even if -fno-rtti is the default for the platform
llvm-svn: 262723
2016-03-04 17:02:06 +00:00
Teresa Johnson a9f65554b0 Refactor gold-plugin codegen to prepare for ThinLTO threads (NFC)
This is the NFC part remaining from D15390, which refactors the
current codegen() into a CodeGen class with various modular methods and
other helper functions that will be used by the follow-on ThinLTO piece.

llvm-svn: 262721
2016-03-04 16:36:06 +00:00
Rafael Espindola 1ea51d2718 Refactor duplicated code.
llvm-svn: 262720
2016-03-04 16:14:19 +00:00
Teresa Johnson d84c7decb6 Change split code gen to use ThreadPool
Part of D15390.

llvm-svn: 262719
2016-03-04 15:39:13 +00:00
Simon Pilgrim 3c7e94208a [X86][AVX512] Added some basic X86ISD::VPERMV3 shuffle combining tests
None of these actually combine yet as we haven't enabled X86ISD::VPERMV3 for target shuffle combining

llvm-svn: 262718
2016-03-04 15:19:42 +00:00
Ben Craig 5d78477ba1 Reducing stack usage of test
This test has a lot of classes with large amounts of manually inserted padding in them, presumably to prevent various optimizations. The test then creates lots of these objects on the stack. On embedded targets, this was usually enough to overflow the stack.

I moved the objects to global / namespace scope. Since the tests are each in their own namespace, there should be no cross-test conflicts.

llvm-svn: 262717
2016-03-04 14:25:13 +00:00
Benjamin Kramer 6c3856d850 Move class into anonymous namespace. NFC.
llvm-svn: 262716
2016-03-04 14:18:52 +00:00
Pavel Labath 21d12f5aa3 Add a log statement
llvm-svn: 262715
2016-03-04 12:43:05 +00:00
Sam Kolton f51f4b8370 Test commit access
llvm-svn: 262714
2016-03-04 12:29:14 +00:00
Pavel Labath 19f937ae92 Resumbit "Fetch remote log files from LLGS tests"
The problem with the original patch (and my first attempt to fix) was that the value debug
monitor flags could persist from one test to another. Resetting the value in the setUp() function
fixes the problem.

llvm-svn: 262713
2016-03-04 11:27:00 +00:00
Pavel Labath 16d3fd8ba1 Fix warning in IRExecutionUnit.cpp
llvm-svn: 262712
2016-03-04 11:26:56 +00:00