Commit Graph

392248 Commits

Author SHA1 Message Date
Florian Mayer 2a60ab76a7 [hwasan] print exact mismatch offset for short granules.
Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D104463
2021-06-28 19:01:31 +01:00
Raphael Isemann 355541a1b7 [lldb] Avoid using any shell when calling xcrun.
When we run `xcrun` we don't have any user input in our command so relying on
the user's default shell doesn't make a lot of sense. If the user has set the
system shell to a something that isn't supported yet (dash, ash) then we would
run into the problem that we don't know how to escape our command string.

This patch just avoids using any shell at all as xcrun is always at the same
path.

Reviewed By: aprantl, JDevlieghere, kastiglione

Differential Revision: https://reviews.llvm.org/D104653
2021-06-28 19:53:52 +02:00
William S. Moses 2ab27758d5 Revert "[MLIR][SCF] Inline ExecuteRegion if parent can contain multiple blocks"
This reverts commit 5d6240b77e.

The commit was mistakenly landed without a PR approval, this will be
reverted now and resubmitted.
2021-06-28 13:52:30 -04:00
Corentin Jabot 18c3c77849 Add papers adopted by the C++ committee in the June 2021 plenary 2021-06-28 13:45:12 -04:00
Jonas Devlieghere a4aa705d52 [lldb] Remove spurious lldb/lldb subdirectory
Remove the lldb/lldb subdirectory which I must have accidentally created
when applying a patch with the wrong prefix number.

Thank you Nico Weber for pointing this out!
2021-06-28 10:41:03 -07:00
Rob Suderman c7676d9993 [mlir][tosa] Update Tosa conv verifier to handle IntegerType input
Input/output types can be integers, which represent a quantized convolution.
Update verifier to expect this behavior.

Reviewed By: sjarus

Differential Revision: https://reviews.llvm.org/D104949
2021-06-28 10:18:45 -07:00
Krzysztof Parzyszek 9c5ed8d567 [Hexagon] Add patterns to load i1
This fixes https://llvm.org/PR50853
2021-06-28 12:17:30 -05:00
William S. Moses 5d6240b77e [MLIR][SCF] Inline ExecuteRegion if parent can contain multiple blocks
The executeregionop is used to allow multiple blocks within SCF constructs. If the container allows multiple blocks, inline the region

Differential Revision: https://reviews.llvm.org/D104960
2021-06-28 13:09:22 -04:00
Arthur O'Dwyer a8d1182f66 [libc++] Remove some _LIBCPP_CXX03_LANG from iostreams headers.
With the STL containers, I didn't enable move operations in C++03 mode
because that would change the overload resolution for things that today
are copy operations. With iostreams, though, the copy operations aren't
present at all, and so I see no problem with enabling move operations
even in (Clang's greatly extended) C++03 mode.

Clang's C++03 mode does not support delegating constructors.

Differential Revision: https://reviews.llvm.org/D104310
2021-06-28 12:55:26 -04:00
Stephan Herhut 88d5eba139 Revert "Revert "[mlir][memref] Implement lowering of memref.copy to llvm""
This reverts commit 7d6e589fc8.

Windows build was unbroken.
2021-06-28 18:48:00 +02:00
Anirudh Prasad 2dca0b5a1c [AsmParser][SystemZ][z/OS] Fix hanging scenario in HLASMAsmParser class
- In the caller of the overridden `parseStatement` function (i.e. the `AsmParser::Run()`) in the case of an error **and** if we're not at the start of the statement, we "eat" up until the end of the current statement, so we don't have to process it again.
- However, in the HLASMAsmParser class what's happening is that, if an error occurs at the very start of the statement (for example, you invoke the HLASMAsmParser to parse a gnu directive), we will error out, but we never really progress in terms of the next token in the statement to parse. We simply keep looping processing the same error over and over again (partly because we're at the start of the statement)
- To remedy this, when the `parseAsHLASMLabel` function fails, before returning, we "eat" until the end of the statement function, so we don't process it anymore.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D104869
2021-06-28 12:47:08 -04:00
Sjoerd Meijer 3a7cea2858 Revert "[AArch64] Custom lower <4 x i8> loads"
This reverts commit 51e434fc25 because of a
build bot failure in test-suite::GCC-C-execute-pr60960.test that I need to
investigate.
2021-06-28 17:44:46 +01:00
Sjoerd Meijer 7bcb3bd169 [AArch64] Added tests to neon-truncstore.ll. NFC. 2021-06-28 17:44:46 +01:00
Melanie Blower c27e5a2a8e Revert "[clang][patch][fpenv] Add builtin __arithmetic_fence and option fprotect-parens"
This reverts commit 4f1238e44d.
Buildbot fails on predecessor patch
2021-06-28 12:42:59 -04:00
Melanie Blower 8815ef823c Revert "[clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options"
This reverts commit 2c02b0c3f4.
buildbot fails
2021-06-28 12:42:59 -04:00
Arnold Schwaighofer 3dee1e8a84 [coro] Fix rematerializable instruction sinking to coro.suspend blocks
There is a constraint that coro.suspend instructions need to be in their
own blocks. The coro split pass initially creates IR that obeys this constraint
(which is later checked). Sinking rematerializable instructions into these
blocks breaks that constraint.

Instead rematerialize in the predecessor block to the suspend's single
predecessor block.

Differential Revision: https://reviews.llvm.org/D104051
2021-06-28 09:37:45 -07:00
LLVM GN Syncbot 918bb2a978 [gn build] Port f32f3db9fc 2021-06-28 16:30:29 +00:00
Melanie Blower 4f1238e44d [clang][patch][fpenv] Add builtin __arithmetic_fence and option fprotect-parens
This patch adds a new clang builtin, __arithmetic_fence. The purpose of the
builtin is to provide the user fine control, at the expression level, over
floating point optimization when -ffast-math (-ffp-model=fast) is enabled.
The builtin prevents the optimizer from rearranging floating point expression
evaluation. The new option fprotect-parens has the same effect on
parenthesized expressions, forcing the optimizer to respect the parentheses.

Reviewed By: aaron.ballman, kpn

Differential Revision: https://reviews.llvm.org/D100118
2021-06-28 12:26:53 -04:00
Melanie Blower 2c02b0c3f4 [clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options
Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D104729
2021-06-28 12:26:53 -04:00
Melanie Blower 931e95687d [llvm][clang][fpenv] Create new intrinsic llvm.arith.fence to control FP optimization at expression level
This intrinsic blocks floating point transformations by the optimizer.

Author: Pengfei

Reviewed By: LuoYuanke, Andy Kaylor, Craig Topper, kpn

Differential Revision: https://reviews.llvm.org/D99675
2021-06-28 12:26:52 -04:00
Louis Dionne f32f3db9fc [libc++] Split the various iterator types out of <iterator>
Differential Revision: https://reviews.llvm.org/D104669
2021-06-28 12:25:40 -04:00
William S. Moses 44826ecd92 [MLIR] Correct memrefdataflow behavior in the presence of cast and other operations
MemRefDataFlow performs mem2reg style operations for affine load/stores. Unfortunately, it is not presently correct in the presence of external operations such as memref.cast, or function calls. This diff extends the functionality of the pass to remain correct in the presence of such ops.

Differential Revision: https://reviews.llvm.org/D104053
2021-06-28 12:23:29 -04:00
Stephan Herhut e6450d88e2 [mlir][llvm] Fix windows build
Gate the include of alloca.h behind _WIN32 guard.

Differential Revision: https://reviews.llvm.org/D105036
2021-06-28 18:22:21 +02:00
Stefan Pintilie c3fe847f9d [Clang] Add option to handle behaviour of vector bool/vector pixel.
Added the option `-altivec-src-compat=[mixed,gcc,xl]`. The default at this time is `mixed`.

The default behavior for clang is for all vector compares to return a scalar unless the vectors being
compared are vector bool or vector pixel. In that case the compare returns a
vector. With the gcc case all vector compares return vectors and in the xl case
all vector compares return scalars.

This patch does not change the default behavior of clang.

This option will be used in future patches to implement behaviour compatibility for the vector bool/pixel types.

Reviewed By: bmahjour

Differential Revision: https://reviews.llvm.org/D103615
2021-06-28 11:16:37 -05:00
William S. Moses cccc7e5aa8 [MLIR] Don't remove memref allocation if stored into another allocation
A canonicalization accidentally will remove a memref allocation if it is only stored into. However, this is incorrect if the allocation is the value being stored, not the allocation being stored into.

Differential Revision: https://reviews.llvm.org/D104947
2021-06-28 12:05:59 -04:00
Jay Foad 75cacc6775 [AMDGPU] Use opName instead of PseudoName in VOP2 multiclasses. NFC.
This is just for consistency with all other instruction multiclasses
that pass around pseudo names as arguments.
2021-06-28 16:46:35 +01:00
Nico Weber d5402a2fee Revert "[Analyzer][solver] Add dump methods for (dis)equality classes."
This reverts commit 6f3b775c3e.
Test fails flakily, see comments on https://reviews.llvm.org/D103967

Also revert follow-up "[Analyzer] Attempt to fix windows bots test
failure b/c of new-line"
This reverts commit fe0e861a4d.
2021-06-28 11:32:57 -04:00
Nico Weber 540b4a5fb3 Revert "[DebugInfo] Enable variadic debug value salvaging"
This reverts commit adace79652.
Still breaks things, see comment on https://reviews.llvm.org/D91722
2021-06-28 11:25:09 -04:00
David Spickett 558d9e8228 [llvm][ARM] Treat xscale arch as an alias of armv5te
Previously xscale was known to everything apart
from the ELF streamer so we would crash as soon
as you tried to output an object file.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D104776
2021-06-28 15:20:24 +00:00
Florian Hahn ef78325c10
[BasicAA] Add test to cover GetIndexDifference change in D99424.
Precommit test case for a change to GetIndexDifference in D99424.
2021-06-28 16:03:05 +01:00
naromero77 d6cb0143cc [flang][docs] Minor update to Fortran LLVM Tests-suite docs.
Updated Fortran LLVM Test-suite docs to reflect latest changes.

Reviewed By: Meinersbur, xgupta

Differential Revision: https://reviews.llvm.org/D104961
2021-06-28 10:01:29 -05:00
William S. Moses 35c0ab72fc [MLIR] Simplify select to a not
Given a select that returns the logical negation of the condition, replace it with a not of the condition.

Differential Revision: https://reviews.llvm.org/D104966
2021-06-28 11:00:02 -04:00
Stefan Gränitz e5d8cfb2f1 [Orc][examples] Temporarily disable LLJITWithRemoteDebugging build and test
The underlying TargetProcessControl API changes with D104694. Once it landed I can patch and re-enable the example.
2021-06-28 16:54:53 +02:00
Jacques Pienaar 7d6e589fc8 Revert "[mlir][memref] Implement lowering of memref.copy to llvm"
This reverts commit e939644977.

Breaks Windows build.
2021-06-28 07:50:11 -07:00
Zarko Todorovski 4cf072e7fb [AIX] Use less than or equal to for some alignment tests on AIX
On AIX the alignment implementation has the storage aligned to the
preferred alignment instead of the alignment of a type. Macro guard
these tests for AIX and have them pass when the "reference alignment" is
less than or equal to the alignment observed. In other words, the
alignment applied is at least as strict as the required alignment.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D104786
2021-06-28 10:32:32 -04:00
Sander de Smalen 0e09d18c6a Reland [GlobalISel] NFC: Have LLT::getSizeInBits/Bytes return a TypeSize.
This patch relands https://reviews.llvm.org/D104454, but fixes some failing
builds on Mac OS which apparently has a different definition for size_t,
that caused 'ambiguous operator overload' for the implicit conversion
of TypeSize to a scalar value.

This reverts commit b732e6c9a8.
2021-06-28 15:24:27 +01:00
Ahsan Saghir 31ef15e044 Teach peephole optimizer to not emit sub-register defs
Peephole optimizer should not be introducing sub-reg definitions
as they are illegal in machine SSA phase. This patch modifies
the optimizer to not emit sub-register definitions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D103408
2021-06-28 09:24:07 -05:00
Bradley Smith c089e29aa4 [AArch64][SVE] DAG combine SETCC_MERGE_ZERO of a SETCC_MERGE_ZERO
This helps remove extra comparisons when generating masks for fixed
length masked operations.

Differential Revision: https://reviews.llvm.org/D104910
2021-06-28 15:06:06 +01:00
Jonathan Crowther 8d5c0b8768 [libc++] Remove unnecessary reinterpret_cast from typeinfo
In typeinfo there is a reinterpret_cast between a uintptr_t and size_t. These are two integer types and therefore a reinterpret_cast is not right for this situation. It looks like it may have been copied and pasted from above in the file. An implicit cast works in it's place.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D104814
2021-06-28 10:00:33 -04:00
Reshabh Sharma ae983de6cc [InferAddressSpaces] NFC: For noop IntToPtr/PtrToInt pair cast to operator instead of PtrToInt
Compiler crashes at an assertion while casting operands to PtrToIntInst at some cases when
ptrtoint is present as an explicit operand to inttoptr. Explicit instruction operator as
operand can not be casted to an Instruction.

This patch replaces cast from PtrToInst to Operator which are later checked for constant
expressions.

Differential Revision: https://reviews.llvm.org/D105002
2021-06-28 19:24:26 +05:30
Joseph Huber 13b2fba239 [OpenMP][NFC] Fix typo in OpenMPOpt 2021-06-28 09:49:14 -04:00
Gabor Marton fe0e861a4d [Analyzer] Attempt to fix windows bots test failure b/c of new-line 2021-06-28 15:41:30 +02:00
Ben Shi 1dd2d15b50 [AVR][test] Add a new test: functions with struct return type
Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D99239
2021-06-28 21:19:26 +08:00
Joseph Huber 4024087731 [OpenMP][NFC] Fix missing argument 2021-06-28 09:15:01 -04:00
Brendon Cahoon f9f5d41545 [AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX
Adds legalizer, register bank select, and instruction
select support for G_SBFX and G_UBFX. These opcodes generate
scalar or vector ALU bitfield extract instructions for
AMDGPU. The instructions allow both constant or register
values for the offset and width operands.

The 32-bit scalar version is expanded to a sequence that
combines the offset and width into a single register.

There are no 64-bit vgpr bitfield extract instructions, so the
operations are expanded to a sequence of instructions that
implement the operation. If the width is a constant,
then the 32-bit bitfield extract instructions are used.

Moved the AArch64 specific code for creating G_SBFX to
CombinerHelper.cpp so that it can be used by other targets.
Only bitfield extracts with constant offset and width values
are handled currently.

Differential Revision: https://reviews.llvm.org/D100149
2021-06-28 09:06:44 -04:00
Corentin Jabot 22aa3680ea [C++20] Support for lambdas in unevaluated context
Partially implement P0315R4.

This patch allow lambda in unevaluated context.
It does not implement temp.deduct/9.
2021-06-28 09:01:56 -04:00
Lucas Prates 5cf27532fa [NFC] Fixing short title underline in release notes file 2021-06-28 13:55:00 +01:00
Stephan Herhut e939644977 [mlir][memref] Implement lowering of memref.copy to llvm
This lowering uses a library call to implement copying in the general case, i.e.,
supporting arbitrary rank and strided layouts.
2021-06-28 14:52:07 +02:00
Joseph Huber 4a6bd8e3e7 [OpenMP] Increase attributor iterations on the GPU
Increase the number of attributor iterations on a GPU target. I forgot to
change this in D104416.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D104920
2021-06-28 08:50:49 -04:00
Lucas Prates 88b1135e72 [Aarch64] Adding support for Armv9-A Realm Management Extension
This adds support for Armv9-A's Realm Management Extension, including
three new system registers - MFAR_EL3, GPCCR_EL3 and GPTBR_EL3 - and
four new TLBI instructions.

The reference for the Realm Management Extension can be found at: https://developer.arm.com/documentation/ddi0615/aa.

Based on patches by Victor Campos.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D104773
2021-06-28 13:45:22 +01:00