Commit Graph

13 Commits

Author SHA1 Message Date
Andrea Di Biagio 2dee62bd0a [llvm-mca] Minor refactoring. NFCI
Also, removed a couple of unused methods from class Instruction.

llvm-svn: 328198
2018-03-22 14:14:49 +00:00
Andrea Di Biagio 09ea09e478 [llvm-mca] Simplify (and better standardize) the Instruction interface.
llvm-svn: 328190
2018-03-22 11:39:34 +00:00
Andrea Di Biagio 3562248825 [llvm-mca] Simplify code. NFC
llvm-svn: 328187
2018-03-22 10:19:20 +00:00
Andrea Di Biagio 847accd001 [llvm-mca] Remove const from a bunch of ArrayRef. NFC
llvm-svn: 328018
2018-03-20 19:06:34 +00:00
Andrea Di Biagio a3f2e483dd [llvm-mca] Move the logic that computes the scheduler's queue usage to the BackendStatistics view.
This patch introduces two new callbacks in the event listener interface to
handle the "buffered resource reserved" event and the "buffered resource
released" event. Every time a buffered resource is used, an event is generated.

Before this patch, the Scheduler (with the help of the ResourceManager) was
responsible for tracking the scheduler's queue usage. However, that design
forced the Scheduler to 'publish' scheduler's queue pressure information through
the Backend interface.

The goal of this patch is to break the dependency between the BackendStatistics
view, and the Backend. Now the Scheduler knows how to notify "buffer
reserved/released" events.  The scheduler's queue usage analysis has been moved
to the BackendStatistics.

Differential Revision: https://reviews.llvm.org/D44686

llvm-svn: 328011
2018-03-20 18:20:39 +00:00
Andrea Di Biagio 4704f0386b [llvm-mca] Move the routine that computes processor resource masks to its own file.
Function computeProcResourceMasks is used by the ResourceManager (owned by the
Scheduler) to compute resource masks for processor resources.  Before this
refactoring, there was an implicit dependency between the Scheduler and the
InstrBuilder. That is because InstrBuilder has to know about resource masks when
computing the set of processor resources consumed by a new instruction.

With this patch, the functionality that computes resource masks has been
extracted from the ResourceManager, and moved to a separate file (Support.h). 
This helps removing the dependency between the Scheduler and the InstrBuilder.

No functional change intended.

llvm-svn: 327973
2018-03-20 12:25:54 +00:00
Andrea Di Biagio 44bfcd2d63 [llvm-mca] Simplify code. NFC
llvm-svn: 327886
2018-03-19 19:09:38 +00:00
Andrea Di Biagio b52297508e [llvm-mca] Remove the logic that computes the reciprocal throughput, and make the SummaryView independent from the Backend. NFCI
Since r327420, the tool can query the MCSchedModel interface to obtain the
reciprocal throughput information.
As a consequence, method `ResourceManager::getRThroughput`, and
method `Backend::getRThroughput` are no longer needed.

This patch simplifies the code by removing the custom RThroughput computation.
This patch also refactors class SummaryView by removing the dependency with
the Backend object.

No functional change intended.

llvm-svn: 327425
2018-03-13 17:24:32 +00:00
Andrea Di Biagio e1a1da1126 [llvm-mca] Use a const ArrayRef in a few places. NFC
llvm-svn: 327396
2018-03-13 13:58:02 +00:00
Clement Courbet 844f22d3c3 [llvm-mca] Refactor event listeners to make the backend agnostic to event types.
Summary: This is a first step towards making the pipeline configurable.

Subscribers: llvm-commits, andreadb

Differential Revision: https://reviews.llvm.org/D44309

llvm-svn: 327389
2018-03-13 13:11:01 +00:00
Andrea Di Biagio 0c54129907 [llvm-mca] Views are now independent from resource masks. NFCI
This change removes method Backend::getProcResourceMasks() and simplifies some
logic in the Views. This effectively removes yet another dependency between the
views and the Backend.
No functional change intended.

llvm-svn: 327214
2018-03-10 16:55:07 +00:00
Andrea Di Biagio 373c38a2db [llvm-mca] Fix handling of zero-latency instructions.
This patch fixes a problem found when testing zero latency instructions on
target AArch64 -mcpu=exynos-m3 / -mcpu=exynos-m1.

On Exynos-m3/m1, direct branches are zero-latency instructions that don't consume
any processor resources.  The DispatchUnit marks zero-latency instructions as
"executed", so that no scheduling is required.  The event of instruction
executed is then notified to all the listeners, and the reorder buffer (managed
by the RetireControlUnit) is updated. In particular, the entry associated to the
zero-latency instruction in the reorder buffer is marked as executed.

Before this patch, the DispatchUnit forgot to assign a retire control unit token
(RCUToken) to the zero-latency instruction. As a consequence, the RCUToken was
used uninitialized. This was causing a crash in the RetireControlUnit logic.

Fixes PR36650.

llvm-svn: 327056
2018-03-08 20:21:55 +00:00
Andrea Di Biagio 3a6b092017 [llvm-mca] LLVM Machine Code Analyzer.
llvm-mca is an LLVM based performance analysis tool that can be used to
statically measure the performance of code, and to help triage potential
problems with target scheduling models.

llvm-mca uses information which is already available in LLVM (e.g. scheduling
models) to statically measure the performance of machine code in a specific cpu.
Performance is measured in terms of throughput as well as processor resource
consumption. The tool currently works for processors with an out-of-order
backend, for which there is a scheduling model available in LLVM.

The main goal of this tool is not just to predict the performance of the code
when run on the target, but also help with diagnosing potential performance
issues.

Given an assembly code sequence, llvm-mca estimates the IPC (instructions per
cycle), as well as hardware resources pressure. The analysis and reporting style
were mostly inspired by the IACA tool from Intel.

This patch is related to the RFC on llvm-dev visible at this link:
http://lists.llvm.org/pipermail/llvm-dev/2018-March/121490.html

Differential Revision: https://reviews.llvm.org/D43951

llvm-svn: 326998
2018-03-08 13:05:02 +00:00