Commit Graph

277959 Commits

Author SHA1 Message Date
Alexey Bataev 617db5f822 [OPENMP] Codegen for `distribute simd` directive.
Initial codegen support for `distribute simd` directive.

llvm-svn: 319661
2017-12-04 15:38:33 +00:00
Sam Parker 987b2c9966 [ARM] CodeGen test
Add another and + load DAG combine test.

llvm-svn: 319660
2017-12-04 15:14:59 +00:00
Anna Thomas 7b360434ff [Loop Predication] Teach LP about reverse loops
Summary:
Currently, we only support predication for forward loops with step
of 1.  This patch enables loop predication for reverse or
countdownLoops, which satisfy the following conditions:
   1. The step of the IV is -1.
   2. The loop has a singe latch as B(X) = X <pred>
latchLimit with pred as s> or u>
   3. The IV of the guard is the decrement
IV of the latch condition (Guard is: G(X) = X-1 u< guardLimit).

This patch was downstream for a while and is the last series of patches
that's from our LP implementation downstream.

Reviewers: apilipenko, mkazantsev, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40353

llvm-svn: 319659
2017-12-04 15:11:48 +00:00
Sven van Haastregt d141e4806b [OpenCL] Define __IMAGE_SUPPORT__ macro for SPIR
Add #define __IMAGE_SUPPORT__ 1 for SPIR targets to indicate that SPIR
supports images.

Patch by Dmitry Borisenkov.

Differential Revision: https://reviews.llvm.org/D40252

llvm-svn: 319658
2017-12-04 15:01:08 +00:00
Jonas Hahnfeld 5db24d7c22 [NVPTX] Assign valid global names
PTX requires that identifiers consist only of [a-zA-Z0-9_$]. The
existing pass already ensured this for globals and this patch adds
the cleanup for functions with local linkage.

However, there was a different problem in the case of collisions
of the adjusted name: The ValueSymbolTable then automatically
appended ".N" with increasing Ns to get a unique name while helping
the ABI demangling. Special case this behavior to omit the dots and
append N directly. This will always give us legal names according
to the PTX requirements.

Differential Revision: https://reviews.llvm.org/D40573

llvm-svn: 319657
2017-12-04 14:19:33 +00:00
Jonas Devlieghere 64774bafff [NFC][lit] Use proper semantic versioning names for variables
The variable named `minor` was actually pointing to the patch part of
the version. While I was changing this I also made the check for Apple
clang more robust by checking both patch and minor rather than just
minor.

llvm-svn: 319656
2017-12-04 14:01:34 +00:00
Sam McCall 98775c5055 [clangd] Split CodeComplete into a separate file. NFC
Summary: Shared details of ClangdUnit and CodeComplete moved to a new Compiler file.

Reviewers: ilya-biryukov

Subscribers: klimek, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D40719

llvm-svn: 319655
2017-12-04 13:49:59 +00:00
Oliver Stannard 7ab60605f8 Revert r319649 - [Asm, ARM] Add fallback diag for multiple invalid operands
This is causing a failure in the llvm-clang-x86_64-expensive-checks-win
buildbot, and I can't reproduce it locally, so reverting until I can work out
what is wrong.

llvm-svn: 319654
2017-12-04 13:42:22 +00:00
Pavel Labath fd9a526a30 Makefile.rules: compile all tests with -fno-limit-debug-info
Summary:
This flag is on by default for darwin and freebsd, but off for linux.
Without it, clang will sometimes not emit debug info for types like
std::string. Whether it does this, and which tests will fail because of
that depends on the linux distro and c++ library version.

A bunch of tests were already setting these flags manually, but here
instead I take a whole sale approach and enable this flag for all tests.
Any test which does not want to have this flag (right now we have one
such test) can turn it off explicitly via
CFLAGS_EXTRAS+=$(LIMIT_DEBUG_INFO_FLAGS)

This fixes a bunch of data formatter tests on red-hat.

Reviewers: davide, jankratochvil

Subscribers: emaste, aprantl, krytarowski, JDevlieghere, lldb-commits

Differential Revision: https://reviews.llvm.org/D40717

llvm-svn: 319653
2017-12-04 13:31:56 +00:00
Sam McCall d0d43e6f14 Revert "[ValueTracking] Pass only a single lambda to computeKnownBitsFromShiftOperator by using KnownBits struct instead of separate APInts. NFCI"
This reverts commit r319624, which seems to cause a miscompile (breaks the
multistage PPC buildbots)

llvm-svn: 319652
2017-12-04 12:51:49 +00:00
Tim Corringham 6c6d5e24cd AMDGPU: fix missing s_waitcnt
Summary:
The pass that inserts s_waitcnt instructions where needed propagated
info used to track dependencies for each block by iterating over the
predecessor blocks. The iteration was terminated when a predecessor
that had not yet been processed was encountered. Any info in blocks
later in the list was therefore not processed, leading to the
possiblility of a required s_waitcnt not being inserted.

The fix is simply to change the "break" to "continue" for the
relevant loops, so that all visited blocks are processed. This
is likely what was intended when the code was written.

There is no test case provided for this fix because:
1) the only example that reproduces this is large and resistant to
being reduced
2) the change is trivial

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D40544

llvm-svn: 319651
2017-12-04 12:30:49 +00:00
Kamil Rytarowski 64fc9cf2e5 Move __tsan::Vector to __sanitizer
Summary:
The low-fat STL-like vector container will be reused in MSan.

It is needed to implement an atexit(3) interceptor on NetBSD/amd64 in MSan.

Sponsored by <The NetBSD Foundation>

Reviewers: joerg, dvyukov, eugenis, vitalybuka, kcc

Reviewed By: dvyukov

Subscribers: kubamracek, mgorny, llvm-commits, #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D40726

llvm-svn: 319650
2017-12-04 12:30:09 +00:00
Oliver Stannard 7cd4db94f8 [Asm, ARM] Add fallback diag for multiple invalid operands
This adds a "invalid operands for instruction" diagnostic for
instructions where there is an instruction encoding with the correct
mnemonic and which is available for this target, but where multiple
operands do not match those which were provided. This makes it clear
that there is some combination of operands that is valid for the current
target, which the default diagnostic of "invalid instruction" does not.

Since this is a very general error, we only emit it if we don't have a
more specific error.

Differential revision: https://reviews.llvm.org/D36747

llvm-svn: 319649
2017-12-04 12:02:32 +00:00
Peter Smith 014be8ac35 [ELF] Add BYTE expression to test case for non-contiguous relro [NFC]
As well as location counter expressions. The data generating expressions
such as BYTE can generate a non-zero sized OutputSection that will report
0 until assignAddresses() is called. Add an example to the existing test
case relro-non-contiguous-script-data.s.

Differential Revision: https://reviews.llvm.org/D40732

llvm-svn: 319648
2017-12-04 10:34:15 +00:00
Sam McCall ecbeab0ea1 [clangd] GlobalCompilationDatabase interface changes
Summary:
- GlobalCompilationDatabase now returns a single command (that's all we use)
- fallback flags are now part of the GlobalCompilationDatabase.
  There's a default implementation that they can optionally customize.
- this allows us to avoid invoking the fallback logic on two separate codepaths
- race on extra flags fixed by locking the mutex
- made GCD const-correct (DBGCD does have mutating methods)

Reviewers: hokein

Subscribers: klimek, cfe-commits, ilya-biryukov

Differential Revision: https://reviews.llvm.org/D40733

llvm-svn: 319647
2017-12-04 10:08:45 +00:00
Jonas Paulsson e86327f290 [TwoAddressInstructionPass] Bugfix in handling of sunk instructions.
An instruction returned by TII->convertToThreeAddress() may contain a %noreg
(undef) operand, which is not expected by tryInstructionTransform(). So if
this MI is sunk to a lower point in MBB, it must be skipped when later
encountered.

A new set SunkInstrs is used for this purpose.

Note: there is no test supplied here, as this was triggered on SystemZ while
working on a review of instruction flags. A test case for this bugfix will be
included in the upcoming SystemZ commit.

Review: Quentin Colombet
https://reviews.llvm.org/D40711

llvm-svn: 319646
2017-12-04 10:03:14 +00:00
Sam Parker 1e26d986aa [DAGCombine] Remove isAndLoadExtLoad arguments
Both LoadedVT and NarrowLoad are passed as references and neither
of them are used by any of its callers.

Differential Revision: https://reviews.llvm.org/D40713

llvm-svn: 319645
2017-12-04 09:48:26 +00:00
Martin Storsjo eca862de07 [AArch64] Allow using emulated tls on platforms other than ELF
This matches how it is done on X86.

This allows using emulated tls on windows; in MinGW environments,
native tls isn't supported at the moment.

Set the right Data*bitsDirective for windows to match the existing
tests for other platforms. Make parts of the existing tests a regex,
to allow matching .section .rdata for windows, to avoid having to
duplicate the rest of the tests for windows.

Differential Revision: https://reviews.llvm.org/D40770

llvm-svn: 319644
2017-12-04 09:09:04 +00:00
Martin Storsjo c85cc41801 [ARM] Allow using emulated tls on platforms other than ELF
This matches how it is done on X86.

This allows using emulated tls on windows; in MinGW environments,
native tls isn't supported at the moment.

Differential Revision: https://reviews.llvm.org/D40769

llvm-svn: 319643
2017-12-04 09:08:55 +00:00
Manuel Klimek 48c930cb1e Fix bug where we wouldn't break columns over the limit.
Before, we would not break:
  int a = foo(/* trailing */);
when the end of /* trailing */ was exactly the column limit; the reason
is that block comments can have an unbreakable tail length - in this case
2, for the trailing ");"; we would unconditionally account that when
calculating the column state at the end of the token, but not correctly
add it into the remaining column length before, as we do for string
literals.
The fix is to correctly account the trailing unbreakable sequence length
into our formatting decisions for block comments. Line comments cannot
have a trailing unbreakable sequence, so no change is needed for them.

llvm-svn: 319642
2017-12-04 08:53:16 +00:00
Craig Topper 4520d4f8ad [X86] Allow VPMAXUQ/VPMAXSQ/VPMINUQ/VPMINSQ to be used with 128/256 bit vectors when AVX512 is enabled.
These instructions can be used by widening to 512-bits and extracting back to 128/256. We do similar to several other instructions already.

llvm-svn: 319641
2017-12-04 07:21:01 +00:00
Craig Topper 1151facf76 [X86] Don't turn UINT_TO_FP into SINT_TO_FP during lowering.
We already do this as a DAG combine. The version during lowering can only trigger if known bits changes something that improves known bits analysis. But this means we should be improving known bits analysis to work on the unlowered form instead.

llvm-svn: 319640
2017-12-04 05:38:44 +00:00
Craig Topper 67217d7eb4 [SelectionDAG] Teach computeKnownBits some improvements to ISD::SRL with a non-splat constant shift amount.
If we have a non-splat constant shift amount, the minimum shift amount can be used to infer the number of zero upper bits of the result. There's probably a lot more that we can do here, but this
fixes a case where I wanted to infer the sign bit as zero when all the shift amounts are non-zero.

llvm-svn: 319639
2017-12-04 05:38:42 +00:00
Devin Coughlin a565a7b9b8 [analyzer] Don't treat lambda-captures float constexprs as undefined
RegionStore has special logic to evaluate captured constexpr variables.
However, if the constexpr initializer cannot be evaluated as an integer, the
value is treated as undefined. This leads to false positives when, for example,
a constexpr float is captured by a lambda.

To fix this, treat a constexpr capture that cannot be evaluated as unknown
rather than undefined.

rdar://problem/35784662

llvm-svn: 319638
2017-12-04 04:46:47 +00:00
Simon Pilgrim 569e53b0f6 [X86][AVX512] Tag PH2PS/PS2PH conversion instructions scheduler classes
llvm-svn: 319637
2017-12-03 21:43:54 +00:00
Simon Pilgrim 465a88bb92 [X86][AVX512] Tag packed F2I/I2F/F2F conversion instructions scheduler class
llvm-svn: 319636
2017-12-03 21:16:12 +00:00
Simon Pilgrim 9291053463 [X86][AVX512] Regenerate schedule tests.
llvm-svn: 319635
2017-12-03 21:07:36 +00:00
Simon Pilgrim bc8d0223fb [X86][SSE] Remove unused IIC_SSE_CVT_PI2PS_RR/IIC_SSE_CVT_PI2PS_RM itineraries
llvm-svn: 319634
2017-12-03 20:57:04 +00:00
Aleksei Sidorin 9d8ba2e1ae [ASTImporter] Add unit tests for UsingDecl and UsingShadowDecl
Patch by Kareem Khazem!

Differential Revision: https://reviews.llvm.org/D27181

llvm-svn: 319632
2017-12-03 16:04:07 +00:00
Hamza Sood 0bf99c6954 Corrected a typo in the building libc++ docs
llvm-svn: 319631
2017-12-03 10:18:35 +00:00
Yaxun Liu 30e4608cca CodeGen: Fix SelectionDAGISel::LowerArguments for sret addr space
SelectionDAGISel::LowerArguments assumes sret addr space is 0, which is
not true for amdgcn---amdgiz target.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D40255

llvm-svn: 319630
2017-12-03 03:31:45 +00:00
Hal Finkel a5986b9e91 Revert "[CodeGen] Add initial support for union members in TBAA"
This reverts commit r319413. See PR35503.

We can't use "union member" as the access type here like this.

llvm-svn: 319629
2017-12-03 03:10:13 +00:00
Craig Topper f3470e1ed4 [SelectionDAG] Use the inlined APInt shift methods since we've already bounds checked the shift.
The version that takes APInt is out of line. The 'unsigned' version optimizes for the common case of single word APInts.

llvm-svn: 319628
2017-12-03 03:07:09 +00:00
Sam Clegg 4b27c0554c Reland "[WebAssembly] Add support for visibility flag""
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish

Differential Revision: https://reviews.llvm.org/D40773

llvm-svn: 319627
2017-12-03 02:38:04 +00:00
Sam Clegg a2b35dac03 Reland "[WebAssembly] Add visibility flag to Wasm symbol flags""
Original change was rL319488.

This was reverted rL319602 due to a gcc 7.1 warning.

Differential Revision: https://reviews.llvm.org/D40772

llvm-svn: 319626
2017-12-03 01:19:23 +00:00
Matt Arsenault 2e8be9d126 Fix typo in emitted attribute name
Fixes build when using this attribute combination
on an intrinsic.

llvm-svn: 319625
2017-12-03 00:03:01 +00:00
Craig Topper 199acd88e3 [ValueTracking] Pass only a single lambda to computeKnownBitsFromShiftOperator by using KnownBits struct instead of separate APInts. NFCI
llvm-svn: 319624
2017-12-02 23:42:17 +00:00
Sam Clegg d09a356666 [WebAssembly] Pass through --undefined to Wasm LLD
This is a follow-on to D40724 (Wasm entrypoint changes #1,
add `--undefined` argument to LLD).

Patch by Nicholas Wilson

Differential Revision: https://reviews.llvm.org/D40739

llvm-svn: 319623
2017-12-02 23:11:13 +00:00
Yaxun Liu 494770403a CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT
Two issues found when doing codegen for splitting vector with non-zero alloca addr space:

DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT/SplitVecOp_EXTRACT_VECTOR_ELT uses dummy pointer info for creating
SDStore. Since one pointer operand contains multiply and add, InferPointerInfo is unable to
infer the correct pointer info, which ends up with a dummy pointer info for the target to lower
store and results in isel failure. The fix is to introduce MachinePointerInfo::getUnknownStack to
represent MachinePointerInfo which is known in alloca address space but without other information.

TargetLowering::getVectorElementPointer uses value type of pointer in addr space 0 for
multiplication of index and then add it to the pointer. However the pointer may be in an addr
space which has different size than addr space 0. The fix is to use the pointer value type for
index multiplication.

Differential Revision: https://reviews.llvm.org/D39758

llvm-svn: 319622
2017-12-02 22:13:22 +00:00
Philipp Stephani c256a4ed17 Fix assume-filename handling in clang-format.el
Summary:
When 'buffer-file-name' is nil 'call-process-region' returned a segmentation fault error.

This was a problem when using clang-format-buffer on an orgmode source code editing buffer.

I fixed this problem by excluding the '-assume-filename' argument when 'buffer-file-name' is nil.

To make it a bit more flexible I also added an optional argument, 'assume-file-name', to specify an assume-filename that overrides 'buffer-file-name'.

Reviewers: klimek, djasper, phst, phi

Reviewed By: phst, phi

Subscribers: phi, jholewinski, mgorny, javed.absar, eraman, cfe-commits

Differential Revision: https://reviews.llvm.org/D37903

llvm-svn: 319621
2017-12-02 21:18:14 +00:00
Don Hinton aa7d6db5c8 [cmake] Re-commit: Remove redundant call to cmake when building host tools.
Also pass CMAKE_(C|CXX)_COMPILER to add_custom_command.

Summary:
Remove the redundant, config-time call to cmake when
building host tools for cross compiles or optimized tablegen..

The config-time call to cmake is redundant because it will always get
called again when the CONFIGURE_LLVM_${target_name} target fires at
build-time.  This speeds up initial configuration, but has no affect
on build behavior.

Differential Revision: https://reviews.llvm.org/D40229

llvm-svn: 319620
2017-12-02 19:12:38 +00:00
Sanjay Patel 08fba37e9d [CodeGen] fix mapping from fmod calls to frem instruction
Similar to D40044 and discussed in D40594.

llvm-svn: 319619
2017-12-02 17:52:00 +00:00
Sanjay Patel 0c0f77d03d [CodeGen] remove stale comment; NFC
The libm functions with LLVM intrinsic twins were moved above this blob with:
https://reviews.llvm.org/rL319593

llvm-svn: 319618
2017-12-02 16:29:34 +00:00
Simon Atanasyan c8c5a6b277 [llvm-readobj] Remove redundant local variables to reduce the code. NFC
llvm-svn: 319617
2017-12-02 13:06:40 +00:00
Simon Atanasyan d4b693bfb8 [llvm-readobj] Print static MIPS GOT
If a linked binary file contains a dynamic section, the GOT layout
defined by the dynamic section entries. In a statically linked file
the GOT is just a series of entries. This change teaches `llvm-readobj`
to print the GOT in that case. That provides a feature parity with GNU
`readelf`.

llvm-svn: 319616
2017-12-02 13:06:35 +00:00
Simon Atanasyan d4700b2ad1 [llvm-readobj] Delete unused method argument. NFC
llvm-svn: 319615
2017-12-02 13:06:27 +00:00
Simon Pilgrim 299a54c5b9 [X86][SSE] Cleanup float/int conversion scheduler itinerary classes
Makes it easier to grok where each is supposed to be used, mainly useful for adding to the AVX512 instructions but hopefully can be used more in SSE/AVX as well.

llvm-svn: 319614
2017-12-02 12:27:44 +00:00
Craig Topper 64469a18f3 [X86] Fix copy paste mistake in test case for r319612.
llvm-svn: 319613
2017-12-02 08:39:02 +00:00
Craig Topper 7d9a3b82c6 [X86] Teach the assembler to support %db8-%db15 as aliases for %dr8-%dr15.
llvm-svn: 319612
2017-12-02 08:27:46 +00:00
Craig Topper 3e846ecb5b [X86] Support %dr8-%dr15 in the assembler.
Apparently I failed to make this work when I fixed it in the disassembler way back in r224862.

llvm-svn: 319611
2017-12-02 08:27:45 +00:00