5173ee03af
Add PREFETCHW codegen support
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- Add 'PRFCHW' feature defined in AVX2 ISA extension
llvm-svn: 178040
2013-03-26 17:47:11 +00:00
ab588efe42
Added 0x0D to 2-byte opcode extension table for prefetch* variants
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Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs
llvm-svn: 174920
2013-02-12 00:19:12 +00:00
b22310fda6
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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llvm-svn: 150878
2012-02-18 12:03:15 +00:00
30088ba110
Add 3DNow! intrinsics.
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llvm-svn: 129551
2011-04-15 00:32:41 +00:00
bb48e26732
Add 3DNowA instructions.
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llvm-svn: 115477
2010-10-03 20:23:13 +00:00
b44b202d66
add support for the prefetch/prefetchw instructions, move femms into
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the right file. The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.
llvm-svn: 115468
2010-10-03 18:42:30 +00:00
3a0a620c2e
what the heck, add support for the rest of the 3dNow! binary operations.
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llvm-svn: 115467
2010-10-03 18:24:18 +00:00
45270db916
Implement support for the bizarre 3DNow! encoding (which is unlike anything
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else in X86), and add support for pavgusb. This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.
If someone else is interested in banging out the rest of the 3DNow!
instructions, it should be quite easy now.
llvm-svn: 115466
2010-10-03 18:08:05 +00:00
ae1a9de083
stub out a header to put 3dNow! instructions into.
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llvm-svn: 115429
2010-10-02 23:06:23 +00:00
Michael Liao