Commit Graph

4618 Commits

Author SHA1 Message Date
Nick Lewycky 90b2ac2696 For statistics that are only used in functions declared in !NDEBUG, wrap the
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!

llvm-svn: 117345
2010-10-26 00:51:57 +00:00
Devang Patel 43c3f4b63c Simplify.
Do not count use of sdisel for single call instruction.

llvm-svn: 117316
2010-10-25 21:31:46 +00:00
Devang Patel 3bc6d198fb Add counters to count basic blocks and machine basic blocks with out of order line number info.
Add counters to count how many basic blocks are entirely selected by fastisel.

llvm-svn: 117310
2010-10-25 20:55:43 +00:00
Chandler Carruth 82058c05f8 Move the remaining attribute macros to systematic names based on the attribute
name and prefixed with 'LLVM_'.

llvm-svn: 117203
2010-10-23 08:40:19 +00:00
Michael J. Spencer 0e36e0340a X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.

llvm-svn: 117061
2010-10-21 20:49:23 +00:00
Michael J. Spencer 83ce5f181f CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.

llvm-svn: 116978
2010-10-21 00:08:21 +00:00
Dale Johannesen 320a553319 Remove Synthesizable from the Type system; as MMX vector
types are no longer Legal on X86, we don't need it.
No functional change.  8499854.

llvm-svn: 116947
2010-10-20 21:32:10 +00:00
Dan Gohman a94cc6dfe8 Make CodeGen TBAA-aware.
llvm-svn: 116890
2010-10-20 00:31:05 +00:00
Jim Grosbach bbdc5d2ef9 Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268

llvm-svn: 116879
2010-10-19 23:27:08 +00:00
Owen Anderson 6c18d1aac0 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

llvm-svn: 116820
2010-10-19 17:21:58 +00:00
Michael J. Spencer 5e683250ee X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.

llvm-svn: 116665
2010-10-16 08:25:41 +00:00
Michael J. Spencer d3ea25e66e Whitespace!
llvm-svn: 116664
2010-10-16 08:25:21 +00:00
Chris Lattner eb313a46fc fix the default va_arg expansion (in the realignment case) to not implicitly
truncate the stack pointer to 32-bits on a 64-bit machine.

llvm-svn: 116169
2010-10-10 18:36:26 +00:00
Dan Gohman aadc5596f1 ComputeLinearIndex doesn't need its TLI argument.
llvm-svn: 115792
2010-10-06 16:18:29 +00:00
Evan Cheng 49d4c0bd18 - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755
2010-10-06 06:27:31 +00:00
Owen Anderson d8d1dcc09a Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float).  This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.

llvm-svn: 115634
2010-10-05 17:24:05 +00:00
Evan Cheng c8d6cfd730 This DAG combine BRCOND transformation can look pass truncate of the operand:
//   %a = ...                                                                                                                                                                                  
    //   %b = and i32 %a, 2                                                                                                                                                                        
    //   %c = srl i32 %b, 1                                                                                                                                                                        
    //   brcond i32 %c ...                                                                                                                                                                         
    //                                                                                                                                                                                             
    // into                                                                                                                                                                                        
    //                                                                                                                                                                                             
    //   %a = ...                                                                                                                                                                                  
    //   %b = and i32 %a, 2                                                                                                                                                                        
    //   %c = setcc eq %b, 0                                                                                                                                                                       
    //   brcond %c ...

Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.

This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.

llvm-svn: 115571
2010-10-04 22:41:01 +00:00
Devang Patel d3fe5fa5d1 Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
llvm-svn: 115323
2010-10-01 19:00:44 +00:00
Gabor Greif 47a3b8c30b typo
llvm-svn: 115310
2010-10-01 10:32:19 +00:00
Chris Lattner f08bfdc29f fix typo
llvm-svn: 115300
2010-10-01 06:54:02 +00:00
Chris Lattner a205055857 fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
llvm-svn: 115294
2010-10-01 05:36:09 +00:00
Dale Johannesen dd224d2333 Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
2010-09-30 23:57:10 +00:00
Jakob Stoklund Olesen 665aa6efcc When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.

If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.

This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.

The fix is to uipdate stale MBB pointers whenever a block is split during
emission.

llvm-svn: 115191
2010-09-30 19:44:31 +00:00
Evan Cheng 4a010fd1ea Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
pipeline forwarding path.

llvm-svn: 115098
2010-09-29 22:42:35 +00:00
Oscar Fuentes b4b12535e8 Removed a bunch of unnecessary target_link_libraries.
llvm-svn: 114999
2010-09-28 22:39:14 +00:00
Dale Johannesen 117f7708c4 Don't try to make a vector of x86mmx; this won't work,
and asserts.

llvm-svn: 114843
2010-09-27 17:29:14 +00:00
John Thompson 8118ef8d3d Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
llvm-svn: 114767
2010-09-24 22:24:05 +00:00
Michael J. Spencer ded5f66813 Get rid of pop_macro warnings on MSVC.
llvm-svn: 114750
2010-09-24 19:48:47 +00:00
Evan Cheng 6b8b2b7312 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
llvm-svn: 114681
2010-09-23 18:32:19 +00:00
Oscar Fuentes 57214f533a Fix VS 2010 build.
Patch by Nathan Jeffords!

llvm-svn: 114661
2010-09-23 16:59:36 +00:00
Evan Cheng b6d175a39d Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
llvm-svn: 114634
2010-09-23 07:18:35 +00:00
Evan Cheng 79687dda9a SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.

This is one of the patches leading up to disabling codegen prepare critical edge
splitting.

llvm-svn: 114630
2010-09-23 06:51:55 +00:00
Owen Anderson 3231d13ddd A select between a constant and zero, when fed by a bit test, can be efficiently
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.

llvm-svn: 114599
2010-09-22 22:58:22 +00:00
John Thompson c467aa2fa4 Fixed pr20314-2.c failure, added E, F, p constraint letters.
llvm-svn: 114490
2010-09-21 22:04:54 +00:00
Chris Lattner a9e57e0eff Rework passing parent pointers into complexpatterns, I forgot
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.

llvm-svn: 114489
2010-09-21 22:00:25 +00:00
Devang Patel 99ff76212a If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
Testcase is in r114476.
This fixes radar 8412415.

llvm-svn: 114478
2010-09-21 20:56:33 +00:00
Chris Lattner 0bb8b19865 correct this logic.
llvm-svn: 114474
2010-09-21 20:46:40 +00:00
Owen Anderson 5e65dfbb97 Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.

llvm-svn: 114473
2010-09-21 20:42:50 +00:00
Chris Lattner dd83548fea just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.

llvm-svn: 114472
2010-09-21 20:37:12 +00:00
Chris Lattner a4f199720d finish pushing MachinePointerInfo through selectiondags. At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.

llvm-svn: 114464
2010-09-21 18:58:22 +00:00
Chris Lattner 676c61db0e update a bunch of code to use the MachinePointerInfo version of getStore.
llvm-svn: 114461
2010-09-21 18:41:36 +00:00
Bob Wilson 5549d496dd Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
and store intrinsics are represented with MemIntrinsicSDNodes.

llvm-svn: 114454
2010-09-21 17:56:22 +00:00
Chris Lattner 6963c1f789 eliminate an old SelectionDAG::getTruncStore method, propagating
MachinePointerInfo around more.

llvm-svn: 114452
2010-09-21 17:42:31 +00:00
Chris Lattner 5e39ffd02f eliminate last SelectionDAG::getLoad old entrypoint, on to stores.
llvm-svn: 114450
2010-09-21 17:28:52 +00:00
Chris Lattner ea952f05a5 fix the code that infers SV info to be correct when dealing
with an indexed load/store that has an offset in the index.

llvm-svn: 114449
2010-09-21 17:24:05 +00:00
Chris Lattner 3d178ed4d4 propagate MachinePointerInfo through various uses of the old
SelectionDAG::getExtLoad overload, and eliminate it.

llvm-svn: 114446
2010-09-21 17:04:51 +00:00
Chris Lattner 1ffcf527c7 continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.

llvm-svn: 114443
2010-09-21 16:36:31 +00:00
Chris Lattner f72c3c08a4 convert dagcombine off the old form of getLoad. This fixes several bugs
with SVOffset computation.

llvm-svn: 114442
2010-09-21 16:08:50 +00:00
Chris Lattner e32675253f simplify DAGCombiner::SimplifySelectOps step #2/2.
llvm-svn: 114437
2010-09-21 15:58:55 +00:00
Chris Lattner 254c445e63 substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
no functionality change (step #1)

llvm-svn: 114436
2010-09-21 15:46:59 +00:00