Commit Graph

3 Commits

Author SHA1 Message Date
Matt Arsenault 3d59e388ca AMDGPU: Activate all lanes when spilling CSR VGPR for SGPR spills
If some lanes weren't active on entry to the function, this could
clobber their VGPR values.

llvm-svn: 361655
2019-05-24 18:18:51 +00:00
Scott Linder afc24ed21a [AMDGPU] Mark test functions with hidden visibility
Prepare for future patch which affects codegen for calls to preemptible
functions.

Differential Revision: https://reviews.llvm.org/D57605

llvm-svn: 352920
2019-02-01 21:23:28 +00:00
Matt Arsenault 167601e629 DAG: Don't use ABI copies in some contexts
If an ABI-like value is used in a different block,
the type split used is not necessarily the same as
the call's ABI. The value is used through an intermediate
copy virtual registers from the other block. This
resulted in copies with inconsistent sizes later.

Fixes regressions since r338197 when AMDGPU started
splitting vector types for calls.

llvm-svn: 341018
2018-08-30 05:49:28 +00:00