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Author SHA1 Message Date
Evan Cheng 9c031c0ddf Switch BCC, MOVCCr, etc. to PredicateOperand. 
llvm-svn: 36948
 2007-05-08 21:08:43 +00:00
Evan Cheng d194a8603d PredicateOperand can be used as a normal operand for isel. 
llvm-svn: 36947
 2007-05-08 21:06:08 +00:00
Evan Cheng f50ba31ec6 R0 is a sub-register of X0, etc. 
llvm-svn: 36939
 2007-05-08 17:03:51 +00:00
Lauro Ramos Venancio 744350b131 Fix PR1390 in a better way. 
llvm-svn: 36916
 2007-05-07 23:15:16 +00:00
Evan Cheng d37c23745f This is no longer needed after enabling the DAG combiner xform. 
llvm-svn: 36909
 2007-05-07 21:29:41 +00:00
Chris Lattner 5992f4709c add this back 
llvm-svn: 36892
 2007-05-06 20:31:17 +00:00
Anton Korobeynikov c892cf466d Update MSIL BE. This patch fixes most weird glitches outlined in 
README.txt. Patch by Roman Samoilov!

llvm-svn: 36890
 2007-05-06 20:13:33 +00:00
Bill Wendling f985c492e1 3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX. 
llvm-svn: 36860
 2007-05-06 07:56:19 +00:00
Nate Begeman 4060c7ac63 Reference correct header 
llvm-svn: 36834
 2007-05-06 04:00:55 +00:00
Lauro Ramos Venancio 34b2735f20 Fix PR1390. 
Don't spill extra register to align the stack.

llvm-svn: 36814
 2007-05-05 23:44:41 +00:00
Chris Lattner 9958b82733 add a note 
llvm-svn: 36811
 2007-05-05 22:44:08 +00:00
Chris Lattner 2cca31f77f the mason example is implemented. Move some examples out of llvm/test, 
upgrade the syntax of some other examples.

llvm-svn: 36806
 2007-05-05 22:29:06 +00:00
Chris Lattner cc43c3fe6b implement anyextend from i1 -> i64 
llvm-svn: 36802
 2007-05-05 22:17:00 +00:00
Chris Lattner be8f99ecbb move CodeGen/X86/overlap-add.ll here. 
llvm-svn: 36799
 2007-05-05 22:10:24 +00:00
Anton Korobeynikov 4db0090339 Emit sections/directives in the proper order. This fixes PR1376. Also, 
some small cleanup was made.

llvm-svn: 36780
 2007-05-05 09:04:50 +00:00
Lauro Ramos Venancio 8f8199086f Add a processor. 
llvm-svn: 36765
 2007-05-04 22:16:30 +00:00
Bill Wendling e6182267d7 Add an "implies" field to features. This indicates that, if the current 
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.

llvm-svn: 36756
 2007-05-04 20:38:40 +00:00
Evan Cheng 33c9886001 On Mac OS X, GV requires an extra load only when relocation-model is non-static. 
llvm-svn: 36718
 2007-05-04 00:26:58 +00:00
Evan Cheng 23040754b0 Should never see an indexed load / store with zero offset. 
llvm-svn: 36714
 2007-05-03 23:30:36 +00:00
Dale Johannesen 89200ce0f0 Evan's patch to avoid FPreg->intreg copy for cvt; store to mem 
llvm-svn: 36693
 2007-05-03 20:54:42 +00:00
Lauro Ramos Venancio 83930198dd Debug support for arm-linux. 
Patch by Raul Herbster.

llvm-svn: 36690
 2007-05-03 20:28:35 +00:00
Dan Gohman 2675a651b0 Indent the .text, .data, and .bss directives in assembly output, so that 
they are consistent with the other directives.

llvm-svn: 36687
 2007-05-03 18:46:30 +00:00
Chris Lattner 83df45a959 Fix two classes of bugs: 
1. x86 backend rejected (&gv+c) for the 'i' constraint when in static mode.
  2. the matcher didn't correctly reject and accept some global addresses.
     the right predicate is GVRequiresExtraLoad, not "relomodel = pic".

llvm-svn: 36670
 2007-05-03 16:52:29 +00:00
Chris Lattner 9a8c7cf00b add support for printing offset from global 
llvm-svn: 36669
 2007-05-03 16:42:23 +00:00
Chris Lattner 90bb4fc96b revert accidental commit 
llvm-svn: 36668
 2007-05-03 16:40:25 +00:00
Chris Lattner c1a2a3b344 add support for printing offset of global 
llvm-svn: 36667
 2007-05-03 16:39:48 +00:00
Dan Gohman e27e6e6fa8 Sets the section names for fixed-size constants and use the mergeable 
flag for ELF on x86 so that duplicate constants can be eliminated by
the linker. This matches what GCC does with its -fmerge-constants
option, which is enabled at most -O levels.

llvm-svn: 36666
 2007-05-03 16:38:57 +00:00
Chris Lattner 4995f92cbc revert reid's patch to fix these failures: 
test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll for PR1099 [DEJAGNU]
Applications/SPASS/SPASS [CBE]
Regression/C/2004-03-15-IndirectGoto [CBE]

llvm-svn: 36664
 2007-05-03 02:57:13 +00:00
Evan Cheng bef131de68 Typo. It's checking if V is multiple of 4, not multiple of 3. :-) 
llvm-svn: 36663
 2007-05-03 02:00:18 +00:00
Devang Patel 8c78a0bff0 Drop 'const' 
llvm-svn: 36662
 2007-05-03 01:11:54 +00:00
Chris Lattner 1c1082133c match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll 
llvm-svn: 36660
 2007-05-03 00:32:00 +00:00
Chris Lattner f65f18b2f9 expose HonorSignDependentRoundingFPMathOption to .td files 
llvm-svn: 36658
 2007-05-03 00:27:11 +00:00
Chris Lattner 6ac3a37fb6 Add a new option. 
llvm-svn: 36657
 2007-05-03 00:16:07 +00:00
Bill Wendling b5ce7c5466 Non-algorithmic change. Moved definitions around into separate sections 
for SSE1, SSE2, SSE3, and SSSE3.

llvm-svn: 36656
 2007-05-02 23:11:52 +00:00
Bill Wendling ba3b7ee030 Update. 
llvm-svn: 36653
 2007-05-02 21:42:20 +00:00
Devang Patel e95c6ad802 Use 'static const char' instead of 'static const int'. 
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
 2007-05-02 21:39:20 +00:00
Lauro Ramos Venancio 41223586a2 Fix build error. 
llvm-svn: 36648
 2007-05-02 20:37:47 +00:00
Anton Korobeynikov f1dcf69fc3 Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux 
with non-llvm-compiled (e.g. "native") unwind runtime.

llvm-svn: 36647
 2007-05-02 19:53:33 +00:00
Anton Korobeynikov 073ad20459 Emit correct DWARF reg # for RA (return address) register 
llvm-svn: 36646
 2007-05-02 08:46:03 +00:00
Reid Spencer f3aa932824 Make sign extension work correctly for unusual bit widths. 
llvm-svn: 36635
 2007-05-02 02:17:41 +00:00
Dale Johannesen 9ce17f1e33 Add some support for (Darwin) code-generating directives in getInlineAsmLength. 
Support is incomplete, but more accurate than gcc's.

llvm-svn: 36634
 2007-05-02 01:02:40 +00:00
Anton Korobeynikov b538f67b1a Fix couple of bugs connected with eh info: 
1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.

llvm-svn: 36633
 2007-05-01 22:23:12 +00:00
Devang Patel 09f162ca6a Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng fa34bc9623 Doh. PC displacement is between the constantpool and the add instruction. 
llvm-svn: 36630
 2007-05-01 20:27:19 +00:00
Anton Korobeynikov 76c8c95466 Use correct PC symbol 
llvm-svn: 36628
 2007-05-01 10:19:31 +00:00
Anton Korobeynikov 2ac2197a0f Adjust correct EH-related sections 
llvm-svn: 36627
 2007-05-01 10:16:06 +00:00
Evan Cheng 5662b21db1 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Nate Begeman 27a625a74b llvm bug #1350, parts 1, 2, and 3. 
llvm-svn: 36618
 2007-05-01 05:57:02 +00:00
Evan Cheng 77c545e6b8 Under normal circumstances, when a frame pointer is not required, we reserve 
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607
 2007-05-01 00:52:08 +00:00
Dale Johannesen 8dd36a51fc Remove item: thumb padding in constant islands 
llvm-svn: 36586
 2007-04-30 00:32:06 +00:00
Dale Johannesen 71577f3848 remove unused variable 
llvm-svn: 36585
 2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio 2c673ad7ef Enable protected visibility on ARM. 
llvm-svn: 36583
 2007-04-30 00:23:51 +00:00
Dale Johannesen 4a00cf3fc4 Rewrite of Thumb constant islands handling (exact allowance for padding 
around islands and jump tables).

llvm-svn: 36573
 2007-04-29 19:19:30 +00:00
Dale Johannesen 1ee29dd026 Make ARM-specific version of getInlineAsmLength 
llvm-svn: 36572
 2007-04-29 19:17:45 +00:00
Anton Korobeynikov 39f3cffbe3 Implement protected visibility. This partly implements PR1363. Linker 
should be taught to deal with protected symbols.

llvm-svn: 36565
 2007-04-29 18:35:00 +00:00
Dale Johannesen 7e7280b538 change per review 
llvm-svn: 36519
 2007-04-28 00:36:37 +00:00
Dale Johannesen 29c05756b5 Prevent Thumb code from generating ARM instructions 
llvm-svn: 36518
 2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio 99cb63029a add parenthesis. 
llvm-svn: 36514
 2007-04-27 20:10:08 +00:00
Evan Cheng 559c546453 Doh. ARM::LEApcrel is a single instruction MI. 
llvm-svn: 36513
 2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio 62f65468bc In Thumb mode, the frame register must be R7. 
llvm-svn: 36512
 2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio c39c12a3fa ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. 
llvm-svn: 36506
 2007-04-27 13:54:47 +00:00
Evan Cheng c9f22fd1a4 Darwin runtime library does not have these. 
llvm-svn: 36505
 2007-04-27 08:15:43 +00:00
Evan Cheng d9990f061f Special handling of LEApcrel and tLEApcrel. 
llvm-svn: 36504
 2007-04-27 08:14:15 +00:00
Evan Cheng e54018687d Back out previous check-in. Incorrect. 
llvm-svn: 36503
 2007-04-27 07:50:02 +00:00
Evan Cheng 68ec63b3d7 tLEApcrel is a AddrModeTs, i.e. pc relative. 
llvm-svn: 36502
 2007-04-27 07:37:22 +00:00
Dan Gohman a30eabdd6e Fix PR1339 and CodeGen/X86/dollar-name.ll 
llvm-svn: 36495
 2007-04-26 21:07:05 +00:00
Bill Wendling c8264ca457 Have MMX registers clobbered in x86-64 too. 
llvm-svn: 36494
 2007-04-26 21:06:48 +00:00
Evan Cheng 910c80851e Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
llvm-svn: 36483
 2007-04-26 19:00:32 +00:00
Evan Cheng ce6e6db704 Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. 
llvm-svn: 36456
 2007-04-26 01:09:28 +00:00
Evan Cheng 0ba174534c Match MachineFunction::UsedPhysRegs changes. 
llvm-svn: 36452
 2007-04-25 22:13:27 +00:00
Bill Wendling 157d7ee7e5 Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers 
clobbered by a call.

llvm-svn: 36448
 2007-04-25 21:31:48 +00:00
Chris Lattner d20cd6658a do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 
when promoted to 64-bits

llvm-svn: 36442
 2007-04-25 17:23:53 +00:00
Lauro Ramos Venancio 4ae9425bb6 remember to emit weak reference in one more case. 
llvm-svn: 36438
 2007-04-25 14:50:40 +00:00
Anton Korobeynikov a97b694c82 Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part 
will follow.

llvm-svn: 36435
 2007-04-25 14:27:10 +00:00
Evan Cheng 8cd224e81c Relex assertions to account for additional implicit def / use operands. 
llvm-svn: 36430
 2007-04-25 07:12:14 +00:00
Chris Lattner b975bebec1 support for >4G stack frames 
llvm-svn: 36425
 2007-04-25 04:30:24 +00:00
Chris Lattner 1ef35a2721 support >4G stack frames 
llvm-svn: 36423
 2007-04-25 04:25:10 +00:00
Chris Lattner cb35c61a4b Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll 
llvm-svn: 36410
 2007-04-24 22:51:03 +00:00
Bill Wendling a784d875be Update. 
llvm-svn: 36407
 2007-04-24 21:20:03 +00:00
Bill Wendling b3b6c35beb Add the PADDQ to the list. 
llvm-svn: 36406
 2007-04-24 21:19:14 +00:00
Bill Wendling 5c7f25632e Add the final MMX instructions. Correct a few wrong patterns. 
llvm-svn: 36405
 2007-04-24 21:18:37 +00:00
Bill Wendling e2324ca17d Remove some invalid instructions from this check. 
llvm-svn: 36404
 2007-04-24 21:17:46 +00:00
Bill Wendling 591eab8844 Support for the special case of a vector with the canonical form: 
vector_shuffle v1, v2, <2, 6, 3, 7>

I.e.

         vector_shuffle v, undef, <2, 2, 3, 3>

MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.

llvm-svn: 36403
 2007-04-24 21:16:55 +00:00
Dale Johannesen fdfb757682 Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining 
BBOffsets and BBSizes when adjusting conditional branches.

llvm-svn: 36372
 2007-04-23 20:09:04 +00:00
Dale Johannesen ed0ecdb7ff add Align field, and use when generating function alignment 
llvm-svn: 36371
 2007-04-23 20:07:25 +00:00
Dale Johannesen 8eb9bff493 add isThumb (unused as yet) 
llvm-svn: 36370
 2007-04-23 20:04:35 +00:00
Dale Johannesen 0a1069d526 Fix generic getInlineAsmLength 
llvm-svn: 36369
 2007-04-23 20:00:17 +00:00
Lauro Ramos Venancio 6db679a49a X86 TLS: optimize the implementation of "local exec" model. 
llvm-svn: 36359
 2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio efb8077ddd X86 TLS: fix and optimize the implementation of "initial exec" model. 
llvm-svn: 36355
 2007-04-22 22:50:52 +00:00
Christopher Lamb 297fcb0f73 Support alignment queries for degenerate (length 1) vectors. 
llvm-svn: 36352
 2007-04-22 21:54:13 +00:00
Lauro Ramos Venancio ee2d164f0f Implement PIC for arm-linux. 
llvm-svn: 36324
 2007-04-22 00:04:12 +00:00
Lauro Ramos Venancio 4e91908f17 X86 TLS: Implement review feedback. 
llvm-svn: 36318
 2007-04-21 20:56:26 +00:00
Jeff Cohen 5959f42498 Comment out usage of write() for now. 
llvm-svn: 36287
 2007-04-20 22:40:10 +00:00
Lauro Ramos Venancio 2518889872 Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.

llvm-svn: 36283
 2007-04-20 21:38:10 +00:00
Evan Cheng e656d093a5 Specify S registers as D registers' sub-registers. 
llvm-svn: 36280
 2007-04-20 21:20:10 +00:00
Evan Cheng 06a164c6bc Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH]. 
llvm-svn: 36279
 2007-04-20 21:15:21 +00:00
Evan Cheng ac9fdde7f4 Add sub-registers sets. 
llvm-svn: 36278
 2007-04-20 21:13:46 +00:00
Chris Lattner 3d3f22766a add a crazy idea 
llvm-svn: 36273
 2007-04-20 20:18:43 +00:00
Jeff Cohen 6c673ac01c Make Microsoft assembler and linker happy. 
llvm-svn: 36265
 2007-04-20 00:33:54 +00:00
Chris Lattner 25e62eb63b Fix a message, patch by Christopher Lamb. 
llvm-svn: 36264
 2007-04-19 18:42:38 +00:00
Lauro Ramos Venancio 42cd7253b1 Fix a bug in getFrameRegister. 
Reported by Raul Herbster.

llvm-svn: 36262
 2007-04-19 14:09:38 +00:00
Dan Gohman 29845cd40d Fix the spelling of the prefetchnta instruction. 
llvm-svn: 36256
 2007-04-18 14:09:14 +00:00
Evan Cheng 5118226c6c Oops. Didn't mean to check in a quick hack. 
llvm-svn: 36227
 2007-04-17 23:33:39 +00:00
Chris Lattner 598bc0d9a3 dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll 
llvm-svn: 36222
 2007-04-17 22:39:58 +00:00
Evan Cheng 2f45bf31c5 Change getAllocatableSet() so it returns allocatable registers for a specific register class. 
llvm-svn: 36215
 2007-04-17 20:23:34 +00:00
Anton Korobeynikov 9b91d98a30 Add comment 
llvm-svn: 36213
 2007-04-17 19:34:00 +00:00
Chris Lattner 2509d7547d add a note 
llvm-svn: 36203
 2007-04-17 18:03:00 +00:00
Chris Lattner ff0598de75 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.

llvm-svn: 36196
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov 8b7aab009e Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
 2007-04-17 09:20:00 +00:00
Andrew Lenharth 2077814c91 Use this nifty Constraints thing and fix the inverted conditional moves 
llvm-svn: 36191
 2007-04-17 04:07:59 +00:00
Chris Lattner 62a8cbe594 SSE4 is apparently public now. 
llvm-svn: 36185
 2007-04-17 00:02:37 +00:00
Jeff Cohen 6f3a548ff4 In the event that some really old non-Intel or -AMD CPU is encountered... 
llvm-svn: 36177
 2007-04-16 21:59:44 +00:00
Jeff Cohen da17029218 Before assuming that the original code didn't work for Athlon64, the person who 
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173
 2007-04-16 21:48:58 +00:00
Anton Korobeynikov fb80151c42 Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Reid Spencer 19c0217d99 For PR1336: 
Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll

llvm-svn: 36125
 2007-04-16 14:06:19 +00:00
Chris Lattner e275463e2f add a note 
llvm-svn: 36028
 2007-04-14 23:06:09 +00:00
Jeff Cohen b4c610fb89 Silence VC++ warning. 
llvm-svn: 35975
 2007-04-13 22:52:03 +00:00
Chris Lattner 502c3f48d9 arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
llvm-svn: 35962
 2007-04-13 06:50:55 +00:00
Reid Spencer 9945235b55 Implement review feedback .. don't double search a set. 
llvm-svn: 35957
 2007-04-12 21:57:15 +00:00
Reid Spencer 0ef2ca8da7 Provide support for intrinsics that lower themselves to a function body. 
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.

llvm-svn: 35954
 2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio e6818b2549 Implement Thread Local Storage (TLS) in CBackend. 
llvm-svn: 35951
 2007-04-12 18:42:08 +00:00
Chris Lattner 2805bce656 Fix mmx paddq, add support for the 'y' register class, though it isn't tested. 
llvm-svn: 35940
 2007-04-12 04:14:49 +00:00
Chris Lattner a5fcd24746 Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
llvm-svn: 35926
 2007-04-11 22:29:46 +00:00
Chris Lattner fe926e2960 Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll 
llvm-svn: 35909
 2007-04-11 16:17:12 +00:00
Chris Lattner a6aa0319f1 done 
llvm-svn: 35884
 2007-04-11 05:34:00 +00:00
Reid Spencer a472f66dd0 For PR1146: 
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.

llvm-svn: 35877
 2007-04-11 02:44:20 +00:00
Bill Wendling f099841573 Add support for our first SSSE3 instruction "pmulhrsw". 
llvm-svn: 35869
 2007-04-10 22:10:25 +00:00
Chris Lattner d4a9b92a13 new micro optzn 
llvm-svn: 35867
 2007-04-10 21:14:01 +00:00
Chris Lattner 9b6d69e0c2 restore support for negative strides 
llvm-svn: 35859
 2007-04-10 03:48:29 +00:00
Chris Lattner d44e24c896 remove dead target hooks 
llvm-svn: 35846
 2007-04-09 23:33:39 +00:00
Chris Lattner 808ac93f68 remove some dead hooks 
llvm-svn: 35845
 2007-04-09 23:31:19 +00:00
Chris Lattner 39f65335d5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Chris Lattner 19ccd6226c Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.

llvm-svn: 35835
 2007-04-09 22:10:05 +00:00
Jeff Cohen 4397363c16 When the number of elements is zero, don't malloc 32GB on 64-bit systems. 
Fixes unexpected failures on FreeBSD/amd64 of:
  CFrontend/2005-09-24-BitFieldCrash.c:
  CFrontend/2007-02-04-EmptyStruct.c:
  CFrontend/2007-03-26-ZeroWidthBitfield.c:
  CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:

llvm-svn: 35828
 2007-04-09 19:26:30 +00:00
Reid Spencer 71b79e3d99 For PR1146: 
Adapt handling of parameter attributes to use the new ParamAttrsList class.

llvm-svn: 35814
 2007-04-09 06:17:21 +00:00
Chris Lattner 7451e4d6a1 move a bunch of register constraints from being handled by 
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804
 2007-04-09 05:49:22 +00:00
Chris Lattner 2b6b4eb471 implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values 
used with x constraints.

llvm-svn: 35803
 2007-04-09 05:31:48 +00:00
Chris Lattner 590ed5e5b7 implement CodeGen/X86/inline-asm-x-scalar.ll 
llvm-svn: 35799
 2007-04-09 05:11:28 +00:00
Reid Spencer e9f516384d Squelch a warning about mismatch between sign of constant and sign of return 
type.

llvm-svn: 35674
 2007-04-04 22:07:24 +00:00
Evan Cheng 1e150dedd1 Implement inline asm modifier P. 
llvm-svn: 35640
 2007-04-04 00:13:29 +00:00
Evan Cheng bd31f41daa Typo. 
llvm-svn: 35639
 2007-04-04 00:06:07 +00:00
Bill Wendling ac5b650a54 Adding more MMX instructions. 
llvm-svn: 35638
 2007-04-03 23:48:32 +00:00
Chris Lattner f79fb5cad0 make a new missing features section 
llvm-svn: 35637
 2007-04-03 23:41:34 +00:00
Evan Cheng 3c68d4e8ba Remove unused constant pool entries. 
llvm-svn: 35635
 2007-04-03 23:39:48 +00:00
Bill Wendling 2640b4a4ab Updated 
llvm-svn: 35634
 2007-04-03 23:37:20 +00:00
Evan Cheng 39d8b4db92 Fixed a bug that causes codegen of noop like add r0, r0, #0. 
llvm-svn: 35627
 2007-04-03 21:31:21 +00:00
Nicolas Geoffray 23710a7da3 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray b3e99a18ee The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray ab559f6e3c Addition to the previous commit for getCalleeSavedRegClasses: 
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."

llvm-svn: 35623
 2007-04-03 10:57:49 +00:00
Nicolas Geoffray fbfc451ba9 The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
 2007-04-03 10:27:07 +00:00