Commit Graph

10276 Commits

Author SHA1 Message Date
Jim Grosbach a8683bb033 80 column and trailing whitespace cleanup
llvm-svn: 109037
2010-07-21 21:21:52 +00:00
Dan Gohman 093cb79d4b Disallow null as a named metadata operand.
Make MDNode::destroy private.
Fix the one thing that used MDNode::destroy, outside of MDNode itself.

One should never delete or destroy an MDNode explicitly. MDNodes
implicitly go away when there are no references to them (implementation
details aside).

llvm-svn: 109028
2010-07-21 18:54:18 +00:00
Lang Hames bdafcc633d Changed OStream templates to functions on raw_ostream, removed the unused "renderWarnings" function.
llvm-svn: 109003
2010-07-21 09:02:06 +00:00
Evan Cheng a77f3d3b37 Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
llvm-svn: 108991
2010-07-21 06:09:07 +00:00
Jakob Stoklund Olesen 0fef9dda8e Change the createSpiller interface to take a MachineFunctionPass argument.
The spillers can pluck the analyses they need from the pass reference.

Switch some never-null pointers to references.

llvm-svn: 108969
2010-07-20 23:50:15 +00:00
Jakob Stoklund Olesen ed4075cc3b Implement loop splitting analysis.
Determine which loop exit blocks need a 'pre-exit' block inserted.
Recognize when this would be impossible.

llvm-svn: 108941
2010-07-20 21:46:58 +00:00
Dale Johannesen 6e5ec6263e Fix test for switch statements and increase
threshold a bit per experimentation.

llvm-svn: 108935
2010-07-20 21:29:12 +00:00
Jakob Stoklund Olesen ff095507e3 Appease the colonials.
llvm-svn: 108845
2010-07-20 16:12:37 +00:00
Jakob Stoklund Olesen 36d12c679d Beginning SplitKit - utility classes for live range splitting.
This is a work in progress. So far we have some basic loop analysis to help
determine where it is useful to split a live range around a loop.

The actual loop splitting code from Splitter.cpp is also going to move in here.

llvm-svn: 108842
2010-07-20 15:41:07 +00:00
Lang Hames 31dfb75b52 Updated css classes for the pressure table legend.
llvm-svn: 108839
2010-07-20 14:35:55 +00:00
Lang Hames 2ff2193a80 Oops - I tables render poorly in Chrome without this explicit height specification.
llvm-svn: 108824
2010-07-20 10:29:46 +00:00
Lang Hames a475ab7f02 Use run-length encoding to represent identical adjacent cells in the pressure
and interval table. Reduces output HTML file sizes by ~80% in my test cases.

Also fix access of private member type by << operator.

llvm-svn: 108823
2010-07-20 10:18:54 +00:00
Lang Hames 716b184108 Added support for turning HTML indentation on and off (indentation off by default).
Reduces output file size ~20% on my test cases.

llvm-svn: 108822
2010-07-20 09:13:29 +00:00
Lang Hames a93fe2de3c Switched to rendering after allocation (but before rewriting) in PBQP.
Updated renderer to use allocation information from VirtRegMap (if
available) to render spilled intervals differently.

llvm-svn: 108815
2010-07-20 07:41:44 +00:00
Dale Johannesen 08645f1991 Don't hoist things out of a large switch inside a
loop, for the reasons in the comments.  This is a
major win on 253.perlbmk on ARM Darwin.  I expect it
to be a good heuristic in general, but it's possible
some things will regress; I'll be watching.
7940152.

llvm-svn: 108792
2010-07-20 00:50:13 +00:00
Stuart Hastings 61475c5c3c Correct line info for declarations/definitions. Radar 8063111.
llvm-svn: 108784
2010-07-19 23:56:30 +00:00
Devang Patel d61b735d25 Fix memory leak reported by valgrind.
Do not visit operands of old instruction. Visit all operands of new instruction.

llvm-svn: 108767
2010-07-19 23:25:39 +00:00
Dan Gohman b5e918dc05 After a custom inserter, in a block which has constant instructions,
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.

llvm-svn: 108765
2010-07-19 22:48:56 +00:00
Evan Cheng 10f99a3490 ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.
llvm-svn: 108761
2010-07-19 22:15:08 +00:00
Evan Cheng 7a135510e3 Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
This property will be used by the register pressure tracking instruction scheduler.

llvm-svn: 108735
2010-07-19 18:47:01 +00:00
Jakob Stoklund Olesen a58a7e7f9e Spillers may alter MachineLoopInfo when breaking critical edges, so make it
non-const.

llvm-svn: 108734
2010-07-19 18:41:20 +00:00
Devang Patel 18efced1a2 Fix PR 7662.
Do not try to insert local variable info to a DIE used for function declaration.

llvm-svn: 108731
2010-07-19 17:53:55 +00:00
Benjamin Kramer 58c283ee85 Update CMake build.
llvm-svn: 108700
2010-07-19 15:37:03 +00:00
Lang Hames 6624efb711 Render MachineFunctions to HTML pages, with options to render register
pressure estimates and liveness alongside.

Still experimental.

llvm-svn: 108698
2010-07-19 15:22:28 +00:00
Owen Anderson 9c271e2835 Remove r108639 now that it is handled by InstCombine instead.
llvm-svn: 108688
2010-07-19 08:10:24 +00:00
Daniel Dunbar 419197cc4d Target: Give the TargetAsmParser access to the TargetMachine.
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

llvm-svn: 108664
2010-07-19 00:33:49 +00:00
Daniel Dunbar 7f5bf5ae2a MC: Move several clients to using AsmParser constructor function.
llvm-svn: 108645
2010-07-18 18:31:33 +00:00
Douglas Gregor 8ff89f5c02 Fix struct/class mismatch
llvm-svn: 108642
2010-07-18 11:47:56 +00:00
Owen Anderson f7f9c8a2f7 Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions.
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.

This fixed <rdar://problem/8197504>.

llvm-svn: 108639
2010-07-18 08:47:54 +00:00
Lang Hames 1392b8eb79 Added -pbqp-pre-coalescing flag to PBQP. If enabled this will cause PBQP to require
LoopSplitter be run prior to register allocation.

Entirely for testing purposes at the moment.

llvm-svn: 108634
2010-07-18 00:57:59 +00:00
Bill Wendling ac67e99d53 Use isPrologLabel() instead of checking the opcode directly.
llvm-svn: 108628
2010-07-17 19:18:44 +00:00
Zhongxing Xu b653ce648d update CMakeLists.txt
llvm-svn: 108620
2010-07-17 12:12:42 +00:00
Lang Hames 5864012cc0 Removed unused inRange variable.
llvm-svn: 108618
2010-07-17 11:43:07 +00:00
Lang Hames 225977d4f9 LoopSplitter - intended to split live intervals over loop boundaries.
Still very much under development. Comments and fixes will be forthcoming.

(This commit includes some small tweaks to LiveIntervals & LoopInfo to support the splitter)

llvm-svn: 108615
2010-07-17 07:34:01 +00:00
Lang Hames 211e7ce7e7 Iterating over sets of pointers in a heuristic was a bad idea. Switching
any command line paramater changed the register allocation produced by
PBQP.

Turns out variety is not the spice of life.

Fixed some comparators, added others. All good now.

llvm-svn: 108613
2010-07-17 06:31:41 +00:00
Eric Christopher 0baaa9bcc1 Propagate alloca alignment information via variable size object frame
information.

No functional change yet.

llvm-svn: 108583
2010-07-17 00:28:22 +00:00
Bill Wendling bf8370ff36 Consider this function:
void foo() { __builtin_unreachable(); }

It will output the following on Darwin X86:

_func1:
Leh_func_begin0:
        pushq %rbp
Ltmp0:
        movq %rsp, %rbp
Ltmp1:
Leh_func_end0:

This prolog adds a new Call Frame Information (CFI) row to the FDE with an
address that is not within the address range of the code it describes -- part is
equal to the end of the function -- and therefore results in an invalid EH
frame. If we emit a nop in this situation, then the CFI row is now within the
address range.

llvm-svn: 108568
2010-07-16 22:51:10 +00:00
Bill Wendling 499f797cdd Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.

llvm-svn: 108563
2010-07-16 22:20:36 +00:00
Jakob Stoklund Olesen b15cbd343c Remove remaining calls to TII::isMoveInstr.
llvm-svn: 108556
2010-07-16 21:03:55 +00:00
Dan Gohman 1e936277c3 Revert r108369, sorting llvm.dbg.declare information by source position,
since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.

Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.

llvm-svn: 108538
2010-07-16 17:54:27 +00:00
Eli Friedman 17c5a23559 Get rid of a bunch of duplicated ELF enum values.
llvm-svn: 108520
2010-07-16 07:53:29 +00:00
Jakob Stoklund Olesen 37c42a3d02 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507
2010-07-16 04:45:42 +00:00
Dan Gohman 103c4ebea5 Use the source-order scheduler instead of the "fast" scheduler at -O0,
because it's more likely to keep debug line information in its original
order.

llvm-svn: 108496
2010-07-16 02:01:19 +00:00
Dale Johannesen bfd4fd7bb7 The SelectionDAGBuilder's handling of debug info, on rare
occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place.  7797940 (6/29/2010..7/15/2010).

llvm-svn: 108484
2010-07-16 00:02:08 +00:00
Bill Wendling 4bda1c8e68 Revert. This isn't the correct way to go.
llvm-svn: 108478
2010-07-15 23:42:21 +00:00
Bill Wendling 973dc3b1d8 Handle code gen for the unreachable instruction if it's the only instruction in
the function. We'll just turn it into a "trap" instruction instead.

The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:

$ cat t.ll
define void @foo() {
entry:
  unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
        .section        __TEXT,__text,regular,pure_instructions
        .globl  _foo
        .align  4, 0x90
_foo:                                   ## @foo
Leh_func_begin0:
## BB#0:                                ## %entry
        pushq   %rbp
Ltmp0:
        movq    %rsp, %rbp
Ltmp1:
Leh_func_end0:
...

The unwind tables then have bad data in them causing all sorts of problems.

Fixes <rdar://problem/8096481>.

llvm-svn: 108473
2010-07-15 23:32:40 +00:00
Evan Cheng 55f0c6b9fc Split -enable-finite-only-fp-math to two options:
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.

llvm-svn: 108465
2010-07-15 22:07:12 +00:00
Chris Lattner 60b131654b fix the definitions of ConstTextCoalSection/ConstDataCoalSection
to keep "Text" in sync with the "pure instructions" section attribute.
Lack of this attribute was preventing the assembler from emitting
multibyte noops instructions for templates (and inlines, and other
coalesced stuff) and was causing the assembler to mismatch .o files.

This fixes rdar://8018335

llvm-svn: 108461
2010-07-15 21:22:00 +00:00
Bill Wendling 2da75ef315 Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
llvm-svn: 108452
2010-07-15 20:04:36 +00:00
Bill Wendling dd5e9d8faf Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
llvm-svn: 108450
2010-07-15 20:01:02 +00:00