Commit Graph

76238 Commits

Author SHA1 Message Date
Colin LeMahieu 26a537c743 [Hexagon] Adding vector permutation instructions and tests.
llvm-svn: 227612
2015-01-30 21:14:00 +00:00
Reid Kleckner a580b6ec67 Win64: Put a REX_W prefix on all TAILJMP* instructions
MSDN's x64 software conventions page says that this is one of the fixed
list of legal epilogues:
https://msdn.microsoft.com/en-us/library/tawsa7cb.aspx

Presumably this is how the unwinder distinguishes epilogue jumps from
in-function control flow.

Also normalize the way we place "## TAILCALL" comments on such jumps.

llvm-svn: 227611
2015-01-30 21:03:31 +00:00
Colin LeMahieu 16f5e56703 [Hexagon] Adding vector multiplies. Cleaning up tests.
llvm-svn: 227609
2015-01-30 20:56:54 +00:00
Colin LeMahieu b84ec02296 [Hexagon] Adding XTYPE/COMPLEX instructions and cleaning up tests.
llvm-svn: 227607
2015-01-30 20:08:37 +00:00
Chad Rosier b23c4dd3a4 [AArch64] Make AArch64A57FPLoadBalancing output stable.
Add tie breaker to colorChainSet() sort so that processing order doesn't
depend on std::set order, which depends on pointer order, which is
unstable from run to run.

No test case as this is nearly impossible to reproduce.

Phabricator Review: http://reviews.llvm.org/D7265
Patch by Geoff Berry <gberry@codeaurora.org>!

llvm-svn: 227606
2015-01-30 19:55:40 +00:00
Adrian Prantl 133e102b8f Remove a redundant dyn_cast.
llvm-svn: 227605
2015-01-30 19:42:59 +00:00
Adrian Prantl 3e2659eb92 Inliner: Use replaceDbgDeclareForAlloca() instead of splicing the
instruction and generalize it to optionally dereference the variable.
Follow-up to r227544.

llvm-svn: 227604
2015-01-30 19:37:48 +00:00
Saleem Abdulrasool 70fe588c88 ARM: further correct .fpu directive handling
If the original FPU specification involved a restricted VFP unit (d16), ensure
that we reset the functionality when we encounter a new FPU type.  In
particular, if the user specified vfpv3-d16, but switched to a VFPv3 (which has
32 double precision registers), we would fail to reset the D16 feature, and
treat it as being equivalent to vfpv3-d16.

llvm-svn: 227603
2015-01-30 19:35:18 +00:00
Renato Golin a4b72399b2 Revert "Revert "Matching ARM change for r227481: DebugInfo: Teach Fast ISel to respect the debug location of comparisons in jumps.""
This reverts commit r227600, since that reverted the wrong comit. Sorry.

llvm-svn: 227601
2015-01-30 19:25:20 +00:00
Renato Golin 0c9b51c16b Revert "Matching ARM change for r227481: DebugInfo: Teach Fast ISel to respect the debug location of comparisons in jumps."
This reverts commit r227488 as it was failing ARM bots.

llvm-svn: 227600
2015-01-30 19:18:58 +00:00
Colin LeMahieu 21fbc94777 [Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files.
llvm-svn: 227598
2015-01-30 19:13:26 +00:00
Saleem Abdulrasool 07b7c03805 ARM: improve caret diagnostics for invalid FPU name
In the case of an invalid FPU name, place the caret at the name rather than FPU
directive.

llvm-svn: 227595
2015-01-30 18:42:10 +00:00
Filipe Cabecinhas fcd044b692 Check bit widths before trying to get a type.
Added a test case for it.
Also added run lines for the test case in r227566.

Bugs found with afl-fuzz

llvm-svn: 227589
2015-01-30 18:13:50 +00:00
Colin LeMahieu 709c0a16bb [Hexagon] Adding a number of vector load variants and organizing tests.
llvm-svn: 227588
2015-01-30 18:09:44 +00:00
Zachary Turner 82af9438d0 Move DebugInfo to DebugInfo/DWARF.
In preparation for adding PDB support to LLVM, this moves the
DWARF parsing code to its own subdirectory under DebugInfo, and
renames LLVMDebugInfo to LLVMDebugInfoDWARF.

This is purely a mechanical / build system change.

Differential Revision: http://reviews.llvm.org/D7269
Reviewed by: Eric Christopher

llvm-svn: 227586
2015-01-30 18:07:45 +00:00
Saleem Abdulrasool 206d1160ce ARM: correct handling of .fpu directive
The FPU directive permits the user to switch the target FPU, enabling
instructions that would be otherwise unavailable.  However, when configuring the
new subtarget features, we would not enable the implied functions for newer
FPUs.  This would result in invalid rejection of valid input.  Ensure that we
inherit the implied FPU functionality when enabling newer versions of the FPU.
Fortunately, these are mostly hierarchical, unlike the CPUs.

Addresses PR22395.

llvm-svn: 227584
2015-01-30 17:58:25 +00:00
Sanjay Patel e4ca47875f tidy up; NFC
llvm-svn: 227582
2015-01-30 16:58:58 +00:00
Chandler Carruth 1efa12d6d8 [PM] Sink the population of the pass manager with target-specific
analyses back into the LTO code generator.

The pass manager builder (and the transforms library in general)
shouldn't be referencing the target machine at all.

This makes the LTO population work like the others -- the data layout
and target transform info need to be pre-populated.

llvm-svn: 227576
2015-01-30 13:33:42 +00:00
Chandler Carruth 6b1aa9be6a Fix a warning introduced by r227557 due to a default label in a fully
covering switch.

llvm-svn: 227575
2015-01-30 13:30:43 +00:00
NAKAMURA Takumi 788550783a [Cygming] Seek also chkstk_ms, or JIT fails with DLL builds. It is fixup for r227519.
llvm-svn: 227574
2015-01-30 13:01:19 +00:00
Toma Tabacu 8f6603a2dc [mips] Manually replace JAL pseudo-instructions with their JALR equivalent, instead of using InstAlias.
Summary:
This is needed by the .cprestore assembler directive.

This directive needs to be able to insert an LW instruction after every JALR replacement of a JAL pseudo-instruction
(and never after a JALR which has NOT been a result of a pseudo-instruction replacement).

The problem with using InstAlias for these is that after it replaces the pseudo-instruction, we can't find out if the resulting JALR instruction
was generated by an InstAlias or not, so we don't know whether or not to insert our LW instruction.

By replacing it manually, we know when the pseudo-instruction replacement happens and we can insert the LW instruction correctly.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D5601

llvm-svn: 227568
2015-01-30 11:18:50 +00:00
Filipe Cabecinhas d0858e1037 [bitcode reader] Fix an assert on invalid type tables
Bug found with afl-fuzz

llvm-svn: 227566
2015-01-30 10:57:58 +00:00
Hao Liu 8de4f8b1b5 [LoopVectorize] Induction variables: support arbitrary constant step.
Previously, only -1 and +1 step values are supported for induction variables. This patch extends LV to support
arbitrary constant steps.
Initial patch by Alexey Volkov. Some bug fixes are added in the following version.

Differential Revision: http://reviews.llvm.org/D6051 and http://reviews.llvm.org/D7193

llvm-svn: 227557
2015-01-30 05:02:21 +00:00
Hao Liu e0335d77c3 [AArch64]Fix PR21675, a bug about lowering llvm.ctpop.i32. We should noot use "DAG.getUNDEF(MVT::v8i8)" to get all zero vector.
Patch by Wei-cheng Wang.

llvm-svn: 227550
2015-01-30 02:13:53 +00:00
Eric Christopher 38522b8867 Use the cached subtarget in PPCFrameLowering.
llvm-svn: 227548
2015-01-30 02:11:26 +00:00
Eric Christopher 85806141fd Migrate some of PPC away from the use of bare getSubtarget/getSubtargetImpl.
llvm-svn: 227547
2015-01-30 02:11:24 +00:00
Eric Christopher 065d16bcbe Migrage PPCRegisterInfo to use the cached subtarget.
llvm-svn: 227546
2015-01-30 02:11:21 +00:00
Adrian Prantl 4d365250ec Fix PR22386. The inliner moves static allocas to the entry basic block
so we need to move the dbg.declare intrinsics that describe them, too.

llvm-svn: 227544
2015-01-30 01:55:25 +00:00
Eric Christopher 3084aff498 Migrate a bare getSubtarget call to query the MachineFunction
for the target dependent one.

llvm-svn: 227542
2015-01-30 01:50:09 +00:00
Eric Christopher bef0a373b4 Migrate NVPTXISelLowering to take the subtarget that it's dependent
upon as an argument and store/use that in the entire function.

llvm-svn: 227541
2015-01-30 01:50:07 +00:00
Eric Christopher 9745b3aae0 Remove unused argument.
llvm-svn: 227539
2015-01-30 01:41:01 +00:00
Eric Christopher 147bba2385 Migrate NVPTXISelDAGToDAG's getSubtarget to a runOnMachineFunction
version. Update NVPTXInstrInfo accordingly.

llvm-svn: 227538
2015-01-30 01:40:59 +00:00
Eric Christopher 2a0bc68457 Remove calls to bare getSubtarget and clean up the functions
accordingly.

llvm-svn: 227535
2015-01-30 01:30:01 +00:00
Akira Hatanaka 8fba18e958 [LTO] Scan all per-function subtargets when collecting runtime library names.
accumulateAndSortLibcalls in LTOCodeGenerator.cpp collects names of runtime
library functions which are used to identify user-defined functions that should
be protected. Previously, this function would only scan the TargetLowering
object belonging to the "main" subtarget for the library function names. This
commit changes it to scan all per-function subtargets.

Differential Revision: http://reviews.llvm.org/D7275

llvm-svn: 227533
2015-01-30 01:16:24 +00:00
Eric Christopher 988ce75c07 Remove a few getSubtarget calls in AArch64 pass manager initialization.
llvm-svn: 227531
2015-01-30 01:10:26 +00:00
Eric Christopher 125898a2a1 Clean up some uses of getSubtarget in AArch64.
llvm-svn: 227530
2015-01-30 01:10:24 +00:00
Eric Christopher f761d901aa This only needs TargetInstrInfo, not the specialized one.
llvm-svn: 227529
2015-01-30 01:10:18 +00:00
Chris Bieneman 7b7d2779d1 iOS doesn't have crt_externs.h available, so we fall back to the posix method.
llvm-svn: 227521
2015-01-30 00:10:39 +00:00
Reid Kleckner e83ab8c2de x86: Remove unused variables not caught by MSVC =P
llvm-svn: 227520
2015-01-30 00:05:39 +00:00
Reid Kleckner ca9b9feb2c x86: Fix large model calls to __chkstk for dynamic allocas
In the large code model, we now put __chkstk in %r11 before calling it.

Refactor the code so that we only do this once. Simplify things by using
__chkstk_ms instead of __chkstk on cygming. We already use that symbol
in the prolog emission, and it simplifies our logic.

Second half of PR18582.

llvm-svn: 227519
2015-01-29 23:58:04 +00:00
Eric Christopher fbd9fbabab Remove unnecessary calls to getSubtarget/getSubtargetImpl from the
MSP430 backend.

llvm-svn: 227517
2015-01-29 23:46:42 +00:00
Eric Christopher fb9a7c8b67 Remove unused header.
llvm-svn: 227516
2015-01-29 23:46:39 +00:00
Sanjay Patel 3a907eaccd Change SmallVector param to the more general ArrayRef; NFCI
llvm-svn: 227514
2015-01-29 23:35:04 +00:00
Eric Christopher d86af63a46 Get rid of a few calls through the subtarget to get the ABI
that's actually sitting on the target machine.

llvm-svn: 227513
2015-01-29 23:27:45 +00:00
Eric Christopher 96e72c6ab1 Remove most of the TargetMachine::getSubtarget/getSubtargetImpl
calls that don't take a Function argument from Mips. Notable
exceptions: the AsmPrinter and MipsTargetObjectFile. The
latter needs to be fixed, and the former will be fixed when the
general AsmPrinter changes happen.

llvm-svn: 227512
2015-01-29 23:27:36 +00:00
Reid Kleckner f0abdae34e x86: Remove the W64ALLOCA pseudo
This is just an alias for CALL64pcrel32, and we can just use that opcode
with explicit defs in the MI.

No functionality change.

llvm-svn: 227508
2015-01-29 23:09:37 +00:00
Kostya Serebryany 2c1b33b897 [fuzzer] add -use_full_coverage_set=1 which solves FullCoverageSetTest. This does not scale very well yet, but might be a good start.
llvm-svn: 227507
2015-01-29 23:01:07 +00:00
Chad Rosier 11d943d32c [AArch64] Add INITIALIZE_PASS macros to AArch64A57FPLoadBalancing.
These are needed so this pass will produce output when
e.g. -print-after-all is used.

Phabricator Review: http://reviews.llvm.org/D7264
Patch by Geoff Berry <gberry@codeaurora.org>!

llvm-svn: 227506
2015-01-29 22:57:37 +00:00
Reid Kleckner dafc2ae1ad Update comments to use unreachable instead of llvm.trap, as implemented now
win64: Call __chkstk through a register with the large code model

Fixes half of PR18582. True dynamic allocas will still have a
CALL64pcrel32 which will fail.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D7267

llvm-svn: 227503
2015-01-29 22:33:00 +00:00
Reid Kleckner 2a2235087f Update comments to use unreachable instead of llvm.trap, as implemented now
llvm-svn: 227502
2015-01-29 22:32:26 +00:00