Commit Graph

2019 Commits

Author SHA1 Message Date
Dan Gohman 47a7d6fafe Factor the addressing mode and the load/store VT out of LoadSDNode
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.

llvm-svn: 46538
2008-01-30 00:15:11 +00:00
Bill Wendling 1a17ef02c8 If there's no instructions being emitted on X86 for a function, emit a
nop. Emit the nop directly for PPC.

llvm-svn: 46398
2008-01-26 09:03:52 +00:00
Bill Wendling 5079483957 If there are no machine instructions emitted for a function, then insert
a "nop" instruction so that we don't have the function's label associated
with something that it's not supposed to be associated with.

llvm-svn: 46394
2008-01-26 06:51:24 +00:00
Chris Lattner 919ad97c01 JITEmitter.cpp was trying to sync the icache for function stubs, but
was actually passing a completely incorrect size to sys_icache_invalidate.
Instead of having the JITEmitter do this (which doesn't have the correct 
size), just make the target sync its own stubs.

llvm-svn: 46354
2008-01-25 16:41:09 +00:00
Duncan Sands 95d46ef887 The last pieces needed for loading arbitrary
precision integers.  This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on.  While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.

llvm-svn: 46280
2008-01-23 20:39:46 +00:00
Dale Johannesen 7f1ff5fedd Honor explicit section information on Darwin.
llvm-svn: 46267
2008-01-23 00:58:14 +00:00
Dale Johannesen 5c94cb3596 Implement flt_rounds for PowerPC.
llvm-svn: 46174
2008-01-18 19:55:37 +00:00
Chris Lattner 87757d38b3 get symbolic information for ppc ldbl nodes.
llvm-svn: 46165
2008-01-18 18:51:16 +00:00
Chris Lattner f5b46f7dad Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:
_test:
	fctiwz f0, f1
	stfiwx f0, 0, r4
	blr 

instead of:

_test:
	fctiwz f0, f1
	stfd f0, -8(r1)
	nop
	nop
	lwz r2, -4(r1)
	stb r2, 0(r4)
	blr 

The former is not correct (stores 4 bytes, not 1).

llvm-svn: 46161
2008-01-18 16:54:56 +00:00
Dale Johannesen 60a9855799 Revert the part of 45848 that treated weak globals
as weak globals rather than commons.  While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.

llvm-svn: 46144
2008-01-17 23:04:07 +00:00
Chris Lattner 1ea55cf816 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret

llvm-svn: 46140
2008-01-17 19:59:44 +00:00
Chris Lattner 72733e573b * Introduce a new SelectionDAG::getIntPtrConstant method
and switch various codegen pieces and the X86 backend over
  to using it.

* Add some comments to SelectionDAGNodes.h

* Introduce a second argument to FP_ROUND, which indicates
  whether the FP_ROUND changes the value of its input. If
  not it is safe to xform things like fp_extend(fp_round(x)) -> x.

llvm-svn: 46125
2008-01-17 07:00:52 +00:00
Dale Johannesen 59a2250b0d Fix and enable EH for x86-64 Darwin. Adds
ShortenEHDataFor64Bits as a not-very-accurate
abstraction to cover all the changes in DwarfWriter.
Some cosmetic changes to Darwin assembly code for
gcc testsuite compatibility.

llvm-svn: 46029
2008-01-15 23:24:56 +00:00
Chris Lattner 8e07533f20 If someone wants to implement ppc TRAP, they can go for it :)
llvm-svn: 46019
2008-01-15 22:15:02 +00:00
Chris Lattner 9a249b0ce5 rename SDTRet -> SDTNone.
Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.

llvm-svn: 46017
2008-01-15 22:02:54 +00:00
Chris Lattner 596875118c rename MachineInstr::setInstrDescriptor -> setDesc
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
Dale Johannesen 2ff66f08f2 Weak things initialized to 0 don't go in bss on Darwin.
Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).

llvm-svn: 45848
2008-01-11 00:54:37 +00:00
Duncan Sands 53c954fa86 Output sinl for a long double FSIN node, not sin.
Likewise fix up a bunch of other libcalls.  While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere.  This fixes 9 Ada ACATS failures.

llvm-svn: 45833
2008-01-10 10:28:30 +00:00
Chris Lattner aca7ca3730 remove explicit sets of 'neverHasSideEffects' that can now be
inferred from the instr patterns.

llvm-svn: 45824
2008-01-10 05:45:39 +00:00
Chris Lattner 94de7bc3aa get def use info more correct.
llvm-svn: 45821
2008-01-10 05:12:37 +00:00
Dale Johannesen 7ecb3b79c7 Emit unused EH frames for weak definitions on Darwin,
because assembler/linker can't cope with weak absolutes.
PR 1880.

llvm-svn: 45811
2008-01-10 02:03:30 +00:00
Duncan Sands bb956ca730 Use size_t to store Pos, avoid truncating value
on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746
2008-01-08 10:06:15 +00:00
Chris Lattner 89f36e6b21 Finally implement correct ordered comparisons for PPC, even though
the code generated is not wonderful.  This turns a miscompilation into
a code quality bug (noted in the ppc readme).  This fixes PR642, which
is over 2 years old (!).  Nate, please review this.

llvm-svn: 45742
2008-01-08 06:46:30 +00:00
Chris Lattner 03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner d004f54155 use predicate.
llvm-svn: 45691
2008-01-07 06:37:29 +00:00
Chris Lattner 6077962101 no need to explicitly clear these fields.
llvm-svn: 45683
2008-01-07 04:55:09 +00:00
Chris Lattner b0d06b4381 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
Chris Lattner f0f438a517 remove MachineOpCode typedef.
llvm-svn: 45679
2008-01-07 02:48:55 +00:00
Chris Lattner a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Owen Anderson 2a3be7bb6c Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...

llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Chris Lattner a4ce4f6987 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
llvm-svn: 45667
2008-01-06 23:38:27 +00:00
Chris Lattner 10324d0175 rename isStore -> mayStore to more accurately reflect what it captures.
llvm-svn: 45656
2008-01-06 08:36:04 +00:00
Chris Lattner a348f55ec6 Change the 'isStore' inferrer to look for 'SDNPMayStore'
instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654
2008-01-06 06:44:58 +00:00
Chris Lattner e20f380fbf remove some isStore flags that are now inferred automatically.
llvm-svn: 45652
2008-01-06 05:53:26 +00:00
Evan Cheng 2e1ba07f16 Correct order of parameters.
llvm-svn: 45562
2008-01-04 02:22:21 +00:00
Evan Cheng 563fcc3428 Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used
for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode).

llvm-svn: 45527
2008-01-03 02:56:28 +00:00
Chris Lattner dcbc0f3029 leopard and above support alignment for common symbols.
llvm-svn: 45493
2008-01-02 19:35:16 +00:00
Owen Anderson eee14601b1 Move some more instruction creation methods from RegisterInfo into InstrInfo.
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner b0fb17fd34 Fix a bug in my previous patch: refer to the impl not the pure virtual version. It's unclear why gcc would ever compile this...
llvm-svn: 45476
2008-01-01 01:05:34 +00:00
Chris Lattner 25568e4cef Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
2008-01-01 01:03:04 +00:00
Owen Anderson 7a73ae9a86 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner a5bb370aa4 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner 6005589faf More cleanups for MachineOperand:
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
2007-12-30 21:56:09 +00:00
Chris Lattner 5c4637816e Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Chris Lattner a087a8d2ce remove attribution from lib Makefiles.
llvm-svn: 45415
2007-12-29 20:09:26 +00:00
Nicolas Geoffray 31a2c3948e Fix unintented change from last commit
llvm-svn: 45282
2007-12-21 12:22:29 +00:00
Nicolas Geoffray 80c741e160 Enable EH for linux/ppc32 targets
llvm-svn: 45281
2007-12-21 12:19:44 +00:00
Dale Johannesen eadbf4b91c Enable EH on PPC Darwin. This basically works; there
are a couple of issues that show up with the optimizer,
but I don't think they're really EH problems.
(llvm-gcc testsuite users note:  By default the testsuite
uses the unwinding code that's built as part of your local
llvm-gcc, which does not work.  You need to trick it into
using the installed system unwinding code to get useful
results.)

llvm-svn: 45221
2007-12-19 21:54:36 +00:00
Bill Wendling ca77ecb40a Mark the "isRemat" instruction as never having side effects.
llvm-svn: 45190
2007-12-19 06:07:48 +00:00
Evan Cheng 6e68381e02 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
Chris Lattner f47015bc74 Fix a significant code quality regression I introduced on PPC64 quite
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701
2007-12-08 07:04:58 +00:00
Chris Lattner f6a8156e4f implement __builtin_return_addr(0) on ppc.
llvm-svn: 44700
2007-12-08 06:59:59 +00:00
Chris Lattner a6c8297e84 refactor some code to avoid overloading the name 'usesLR' in
different places to mean different things.  Document what the
one in PPCFunctionInfo means and when it is valid.

llvm-svn: 44699
2007-12-08 06:39:11 +00:00
Evan Cheng ab87e735cd Fix a compilation warning.
llvm-svn: 44691
2007-12-08 01:00:21 +00:00
Bill Wendling fb706bc52b Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
2007-12-07 21:42:31 +00:00
Evan Cheng 3b8a674469 Added canFoldMemoryOperand for PPC.
llvm-svn: 44623
2007-12-05 18:41:29 +00:00
Evan Cheng bb26301864 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.

llvm-svn: 44600
2007-12-05 03:14:33 +00:00
Evan Cheng f45a1d623c Remove redundant foldMemoryOperand variants and other code clean up.
llvm-svn: 44517
2007-12-02 08:30:39 +00:00
Evan Cheng 69fda0a716 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
llvm-svn: 44479
2007-12-01 02:07:52 +00:00
Chris Lattner 57ee7c6630 Implement ExpandOperationResult for ppc i64 fp->int, which fixes
CodeGen/Generic/fp_to_int.ll among others.  Its unclear why this 
just started failing...

llvm-svn: 44407
2007-11-28 18:44:47 +00:00
Chris Lattner 79ae9895f6 Fix a crash on invalid code due to memcpy lowering.
llvm-svn: 44378
2007-11-27 22:14:42 +00:00
Dale Johannesen 763e110a9f Fix .eh table linkage issues on Darwin. Some EH support
for Darwin PPC, but it's not fully working yet.

llvm-svn: 44258
2007-11-20 23:24:42 +00:00
Dan Gohman aad83c8ee5 Remove meaningless qualifiers from return types, avoiding compiler warnings.
llvm-svn: 44240
2007-11-19 20:46:23 +00:00
Dale Johannesen 7904708369 Revert previous; these files aren't ready to go in yet.
llvm-svn: 44057
2007-11-13 19:16:02 +00:00
Dale Johannesen 7a7085f6d3 Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056
2007-11-13 19:13:01 +00:00
Bill Wendling 77b13af9a6 Unifacalize the CALLSEQ{START,END} stuff.
llvm-svn: 44045
2007-11-13 09:19:02 +00:00
Bill Wendling f359fed9f9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
2007-11-13 00:44:25 +00:00
Anton Korobeynikov bfb139ec93 Completely forgot, that we have some debug information emission on PPC. This should fix
some regressions on ppc nightly tests.

llvm-svn: 44029
2007-11-12 23:36:13 +00:00
Owen Anderson 933b5b7e62 Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked.

llvm-svn: 44012
2007-11-12 07:39:39 +00:00
Anton Korobeynikov 4edfea438a Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997
2007-11-11 19:50:10 +00:00
Duncan Sands 283207a71c Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688
2007-11-05 00:04:43 +00:00
Nick Lewycky d954dcd138 Fix crash before main on ppc/linux with static constructors. PR1771
llvm-svn: 43676
2007-11-04 17:32:10 +00:00
Dale Johannesen 10f4152471 Disable a couple more things for ppcf128.
llvm-svn: 43267
2007-10-23 23:20:14 +00:00
Evan Cheng ec271b104c Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64.
llvm-svn: 43248
2007-10-23 06:42:42 +00:00
Evan Cheng bdbed66333 Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64.
llvm-svn: 43228
2007-10-22 19:46:19 +00:00
Chris Lattner b193576bc6 comment fixes
llvm-svn: 43168
2007-10-19 04:08:28 +00:00
Dale Johannesen 10432e5a67 More ppcf128 issues (maybe the last)?
llvm-svn: 43160
2007-10-19 00:59:18 +00:00
Evan Cheng 463e2ab0ac - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.

llvm-svn: 43153
2007-10-18 22:40:57 +00:00
Evan Cheng aa9a225699 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
llvm-svn: 43150
2007-10-18 21:29:24 +00:00
Chris Lattner 1366653e2f Fix a bug handling frame references in ppc inline asm when the frame offset
doesn't fit into 16 bits.

llvm-svn: 43032
2007-10-16 18:00:18 +00:00
Chris Lattner 06a4954e6e Change LowerFP_TO_SINT to create the specific code it needs instead of
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.

llvm-svn: 43005
2007-10-15 20:14:52 +00:00
Evan Cheng cdf3609130 Revert 42908 for now.
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
Dale Johannesen 2f6b6d6fb0 Fix type mismatch error in PPC Altivec (only causes
a problem when asserts are on).  From vecLib.

llvm-svn: 42959
2007-10-14 01:58:32 +00:00
Dan Gohman dc35bd79ca Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908
2007-10-12 14:53:36 +00:00
Dan Gohman 9013eaff9a Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.
llvm-svn: 42904
2007-10-12 14:08:57 +00:00
Dan Gohman 482732af9d Set ISD::FPOW to Expand.
llvm-svn: 42881
2007-10-11 23:21:31 +00:00
Dale Johannesen 666323eacd Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822
2007-10-10 01:01:31 +00:00
Dan Gohman 71f0d7d76e When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in
target-indepenent lowering, don't use them on PowerPC.

llvm-svn: 42755
2007-10-08 17:28:24 +00:00
Dale Johannesen f864ac96d8 Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.

llvm-svn: 42672
2007-10-06 01:24:11 +00:00
Dale Johannesen c0154c06d6 First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
2007-10-05 20:04:43 +00:00
Evan Cheng f4cf5dcdd2 - Added a few target hooks to generate load / store instructions from / to any
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.

llvm-svn: 42621
2007-10-05 01:32:41 +00:00
Dan Gohman c731c97fac Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().

llvm-svn: 42585
2007-10-03 19:26:29 +00:00
Dan Gohman a1d46c7d0a TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.

llvm-svn: 42419
2007-09-27 23:12:31 +00:00
Evan Cheng c1e4e3743b Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!

llvm-svn: 42346
2007-09-26 06:25:56 +00:00
Dan Gohman 57211c5550 More explicit keywords.
llvm-svn: 42316
2007-09-25 20:27:06 +00:00
Evan Cheng 1ff71872c2 Honor user-defined section specification of a global, ignores whether its initializer is null.
llvm-svn: 42182
2007-09-21 00:41:19 +00:00
Devang Patel d29f938335 Do not override user specified section.
llvm-svn: 42179
2007-09-20 23:07:37 +00:00
Dan Gohman 9da02f5ee2 Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
2007-09-14 20:33:02 +00:00