Commit Graph

119510 Commits

Author SHA1 Message Date
Rafael Espindola 836f2e86e5 Report errors an invalid virtual addresses.
llvm-svn: 242676
2015-07-20 14:45:03 +00:00
Rafael Espindola 01b421b63a Remove unnecessary code.
We were locating the dynamic string table via both the section and segment
headers.

llvm-svn: 242674
2015-07-20 14:29:00 +00:00
Tom Stellard 70580f83cc AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
Summary:
The MUBUF addr64 bit has been removed on VI, so we must use FLAT
instructions when the pointer is stored in VGPRs.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11067

llvm-svn: 242673
2015-07-20 14:28:41 +00:00
Rafael Espindola e5a2cfcd84 Simplify the search for which segment has a virtual address. NFC.
llvm-svn: 242672
2015-07-20 14:15:38 +00:00
Rafael Espindola 073624bb56 Simplify iterating over program headers and detect corrupt ones.
We now use a simple pointer and have range loops.

llvm-svn: 242669
2015-07-20 13:35:33 +00:00
Vasileios Kalintiris 974d409259 [mips] Added support for the ERETNC instruction.
Summary: This required adding the instruction predicate HasMips32r5.

Patch by Scott Egerton.

Reviewers: dsanders, vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11136

llvm-svn: 242666
2015-07-20 12:28:56 +00:00
Rafael Espindola 00ddb1416d llvm-readobj: Handle invalid references to the string table.
llvm-svn: 242658
2015-07-20 03:38:17 +00:00
Rafael Espindola c46ffb7a49 Move CHECKs closer to the RUN line.
llvm-svn: 242657
2015-07-20 03:31:25 +00:00
Rafael Espindola fb3acd6216 llvm-readobj: call exit(1) on error.
llvm-readobj exists for testing llvm. We can safely stop the program
the first time we know the input in corrupted.

This is in preparation for making it handle a few more broken files.

llvm-svn: 242656
2015-07-20 03:23:55 +00:00
Rafael Espindola 724d4b43f4 Refactor duplicated code. NFC.
llvm-svn: 242655
2015-07-20 03:01:49 +00:00
Arnold Schwaighofer 764d6de823 Revert "MergeFuncs: Transfer the function parameter attributes to the call site"
It is okay to not transfer parameter attributes.

This reverts commit r242558.

llvm-svn: 242646
2015-07-19 19:30:43 +00:00
Simon Pilgrim 23a29dafda [X86][SSE] Tidied up vector CTLZ/CTTZ. NFCI.
llvm-svn: 242645
2015-07-19 17:09:43 +00:00
Yaron Keren c66c06b899 Narrow Callee scope, suggestion from David Blaikie.
llvm-svn: 242644
2015-07-19 15:48:07 +00:00
Simon Pilgrim e2c244f3b4 [X86][SSE] Reordered cast vectorization costs. NFCI.
Reordered the data tables at the top and placed the lookups after. The first stage in the yak shaving necessary to get more accurate costs for a variety of targets given the recent improvements to SINT_TO_FP/UINT_TO_FP/SIGN_EXTEND vector lowering.

llvm-svn: 242643
2015-07-19 15:36:12 +00:00
Yaron Keren 611f614ee1 De-duplicate CS.getCalledFunction() expression.
Not sure if the optimizer will save the call as getCalledFunction()
is not a trivial access function but the code is clearer this way.

llvm-svn: 242641
2015-07-19 11:52:02 +00:00
Simon Pilgrim 4ef0576c40 [DAGCombiner] Fixed minor typo that was missed in D9097.
We don't bitcast the UNDEFs - that is done in visitVECTOR_SHUFFLE, and the getValueType should come from the operand's SDValue not the SDNode.

llvm-svn: 242640
2015-07-19 11:31:40 +00:00
Michael Kuperstein 69e40a4c85 [X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly
Differential Revision: http://reviews.llvm.org/D11257
Patch by: marina.yatsina@intel.com

llvm-svn: 242639
2015-07-19 11:03:08 +00:00
Simon Pilgrim ba51d116c4 Remove TargetInstrInfo::canFoldMemoryOperand
canFoldMemoryOperand is not actually used anywhere in the codebase - all existing users instead call foldMemoryOperand directly when they wish to fold and can correctly deduce what they need from the return value. 

This patch removes the canFoldMemoryOperand base function and the target implementations; only x86 had a real (bit-rotted) implementation, although AMDGPU had a preparatory stub that had never needed to be completed.

Differential Revision: http://reviews.llvm.org/D11331

llvm-svn: 242638
2015-07-19 10:50:53 +00:00
Elena Demikhovsky 17b906058e AVX-512: Floating point conversions for SKX - DAG Lowering.
SKX supports conversion for all FP types. Integer types include doublewords and quardwords.
I added "Legal" status for these nodes and a bunch of tests.
I added "NoVLX" for AVX DAG selection to force VLX instructions selection when VLX is supported.

Differential Revision: http://reviews.llvm.org/D11255

llvm-svn: 242637
2015-07-19 10:17:33 +00:00
Simon Pilgrim 3aca32ea4a Use SDValue bool check. NFCI.
llvm-svn: 242636
2015-07-19 09:56:36 +00:00
Eric Fiselier 6aa873b392 [LIT] Allow for executeCommand to take the stdin input.
Summary: This patch allows executeCommand to pass a string to the processes stdin.

Reviewers: ddunbar, jroelofs

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11332

llvm-svn: 242631
2015-07-19 00:28:14 +00:00
Simon Pilgrim 59764dccfb [X86][SSE] Updated SHL/LSHR i64 vectorization costs.
This was missed in D8416.

llvm-svn: 242621
2015-07-18 20:06:30 +00:00
Benjamin Kramer c9436ad659 [AggressiveAntiDepBreaker] Use range loops for multimap access.
No functionality change intended.

llvm-svn: 242620
2015-07-18 20:05:10 +00:00
Yaron Keren 3d49f6df94 Rangify for loops in GlobalDCE, NFC.
llvm-svn: 242619
2015-07-18 19:57:34 +00:00
Benjamin Kramer 9a5d788948 [Hexagon] Use composition instead of inheritance from STL types
The standard containers are not designed to be inherited from, as
illustrated by the MSVC hacks for NodeOrdering. No functional change
intended.

llvm-svn: 242616
2015-07-18 17:43:23 +00:00
Simon Pilgrim 8c81678dfa [X86][SSE] Added additional fp/int tests.
Demonstrates some shortfalls in subvector(cvt(x)) compared to cvt(subvector(x)) patterns - especially on AVX/AVX2 targets.

llvm-svn: 242614
2015-07-18 17:05:39 +00:00
Simon Pilgrim c77f72c4e4 Refreshed tests.
llvm-svn: 242613
2015-07-18 16:53:51 +00:00
Simon Pilgrim 036db52673 Refreshed tests and reordered in descending integer size.
llvm-svn: 242610
2015-07-18 16:14:56 +00:00
Simon Pilgrim 27e130f11c Tidyup shufflevector calls - don't repeat inputs if you can avoid it.
llvm-svn: 242609
2015-07-18 15:56:33 +00:00
Chandler Carruth 9f2bf1aff5 [PM/AA] Remove the addEscapingUse update API that won't be easy to
directly model in the new PM.

This also was an incredibly brittle and expensive update API that was
never fully utilized by all the passes that claimed to preserve AA, nor
could it reasonably have been extended to all of them. Any number of
places add uses of values. If we ever wanted to reliably instrument
this, we would want a callback hook much like we have with ValueHandles,
but doing this for every use addition seems *extremely* expensive in
terms of compile time.

The only user of this update mechanism is GlobalsModRef. The idea of
using this to keep it up to date doesn't really work anyways as its
analysis requires a symmetric analysis of two different memory
locations. It would be very hard to make updates be sufficiently
rigorous to *guarantee* symmetric analysis in this way, and it pretty
certainly isn't true today.

However, folks have been using GMR with this update for a long time and
seem to not be hitting the issues. The reported issue that the update
hook fixes isn't even a problem any more as other changes to
GetUnderlyingObject worked around it, and that issue stemmed from *many*
years ago. As a consequence, a prior patch provided a flag to control
the unsafe behavior of GMR, and this patch removes the update mechanism
that has questionable compile-time tradeoffs and is causing problems
with moving to the new pass manager. Note the lack of test updates --
not one test in tree actually requires this update, even for a contrived
case.

All of this was extensively discussed on the dev list, this patch will
just enact what that discussion decides on. I'm sending it for review in
part to show what I'm planning, and in part to show the *amazing* amount
of work this avoids. Every call to the AA here is something like three
to six indirect function calls, which in the non-LTO pipeline never do
any work! =[

Differential Revision: http://reviews.llvm.org/D11214

llvm-svn: 242605
2015-07-18 03:26:46 +00:00
Kostya Serebryany 86e4a3e0a3 [libFuzzer] require the files and directories passed to the fuzzer to exist
llvm-svn: 242596
2015-07-18 00:03:37 +00:00
Evgeniy Stepanov 9cb08f823f [asan] Fix shadow mapping on Android/AArch64.
Instrumentation and the runtime library were in disagreement about
ASan shadow offset on Android/AArch64.

This fixes a large number of existing tests on Android/AArch64.

llvm-svn: 242595
2015-07-17 23:51:18 +00:00
Matthias Braun 9e85980658 ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
Reapply r242500 now that the swift schedmodel includes LDRLIT.

This is mostly done to disable the PostRAScheduler which optimizes for
instruction latencies which isn't a good fit for out-of-order
architectures. This also allows to leave out the itinerary table in
swift in favor of the SchedModel ones.

This change leads to performance improvements/regressions by as much as
10% in some benchmarks, in fact we loose 0.4% performance over the
llvm-testsuite for reasons that appear to be unknown or out of the
compilers control. rdar://20803802 documents the investigation of
these effects.

While it is probably a good idea to perform the same switch for the
other ARM out-of-order CPUs, I limited this change to swift as I cannot
perform the benchmark verification on the other CPUs.

Differential Revision: http://reviews.llvm.org/D10513

llvm-svn: 242588
2015-07-17 23:18:30 +00:00
Matthias Braun 141d1c9d8f ARM: Add scheduling information for LDRLIT instructions to swift scheduling model
These pseudo instructions are only lowered after register allocation and
are therefore still present when the machine scheduler runs.
Add a run: line to a testcase that uses the uncommon flags necessary to
actually produce a LDRLIT instruction on swift.

llvm-svn: 242587
2015-07-17 23:18:26 +00:00
Quentin Colombet 11922946fe [RAGreedy] Add an experimental deferred spilling feature.
The idea of deferred spilling is to delay the insertion of spill code until the
very end of the allocation. A "candidate" to spill variable might not required
to be spilled because of other evictions that happened after this decision was
taken. The spirit is similar to the optimistic coloring strategy implemented in
Preston and Briggs graph coloring algorithm.

For now, this feature is highly experimental. Although correct, it would require
much more modification to properly model the effect of spilling.

Anyway, this early patch helps prototyping this feature.

Note: The test case cannot unfortunately be reduced and is probably fragile.
llvm-svn: 242585
2015-07-17 23:04:06 +00:00
Alex Lorenz 484903ecd2 MIR Parser: Allow the dollar characters in all of the identifier tokens.
This commit modifies the machine instruction lexer so that it now accepts the
'$' characters in identifier tokens.

This change makes the syntax for unquoted global value tokens consistent with
the syntax for the global idenfitier tokens in the LLVM's assembly language.

llvm-svn: 242584
2015-07-17 22:48:04 +00:00
Alex Lorenz d225595dcf AsmParser: Add a function to parse a standalone constant value.
This commit extends the interface provided by the AsmParser library by adding a
function that allows the user to parse a standalone contant value.

This change is useful for MIR serialization, as it will allow the MIR Parser to
parse the constant values in a machine constant pool.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10280

llvm-svn: 242579
2015-07-17 22:07:03 +00:00
Kuba Brecka 7f54753180 [asan] Add a comment explaining why non-instrumented allocas are moved.
Addition to r242510.

llvm-svn: 242561
2015-07-17 19:20:21 +00:00
Arnold Schwaighofer 690cd87dcd MergeFuncs: Transfer the function parameter attributes to the call site
rdar://21516488

llvm-svn: 242558
2015-07-17 18:59:08 +00:00
Rafael Espindola 3116f6eb86 Start adding documentation for llvm-lib.
llvm-svn: 242557
2015-07-17 18:49:26 +00:00
Adam Nemet 5a6d5bc17b Revert "ARM: Enable MachineScheduler and disable PostRAScheduler for swift."
This reverts commit r242500.

It broke some internal tests and Matthias asked me to revert it while he
is investigating.

llvm-svn: 242553
2015-07-17 18:14:19 +00:00
Matthias Braun 244a6773c7 Use llvm_unreachable() instead of report_fatal_error() if the machine model is incomplete
This error is for developers only so it makes sense to abort and get a
backtrace.

llvm-svn: 242551
2015-07-17 17:50:11 +00:00
Peter Zotov f1192cd7e4 [OCaml] Do not use -warn-error in tests.
This -warn-error flag invariably gets into release tarballs
and breaks builds on distributions that run tests as a part
of release process. The OCaml binding tests are especially
critical, since they often expose lingering toolchain bugs,
and so it is replaced with -w +A (equivalent to -Wall).

llvm-svn: 242550
2015-07-17 17:33:23 +00:00
James Molloy a6702e2f14 [ARM] Use [SU]ABSDIFF nodes instead of intrinsics for VABD/VABA
No functional change, but it preps codegen for the future when SABSDIFF
will start getting generated in anger.

llvm-svn: 242546
2015-07-17 17:10:55 +00:00
James Molloy faf4e3c33b [AArch64] Use [SU]ABSDIFF nodes instead of intrinsics for ABD/ABA
No functional change, but it preps codegen for the future when SABSDIFF
will start getting generated in anger.

llvm-svn: 242545
2015-07-17 17:10:45 +00:00
Hans Wennborg cfb85e0c0c Add libunwind to the release scripts
llvm-svn: 242543
2015-07-17 16:49:59 +00:00
Eli Bendersky b09cfb51ca Use inbounds GEPs for memcpy and memset lowering
Follow-up on discussion in http://reviews.llvm.org/D11220

llvm-svn: 242542
2015-07-17 16:42:33 +00:00
Rafael Espindola 2bec8500ef Add support for producing thin archives in llvm-lib.
I will send an entry in docs/CommandGuide for review today.

llvm-svn: 242533
2015-07-17 16:01:11 +00:00
Alexandros Lamprineas 69718d242a Edited the CPUNames table of TargetParser
- Changed the default FPU of cortex-m4.
- Removed "cortex-m4f" entry. Currently not supported.

Change-Id: I73121e358aa9e7ba68eb001c2143df390ff2352a
Phabricator: http://reviews.llvm.org/D11100
llvm-svn: 242528
2015-07-17 15:49:32 +00:00
John Brawn 9ca9ca2805 Make global aliases have symbol size equal to their type
This is mainly for the benefit of GlobalMerge, so that an alias into a
MergedGlobals variable has the same size as the original non-merged
variable.

Differential Revision: http://reviews.llvm.org/D10837

llvm-svn: 242520
2015-07-17 12:12:03 +00:00