Commit Graph

118644 Commits

Author SHA1 Message Date
Artur Pilipenko 0e21d54b51 Take alignment into account in isSafeToLoadUnconditionally
Reviewed By: hfinkel

Differential Revision: http://reviews.llvm.org/D10475

llvm-svn: 240636
2015-06-25 12:18:43 +00:00
Ulrich Weigand 77884bcb5d [SystemZ] Only attempt RxSBG optimization for integer types
As pointed out by Justin Bogner (see r240520), SystemZDAGToDAGISel::Select
currently attempts to convert boolean operations into RxSBG even on some
non-integer types (in particular, vector types).  This would not work in
any case, and it happened to trigger undefined behaviour in allOnes.

This patch verifies that we have a (<= 64-bit) integer type before
attempting to perform this optimization.

llvm-svn: 240634
2015-06-25 11:52:36 +00:00
Toma Tabacu 3c49958945 [mips] [IAS] Refactor the emitDirectiveModuleOddSPReg() functions. NFC.
Summary:
We can simplify emitDirectiveModuleOddSPReg() by having it print the current OddSPReg information
from MipsABIFlagsSection and doing an updateABIInfo() before such calls.

This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object,
and also makes sure we use the update mechanism from MipsABIFlagsSection.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, mpf

Differential Revision: http://reviews.llvm.org/D10641

llvm-svn: 240630
2015-06-25 10:56:57 +00:00
Pawel Bylica 0dda164644 Add missing <array> include.
llvm-svn: 240629
2015-06-25 10:47:08 +00:00
Jay Foad 7a28cdc9dd Teach LLVM about the PPC64 memory sanitizer implementation.
Summary:
This is the LLVM part of the PPC memory sanitizer implementation in
D10648.

Reviewers: kcc, samsonov, willschm, wschmidt, eugenis

Reviewed By: eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10649

llvm-svn: 240627
2015-06-25 10:34:29 +00:00
Pawel Bylica 8bebed98a6 Express APInt::{s,u}{l,g}e(uint64_t) in terms of APInt::{s,u}{l,g}t(uint64_t). NFC.
This is preparation for http://reviews.llvm.org/D10655: Change APInt comparison with uint64_t.
Some unit tests added also.

llvm-svn: 240626
2015-06-25 10:23:52 +00:00
Toma Tabacu 7bc44dcb0c [mips] [IAS] Fix parsing of memory offset expressions with parenthesis depth >1.
Summary:
In an expression such as "(((a+b)+c)+d)", parseParenExpression() would only parse the "a+b)+c", which would result in an error later on in the parser.
This means that we can only parse one level of inner parentheses.

In order to fix this, I added a new function called parseParenExprOfDepth(), which parses a specified number of trailing parenthesis expressions
(except for the outermost parenthesis), and changed MipsAsmParser to use it in parseMemOffset instead of parseParenExpression().

Reviewers: dsanders, rafael

Reviewed By: dsanders, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9742

llvm-svn: 240625
2015-06-25 09:52:02 +00:00
Ahmed Bougacha f1eccbecf8 [X86] Accept hasAVX512() as well as hasFMA() when generating FMA.
We don't always have FMA, for example when using 'clang -mavx512f'
without an explicit CPU.

Also check for an explicit +avx512f instead of CPUs in a couple
related tests.

llvm-svn: 240616
2015-06-25 00:44:46 +00:00
Ahmed Bougacha cee6d1bb3c [X86] Cleanup fma tests a little bit. NFC.
Reformat, isolate 213->231 xform, actually --check-prefix CHECK,
and deduplicate the FMA intrinsic tests (FMA3 in AMD-land).

llvm-svn: 240615
2015-06-25 00:40:25 +00:00
Swaroop Sridhar e9247ab6d6 Enable StackMap Serialization for COFF
Summary

This change turns on the emission of 
__LLVM_Stackmaps section when generating COFF binaries.

Test Plan

Added a scenario to the test case: 
test\CodeGen\X86\statepoint-stackmap-format.ll.

Code Review:

http://reviews.llvm.org/D10680

llvm-svn: 240613
2015-06-25 00:28:42 +00:00
Rui Ueyama 6a75acb1c2 libObject/COFF: Add a function to get pointers to relocation entries.
llvm-svn: 240610
2015-06-25 00:07:39 +00:00
Duncan P. N. Exon Smith 817ac8f40a Add simplify_type<const WeakVH>; simplify IndVarSimplify
r240214 fixed some UB in IndVarSimplify, and it needed a temporary
`WeakVH` to do it.  Add `simplify_type<const WeakVH>` so that this
temporary isn't necessary.

llvm-svn: 240599
2015-06-24 22:23:21 +00:00
Douglas Katzman fcda6f8c6b [X86] Simplify some stuff in X86DisassemblerDecoder. NFC
- Deciding that insn->sibIndex is SIB_INDEX_NONE does not require another
check beyond the fully decoded bits being equal to 0x4.
The expression insn->sibIndex == SIB_INDEX_sib could not have been true unless
index were 0x4, because SIB_INDEX_sib is merely the range base (SIB_INDEX_EAX)
plus 4. Respectively SIB_INDEX_sib64.

- Don't use a switch statement to perform left-shift.

Differential Revision: http://reviews.llvm.org/D9762

llvm-svn: 240598
2015-06-24 22:04:55 +00:00
David Majnemer 63d606bdcb [GVN] Intersect the IR flags when CSE'ing two instructions
We performed a simple, but incomplete, intersection when it came time to
CSE instructions.  It didn't handle, for example, the 'exact' flag.

This fixes PR23922.

llvm-svn: 240595
2015-06-24 21:52:25 +00:00
Douglas Katzman b5fb2d461b Spelling fixes in comments.
llvm-svn: 240594
2015-06-24 21:46:53 +00:00
David Majnemer f6e500a0dc [Reassociate] Don't propogate flags when creating negations
Reassociate mutated existing instructions in order to form negations
which would create additional reassociate opportunities.

This fixes PR23926.

llvm-svn: 240593
2015-06-24 21:27:36 +00:00
Sanjay Patel 64ea207027 fix typos; NFC
llvm-svn: 240592
2015-06-24 20:42:33 +00:00
Sanjay Patel 09159b8f47 don't repeat function names in comments; NFC
llvm-svn: 240591
2015-06-24 20:40:57 +00:00
Akira Hatanaka 14348aa2c5 [If Converter] Convert recursion to iteration.
This commit makes changes to IfConverter::AnalyzeBlock to use iteration instead
of recursion. Previously, this function would get called recursively a large
number of times and eventually segfault when a function with the following CFG
was compiled:

BB0:
 if (condition0)
  goto BB1
 goto BB2
BB1:
 goto BB2
BB2:
 if (condition1)
  goto BB3
 goto BB4
BB3:
...
(repeat until BB7488)

rdar://problem/21386145

Differential Revision: http://reviews.llvm.org/D10587

llvm-svn: 240589
2015-06-24 20:34:35 +00:00
Pete Cooper 75403d7753 Devirtualize Instruction::clone_impl
llvm-svn: 240588
2015-06-24 20:22:23 +00:00
Jingyue Wu 9c71150bfb Add NVPTXPeephole pass to reduce unnecessary address cast
Summary:
This patch first change the register that holds local address for stack
frame to %SPL. Then the new NVPTXPeephole pass will try to scan the
following pattern

   %vreg0<def> = LEA_ADDRi64 <fi#0>, 4
   %vreg1<def> = cvta_to_local %vreg0

and transform it into

   %vreg1<def> = LEA_ADDRi64 %VRFrameLocal, 4

Patched by Xuetian Weng

Test Plan: test/CodeGen/NVPTX/local-stack-frame.ll

Reviewers: jholewinski, jingyue

Reviewed By: jingyue

Subscribers: eliben, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10549

llvm-svn: 240587
2015-06-24 20:20:16 +00:00
Sanjay Patel adb110c372 fix typos; NFC
llvm-svn: 240585
2015-06-24 20:07:50 +00:00
Matthias Braun da1b637c8d Revert "(HEAD -> master, origin/master, origin/HEAD) opt: Add option to strip or add llvm value names"
Accidental commit

This reverts commit r240583.

llvm-svn: 240584
2015-06-24 20:04:26 +00:00
Matthias Braun a7f3f03329 opt: Add option to strip or add llvm value names
llvm-svn: 240583
2015-06-24 20:03:33 +00:00
Matthias Braun ba3ecc3c80 ARMLoadStoreOptimizer: Fix errata 602117 handling and make testcase actually test for it
This fixes PR23912

Differential Revision: http://reviews.llvm.org/D10620

llvm-svn: 240582
2015-06-24 20:03:27 +00:00
Rafael Espindola 6bf322101b Make computeSymbolSizes never fail.
On ELF that was already the case since getting the size of a symbol
never fails.

On MachO and COFF we could fail trying to get the section of a symbol. But
we don't really need the section, just the section number to know if two
symbols are in the same section or not.

llvm-svn: 240580
2015-06-24 19:57:32 +00:00
Alex Lorenz 54565cf02b MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10618

llvm-svn: 240579
2015-06-24 19:56:10 +00:00
Rafael Espindola 7308d290bf Use Symbol::getValue to simplify object::computeSymbolSizes. NFC.
llvm-svn: 240575
2015-06-24 19:32:52 +00:00
Jingyue Wu 6f72aed3ec [LSR] canonicalize Prod*(1<<C) to Prod<<C
Summary:
Because LSR happens at a late stage where mul of a power of 2 is
typically canonicalized to shl, this canonicalization emits code that
can be better CSE'ed.

Test Plan:
Transforms/LoopStrengthReduce/shl.ll shows how this change makes GVN more
powerful. Fixes some existing tests due to this change.

Reviewers: sanjoy, majnemer, atrick

Reviewed By: majnemer, atrick

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D10448

llvm-svn: 240573
2015-06-24 19:28:40 +00:00
Rafael Espindola c1ffd69c34 Use Symbol.getValue to simplify RuntimeDyldCOFF::getSymbolOffset. NFC.
llvm-svn: 240572
2015-06-24 19:27:53 +00:00
Rafael Espindola 991af666f1 Add a SymbolRef::getValue.
This returns either the symbol offset or address. Since it is not defined which
one, it never has to lookup the section and so never fails.

I will add users in the next commit.

llvm-svn: 240569
2015-06-24 19:11:10 +00:00
Pete Cooper 5815b1fd56 Devirtualize Constant::replaceUsesOfWithOnConstant.
This is part of the work to devirtualize Value.

The old pattern was to call replaceUsesOfWithOnConstant which was overridden by
subclasses.  Those could then call replaceUsesOfWithOnConstantImpl on Constant
to handle deleting the current value.

To be consistent with other parts of the code, this has been changed so that we
call the method on Constant, and that dispatches to an Impl on subclasses.

As part of this, it made sense to rename the methods to be more descriptive.  The
new name is Constant::handleOperandChange, and it requires that all subclasses of
Constant implement handleOperandChangeImpl, even if they just throw an error if
they shouldn't be called.

Reviewed by Duncan Exon Smith.

llvm-svn: 240567
2015-06-24 18:55:24 +00:00
Duncan P. N. Exon Smith 9dbb5013b7 AsmPrinter: Cleanup DIEValue::EmitValue() API, NFC
Stop taking a `dwarf::Form` in `DIEValue::EmitValue()` and
`DIEValue::SizeOf()`, since they're always passed `DIEValue::getForm()`
anyway.  This is just left over from when `DIEValue` didn't know its own
form.

llvm-svn: 240566
2015-06-24 18:48:11 +00:00
Rafael Espindola 59128921f6 Refactor duplicated code. NFC.
llvm-svn: 240563
2015-06-24 18:14:41 +00:00
Peter Collingbourne f549598796 Object: Add XFAILed test case for r239560.
We ought to also emit unmangled references to dllimported functions,
but no existing linker needs this.

llvm-svn: 240562
2015-06-24 18:03:39 +00:00
Bruno Cardoso Lopes 7900ef891f [CaptureTracking] Avoid long compilation time on large basic blocks
CaptureTracking becomes very expensive in large basic blocks while
calling PointerMayBeCaptured. PointerMayBeCaptured scans the BB the
number of times equal to the number of uses of 'BeforeHere', which is
currently capped at 20 and bails out with Tracker->tooManyUses().

The bottleneck here is the number of calls to PointerMayBeCaptured * the
basic block scan. In a testcase with a 82k instruction BB,
PointerMayBeCaptured is called 130k times, leading to 'shouldExplore'
taking 527k runs, this currently takes ~12min.

To fix this we locally (within PointerMayBeCaptured) number the
instructions in the basic block using a DenseMap to cache instruction
positions/numbers. We build the cache incrementally every time we need
to scan an unexplored part of the BB, improving compile time to only
take ~2min.

This triggers in the flow: DeadStoreElimination -> MepDepAnalysis ->
CaptureTracking.

Side note: after multiple runs in the test-suite I've seen no
performance nor compile time regressions, but could note a couple of
compile time improvements:

Performance Improvements - Compile Time Delta Previous  Current StdDev
SingleSource/Benchmarks/Misc-C++/bigfib -4.48%  0.8547  0.8164  0.0022
MultiSource/Benchmarks/TSVC/LoopRerolling-dbl/LoopRerolling-dbl -1.47% 1.3912  1.3707  0.0056

Differential Revision: http://reviews.llvm.org/D7010

llvm-svn: 240560
2015-06-24 17:53:17 +00:00
Alex Lorenz 12b554e6a7 MIR Serialization: Serialize the null register operands.
This commit serializes the null register machine operands.
It uses the '_' keyword to represent them, but the parser
also allows the '%noreg' named register syntax.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10580

llvm-svn: 240558
2015-06-24 17:34:58 +00:00
Michael Zolotukhin 79ff564ef3 [LoopVectorizer] Fix bailing-out condition for OptForSize case.
With option OptForSize enabled, the Loop Vectorizer is not supposed to
create tail loop. The condition checking that was invalid and was not
matching to the comment above.

Patch by Marianne Mailhot-Sarrasin.

llvm-svn: 240556
2015-06-24 17:26:24 +00:00
Rafael Espindola 54c9f3da03 Simplify the logic, NFC.
llvm-svn: 240554
2015-06-24 17:08:44 +00:00
Alex Lorenz cc0a73c5eb ADTTests: merge #ifdef checks from r240436.
This commit merges the #ifdef and #ifndef checks into one #if, as
suggested by Duncan P. N. Exon Smith.

llvm-svn: 240553
2015-06-24 17:05:04 +00:00
Rafael Espindola d68fb74c2b Don't get confused with sections whose section number is reserved.
It is perfectly possible for SHNDX to contain indexes that have the same value
as reserved st_shndx values.

llvm-svn: 240544
2015-06-24 14:48:54 +00:00
Simon Pilgrim 51aa1f86fb [X86][AVX] Added full set of 256-bit vector shift tests.
llvm-svn: 240542
2015-06-24 13:52:25 +00:00
Daniel Sanders 110bf6da75 Eliminate additional redundant copies of Triple objects. NFC.
Subscribers: rafael, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10654

llvm-svn: 240540
2015-06-24 13:25:57 +00:00
Pawel Bylica cc35812877 Fix instruction scheduling live register tracking
Summary:
This patch fixes PR23405 (https://llvm.org/bugs/show_bug.cgi?id=23405).

During a node unscheduling an entry in LiveRegGens can be replaced with a new value. That corrupts the live reg tracking and LiveReg* structure is not cleared as should be during unscheduling. Problematic condition that enforces Gen replacement is `I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()`. This condition should be checked only if LiveRegGen was set in current node unscheduling.

Test Plan: Regression test included.

Reviewers: hfinkel, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9993

llvm-svn: 240538
2015-06-24 12:49:42 +00:00
Pawel Bylica 23663472f2 [llvm-stress] Simple refactoring and better style. NFC.
llvm-svn: 240534
2015-06-24 11:49:44 +00:00
Zoran Jovanovic 67e04be640 [mips][microMIPS] Implement BREAK, EHB and EI instructions
http://reviews.llvm.org/D10090

llvm-svn: 240531
2015-06-24 10:32:16 +00:00
Rafael Espindola d7a32ea4b8 Change how symbol sizes are handled in lib/Object.
COFF and MachO only define symbol sizes for common symbols. Reflect that
in the class hierarchy by having a method for common symbols only in the base
and a general one in ELF.

This avoids the need of using a magic value for the size, which had a few
problems
* Most callers didn't check for it.
* The ones that did could not tell the magic value from a file actually having
  that value.

llvm-svn: 240529
2015-06-24 10:20:30 +00:00
Chandler Carruth 5953482285 [ADT] Teach DenseMap to support StringRef keys.
While often you want to use something specialized like StringMap, when
the strings already have persistent storage a normal densemap over them
can be more efficient.

This can't go into StringRef.h because of really obnoxious header chains
from the hashing code to the endian detection code to CPU feature
detection code to StringMap.

llvm-svn: 240528
2015-06-24 10:06:29 +00:00
Justin Bogner aa315fbb4c Hexagon: Paper over the undefined behaviour introduced by r238692
This stops shifting a 32-bit value by such absurd amounts as 96 and
120. We do this by dropping a call to the function that was doing this
entirely, which rather surprisingly doesn't break *any* tests.

I've also added an assert in the misbehaving function to prove that
it's no longer being called with completely invalid arguments.

This change looks pretty bogus and we should probably be reverting
r238692 instead, but this is hard to do with the number of follow ups
that have happened since. It can't be any worse than the undefined
behaviour that was happening before though.

llvm-svn: 240526
2015-06-24 07:03:07 +00:00
NAKAMURA Takumi c267b5f5aa MILexer.cpp: Try to fix a warning. [-Wsign-compare]
llvm-svn: 240525
2015-06-24 06:40:09 +00:00
Craig Topper a60ee86f60 [TableGen] Restore the use of the TheInit field in Record to cache the Record's DefInit. I broke this when I fixed memory leaks recently. Remove the DenseMap that mapped Record's to DefInit.
llvm-svn: 240524
2015-06-24 06:19:19 +00:00
Bob Wilson 8d6b6f239e Do not treat ARM _MoveToCoprocessor* intrinsics as MSBuiltins.
Those builtins are now handled via ad-hoc code in clang with r240522 to
deal with reordering the arguments to fix PR22560.

llvm-svn: 240523
2015-06-24 06:07:41 +00:00
Justin Bogner ee1247be7b Hexagon: Avoid left shifting negative values (it's UB)
Found by ubsan.

llvm-svn: 240521
2015-06-24 06:00:53 +00:00
Justin Bogner c97c48aadc SystemZ: Rephrase this allOnes calculation to avoid UB
This allOnes function hits undefined behaviour if Count is greater
than 64, but we can avoid that and simplify the calculation by just
saturating if such a value is passed in.

This comes up under ubsan becauseRxSBGOperands is sometimes created
with values that are 128 bits wide. Somebody more familiar with this
code should probably look into whether that's expected, as a 64 bit
mask may or may not be appropriate for such types.

llvm-svn: 240520
2015-06-24 05:59:19 +00:00
Rafael Espindola 02b54b47bf Don't repeat name in comments.
llvm-svn: 240516
2015-06-24 03:19:35 +00:00
Ahmed Bougacha dd5da3e7ed [X86] Don't generate vbroadcasti128 for v4i64 splats from memory.
We used to erroneously match:
    (v4i64 shuffle (v2i64 load), <0,0,0,0>)

Whereas vbroadcasti128 is more like:
    (v4i64 shuffle (v2i64 load), <0,1,0,1>)

This problem doesn't exist for vbroadcastf128, which kept matching
the intrinsic after r231182.  We should perhaps re-introduce the
intrinsic here as well, but that's a separate issue still being
discussed.

While there, add some proper vbroadcastf128 tests.  We don't currently
match those, like for loading vbroadcastsd/ss on AVX (the reg-reg
broadcasts where added in AVX2).

Fixes PR23886.

llvm-svn: 240488
2015-06-24 00:07:16 +00:00
Pete Cooper a272f7fca9 Remove unused GlobalVariable::replaceUsesOfWithOnConstant. NFC.
The only caller of this method is Value::replaceAllUsesWith which
explicitly checks that we are not a GlobalValue.  So replace the
body with an unreachable to ensure that we never call it.

The unreachable itself is moved to GlobalValue not GlobalVariable
as that is the base class of all the globals we don't want to call
this method on.

Note, this patch is short lived as i'll soon refactor all callers
of this method.

llvm-svn: 240486
2015-06-24 00:05:07 +00:00
Ahmed Bougacha 89ae9a1e28 [X86] update_llc_test_checks vector-shuffle-*. NFC.
Some of them had gone stale.

llvm-svn: 240485
2015-06-24 00:03:48 +00:00
Alex Lorenz 240fc1e0aa MIR Serialization: Serialize immediate machine operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10573

llvm-svn: 240481
2015-06-23 23:42:28 +00:00
Sanjay Patel 6a24811d87 fix typo; NFC
llvm-svn: 240480
2015-06-23 23:26:22 +00:00
Sanjay Patel 9b7e6776a1 don't repeat function names in comments; NFC
llvm-svn: 240478
2015-06-23 23:05:08 +00:00
Petar Jovanovic 280e562072 Add "-mcpu=" option to llvm-rtdyld
This patch adds the -mcpu= option to llvm-rtdyld. With this option, one
can test relocations for different types of CPUs (e.g. Mips64r6).

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10503

llvm-svn: 240477
2015-06-23 22:52:19 +00:00
Alex Lorenz 51af160f4c MIR Parser: Use correct source locations for machine instruction diagnostics.
This commit translates the source locations for MIParser diagnostics from
the locations in the machine instruction string to the locations in the
MIR file.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10574

llvm-svn: 240474
2015-06-23 22:39:23 +00:00
Pete Cooper 86dd4cf5a1 Devirtualize Constant::destroyConstant.
This reorganizes destroyConstant and destroyConstantImpl.

Now there is only destroyConstant in Constant itself, while
subclasses are required to implement destroyConstantImpl.

destroyConstantImpl no longer calls delete but is instead only
responsible for removing the constant from any maps in which it
is contained.

Reviewed by Duncan Exon Smith.

llvm-svn: 240471
2015-06-23 21:55:11 +00:00
Simon Pilgrim a0d5c5924a [X86][SSE] Added full set of 128-bit vector shift tests.
Removed some old duplicate tests.

llvm-svn: 240465
2015-06-23 21:18:15 +00:00
Alexey Samsonov 19ffcb900f Let llvm::ReplaceInstWithInst copy debug location from old to new instruction.
Currently some users of this function do this explicitly, and all the
rest forget to do this.

ThreadSanitizer was one of such users, and had missing debug
locations for calls into TSan runtime handling atomic operations,
eventually leading to poorly symbolized stack traces and malfunctioning
suppressions.

This is another change relevant to PR23837.

llvm-svn: 240460
2015-06-23 21:00:08 +00:00
Evgeniy Stepanov 5bd81f3264 Pass 2 more variables to lit tests.
Pass ADB and ADB_SERIAL environment variables to lit tests.
This would allow running Android tests in compiler-rt when
there is more than one device attached to the host.

llvm-svn: 240459
2015-06-23 20:57:26 +00:00
Sanjoy Das 3f1bc3b2bb Revert "[FaultMaps] Move FaultMapParser to Object/"
This reverts commit r240364 (git c49542e5bb186).  The issue r240364 was
trying to fix was fixed independently in r240362.

llvm-svn: 240448
2015-06-23 20:09:03 +00:00
Steven Wu df2eb7777d Adding the missing LTO API to lto.exports
Summary:
lto_codegen_set_should_embed_uselists is introduced in r235943 but not
added to lto.exports. Add to export list to expose the API.

Reviewers: dexonsmith

Subscribers: rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D10658

llvm-svn: 240442
2015-06-23 18:56:48 +00:00
Rafael Espindola ae3ac08326 Don't pass a 32 bit value to "%08" PRIx64.
Should fix the arm bots.

llvm-svn: 240439
2015-06-23 18:34:25 +00:00
Mark Heffernan 9b536a640b This change fixes three bugs in loop unswitching. This change causes an 81% speed-up on a benchmark that is based on EigenConvolutionKernel2D from Eigen3, where the lack of loop unswitching blocks hoisting of loads out of a nested loop (see bug 23816 for how loop unswitching and load hoisting are related).
Change 1: Unswitching on trivial conditions should always happen regardless of the computed unswitching cost, as really the cost is zero. While there is code to make that happen, the logic that checks the unswitching cost against a threshold was moved to an earlier point (revision 147935) than the point where trivial unswitching is detected, so trivial unswitching is currently blocked by the cost threshold. This change fixes that.

Change 2: Before revision 147935 (from 2012-01-11), the threshold parameter was a per-loop threshold. So an unswitching happened only if the cost of the unswitching was less than the threshold. In an indirect way (and I believe unintentionally), the logic for this since then has been that the threshold is an over-all budget across all loops for all loop unswitching done by a given LoopUnswitch loop pass object. So if an unswitching with cost 100 happens in one function, that in effect reduces the threshold from 100 to 0 for the loops even in another function. This persists for the lifetime of that loop pass object. This makes no difference for most small examples but it is important for large examples. This revision fixes that.

Change 3: The cost is currently calculated as std::min(NumInstructions, 5 * NumBlocks). So a loop with 2 blocks and a million instructions will have an unswitching cost of 10. I changed this to just NumInstructions, as it were before revision 147935, though I'm open to e.g. instead replacing std::min with std::max.

I've tried to make the change minimally invasive while staying with what I think was the original intent of the code.
Submitted on behalf of broune@.

llvm-svn: 240438
2015-06-23 18:26:50 +00:00
Artem Belevich 6c9627252d [NVPTX] Added missing test case for llvm.nvvm.sqrt.f NVPTX intrinsic
Differential Revision: http://reviews.llvm.org/D10663

llvm-svn: 240437
2015-06-23 18:22:17 +00:00
Alex Lorenz 6f8a6be145 ADT: Add a string APSInt constructor.
This commit moves the APSInt initialization code that's used by
the LLLexer class into a new APSInt constructor that constructs
APSInts from strings.

This change is useful for MIR Serialization, as it would allow
the MILexer class to use the same APSInt initialization as 
LLexer when parsing immediate machine operands.

llvm-svn: 240436
2015-06-23 18:22:10 +00:00
Rafael Espindola ad3b6bfa2a Pass -m to the linker in this test.
Fixes the test on a ppc host.

llvm-svn: 240431
2015-06-23 18:04:54 +00:00
Alex Lorenz 8955f7d704 AsmParser: Extend the API to make the global value and metadata node slot mappings publicly accessible.
This commit creates a new structure called 'SlotMapping' in the AsmParser library.
This structure can be passed into the public parsing APIs from the AsmParser library
in order to extract the data structures that map from slot numbers to unnamed global
values and metadata nodes.

This change is useful for MIR Serialization, as the MIR Parser has to lookup the
unnamed global values and metadata nodes by their slot numbers.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10551

llvm-svn: 240427
2015-06-23 17:10:10 +00:00
Tom Stellard 82a56b01ae ELF: Fix defintion of STT_LOOS and STT_HIOS.
Reviewers: chandlerc, Bigcheese, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10647

llvm-svn: 240426
2015-06-23 16:41:57 +00:00
Alex Lorenz f3db51de5e MIR Serialization: Serialize physical register machine operands.
This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525

llvm-svn: 240425
2015-06-23 16:35:26 +00:00
John Brawn d86e004b7e [ARM] ARMLoadStoreOpt::UpdateBaseRegUses should stop on def
When UpdateBaseRegUses sees an instruction that defines the base
register it must stop, as the base register value it is updating is no
longer live. Ideally we would already have seen the register be killed
(which is already checked for), but the kill flags may be inaccurate
and we have to account for this.

Differential Revision: http://reviews.llvm.org/D10566

llvm-svn: 240424
2015-06-23 16:02:11 +00:00
Rafael Espindola 5f7ade26d0 objdump: Don't print a (always 0) size for MachO symbols.
Only common symbol on MachO and COFF have a size.

For COFF we already had a custom format.

For MachO, there is no native objdump and we were printing it as ELF. Now
we only print the sizes for symbols that actually have them.

llvm-svn: 240422
2015-06-23 15:45:38 +00:00
Justin Bogner a6d383677d SystemZ: Avoid left shifting negative values (it's UB)
Found by ubsan.

llvm-svn: 240420
2015-06-23 15:38:24 +00:00
Benjamin Kramer 49381bee2e [Option] Plug a leak when move-assigning an InputArgList.
The class has a non-trivial dtor so we have to clean up before we move
in new members. Remove misleading comment as a default move assignment
operator will never be synthesized for this class.

llvm-svn: 240417
2015-06-23 15:28:10 +00:00
Benjamin Kramer e7800cab82 Make helper functions static. NFC.
llvm-svn: 240416
2015-06-23 14:51:40 +00:00
Benjamin Kramer 8c57cfd51b [BranchFolding] Document why replacing HashMachineInstr with hash_code doesn't work
llvm-svn: 240415
2015-06-23 14:47:36 +00:00
Benjamin Kramer 6b568964ba [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstr
Use it in CodeGen where applicable. No functionality change intended.

llvm-svn: 240414
2015-06-23 14:47:29 +00:00
Benjamin Kramer 9c956b33d7 [MachineBasicBlock] Use the const_cast(this) trick to reduce duplication
NFC.

llvm-svn: 240413
2015-06-23 14:47:18 +00:00
Rafael Espindola 6763f5a43e Be sure to set the DataLayout before checking the cache.
This makes sure the same mangling is used.

Should fix the OS X bots.

llvm-svn: 240411
2015-06-23 14:42:34 +00:00
Toma Tabacu d88d79c79d [mips] [IAS] Add partial support for the ULHU pseudo-instruction.
Summary:
This only adds support for ULHU of an immediate address with/without a source register.
It does not include support for ULHU of the address of a symbol.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9671

llvm-svn: 240410
2015-06-23 14:39:42 +00:00
Rafael Espindola 8c5f537f18 Remove unused arguments and move ManglerPrefixTy to the implementation.
llvm-svn: 240408
2015-06-23 14:11:09 +00:00
Toma Tabacu 0b3e97874d [mips] [IAS] Add support for generating DADDu to createAddu(). NFC.
Summary: This isn't used right now, but it will be in some upcoming changes.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10568

llvm-svn: 240407
2015-06-23 14:00:54 +00:00
Rafael Espindola c233f74e6e Simplify the Mangler interface now that DataLayout is mandatory.
We only need to pass in a DataLayout when mangling a raw string, not when
constructing the mangler.

llvm-svn: 240405
2015-06-23 13:59:29 +00:00
Petar Jovanovic b7915a1f0b [mips64] Emit correct addend for some PC-relative relocations
So far, LLVM has not emitted correct addend for N64 and N32 ABI. This patch
fixes that. It also removes fixup from MCJIT for R_MIPS_PC16 relocation.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10565

llvm-svn: 240404
2015-06-23 13:54:42 +00:00
Krzysztof Parzyszek c3966017b9 [Hexagon] Use MF reference from parent class in HexagonPacketizerList
llvm-svn: 240403
2015-06-23 13:50:23 +00:00
Toma Tabacu bfcbfd56af [mips] [IAS] Move some function definitions to MipsTargetStreamer.cpp. NFC.
Summary: For the sake of consistency and to make some upcoming changes a little less noisy.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10639

llvm-svn: 240398
2015-06-23 12:34:19 +00:00
Rafael Espindola 3fd22703b6 Don't repeat names in comments.
llvm-svn: 240396
2015-06-23 12:29:52 +00:00
Rafael Espindola ce4c2bc1d6 Use MCSymbols for FastISel.
The summary is that it moves the mangling earlier and replaces a few
calls to .addExternalSymbol with addSym.

I originally wanted to replace all the uses of addExternalSymbol with
addSym, but noticed it was a lot of work and doesn't need to be done
all at once.

llvm-svn: 240395
2015-06-23 12:21:54 +00:00
Daniel Jasper 41de8027b1 Revert r240302 ("Bring r240130 back.").
This causes errors like:

  ld: error: blah.o: requires dynamic R_X86_64_PC32 reloc against '' which
  may overflow at runtime; recompile with -fPIC
  blah.cc:function f(): error: undefined reference to ''
  blah.o:g(): error: undefined reference to ''

I have not yet come up with an appropriate reproduction.

llvm-svn: 240394
2015-06-23 11:31:32 +00:00
Alexander Kornienko 6d9be8e771 Revert r240271 (Fixed/added namespace ending comments using clang-tidy. NFC)
llvm-svn: 240393
2015-06-23 10:48:35 +00:00
Daniel Sanders 70b5908d39 [mips] llvm-readobj can parse .MIPS.abiflags. No need to check the bytes.
Summary:

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10538

llvm-svn: 240392
2015-06-23 10:11:36 +00:00
Alexander Kornienko f00654e31b Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
Apparently, the style needs to be agreed upon first.

llvm-svn: 240390
2015-06-23 09:49:53 +00:00
Elena Demikhovsky 5e2f8c4231 AVX-512: Added all forms of VPABS instruction
Added all intrinsics, tests for encoding, tests for intrinsics.

llvm-svn: 240386
2015-06-23 08:19:46 +00:00