0b3bcee284
Rename AliasSet to SubRegs, to reflect changes in the surrounding code.
...
llvm-svn: 57618
2008-10-16 01:06:18 +00:00
6613991eae
Move the include of MachineLocation.h into MachineModuleInfo.h
...
because it declares a std::vector<MachineMove>, and strict
concept checking requires the definition of MachineMove to be
available.
llvm-svn: 57617
2008-10-16 00:20:14 +00:00
bf293c48db
Fix a subtle bug in DeadMachineInstructionElim's liveness
...
computation. A def of a register doesn't necessarily kill
live super-registers.
llvm-svn: 57614
2008-10-16 00:11:23 +00:00
4459c4250d
Adjust whitespace in debug messages to be more consistent
...
with other debug messages.
llvm-svn: 57543
2008-10-15 02:57:38 +00:00
3b0f5e4d61
- Add target lowering hooks that specify which setcc conditions are illegal,
...
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.
llvm-svn: 57542
2008-10-15 02:05:31 +00:00
e7ced74558
FastISel support for exception-handling constructs.
...
- Move the EH landing-pad code and adjust it so that it works
with FastISel as well as with SDISel.
- Add FastISel support for @llvm.eh.exception and
@llvm.eh.selector.
llvm-svn: 57539
2008-10-14 23:54:11 +00:00
07d53b1d33
Rename LoadX to LoadExt.
...
llvm-svn: 57526
2008-10-14 21:26:46 +00:00
9c4b7d5c4f
Fix command-line option printing to print two spaces where needed,
...
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
llvm-svn: 57521
2008-10-14 20:25:08 +00:00
da9b752883
FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
...
llvm-svn: 57460
2008-10-13 18:46:18 +00:00
4c499c4fa6
Also update sub-register intervals after a trivial computation is rematt'ed for a copy instruction. PR2775.
...
llvm-svn: 57458
2008-10-13 18:35:52 +00:00
43686a6665
* Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns
...
null. This assumes that any target that does not have AsmInfo, does not
support "LocAndDot".
llvm-svn: 57438
2008-10-13 12:41:46 +00:00
c8d7988da8
Make MachineFunction not crash when TargetMachine::getRegisterInfo() returns
...
NULL, but just hide some debug output then.
llvm-svn: 57437
2008-10-13 12:37:16 +00:00
c52af45304
calls can be supported.
...
llvm-svn: 57428
2008-10-13 01:59:13 +00:00
fe1f3d6e08
Fix a bug in live-in detection that caused lost-copy problems to show up.
...
llvm-svn: 57424
2008-10-12 20:39:30 +00:00
c46186e890
fix typo
...
llvm-svn: 57388
2008-10-11 23:59:03 +00:00
2753955fc0
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
...
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
llvm-svn: 57385
2008-10-11 22:08:30 +00:00
fb1f4a1329
simplify comparison
...
llvm-svn: 57371
2008-10-11 00:08:02 +00:00
4f2791617e
Remove some overzealous checks that were rejecting
...
valid comments in inline assembly.
gcc.target/i386/20011009-1.c
llvm-svn: 57365
2008-10-10 21:04:42 +00:00
dfcc1ff8f8
Added missing print functions that take a raw_ostream
...
llvm-svn: 57339
2008-10-10 01:43:55 +00:00
4f0bd68cfe
Add a "loses information" return value to APFloat::convert
...
and APFloat::convertToInteger. Restore return value to
IEEE754. Adjust all users accordingly.
llvm-svn: 57329
2008-10-09 23:00:39 +00:00
54306fe499
Rename APFloat::convertToAPInt to bitcastToAPInt to
...
make it clearer what the function does. No functional
change.
llvm-svn: 57325
2008-10-09 18:53:47 +00:00
d796164e89
Align EH tables before label is emitted, not after,
...
thus aligning the label.
llvm-svn: 57310
2008-10-08 21:50:21 +00:00
bfe12ee668
Fix the case where an instruction is not properly marked as using all registers that alias its inputs.
...
llvm-svn: 57286
2008-10-08 04:30:51 +00:00
60ad173dfe
Remove -disable-fast-isel. Use cl::boolOrDefault with -fast-isel
...
instead.
So now: -fast-isel or -fast-isel=true enable fast-isel, and
-fast-isel=false disables it. Fast-isel is also on by default
with -fast, and off by default otherwise.
llvm-svn: 57270
2008-10-07 23:00:56 +00:00
c1d47c56f9
Avoid emitting redundant materializations of integer constants
...
for things like null pointers, which at this level aren't
different from regular integer constants.
llvm-svn: 57265
2008-10-07 22:03:27 +00:00
1d338fc6a4
Add an option to enable StrongPHIElimination, for ease of testing.
...
llvm-svn: 57259
2008-10-07 20:22:28 +00:00
21dca9cbb1
Use Dan's supperior check
...
llvm-svn: 57255
2008-10-07 18:27:23 +00:00
d69bdaef64
No need for |=
...
llvm-svn: 57249
2008-10-07 17:11:29 +00:00
6d409f08be
Use ADDC if it is valid at any smaller size. Do it right this time
...
llvm-svn: 57248
2008-10-07 17:09:16 +00:00
6606f17e50
Use ADDC if it is valid at any smaller size. fixes test/Codegen/Generic/i128-addsub.ll on x86
...
llvm-svn: 57247
2008-10-07 17:03:15 +00:00
3a9be150be
Expand arith on machines without carry flags
...
llvm-svn: 57243
2008-10-07 14:15:42 +00:00
bef9b0bef0
Correctly handle calls with no return values. This fixes
...
2006-01-23-UnionInit on x86-64 when inlining is not enabled.
llvm-svn: 57223
2008-10-07 00:12:37 +00:00
dfe979bcb0
Don't dereference the end() iterator. Thanks to
...
ENABLE_EXPENSIVE_CHECKS for finding this.
llvm-svn: 57181
2008-10-06 18:00:07 +00:00
ab379c905b
Remove unncessary isDeclaration() checks.
...
llvm-svn: 57179
2008-10-06 17:30:07 +00:00
7875876e46
reorder #include order, patch by Kenneth Boyd!
...
llvm-svn: 57148
2008-10-06 03:54:25 +00:00
0c41861f39
Add #include to get alloca, patch by Kenneth Boyd!
...
llvm-svn: 57147
2008-10-06 03:53:16 +00:00
2416896b3c
wrap some long lines and expand i32 mul's to libcalls, inspired by a
...
patch by Mikael Lepisto!
llvm-svn: 57077
2008-10-04 21:27:46 +00:00
b5abd78ab5
CMake: Reflected changes on source file structure. New plugin support
...
for llvmc2 incomplete.
llvm-svn: 57076
2008-10-04 21:18:50 +00:00
68fec886ed
Fix compilation error on MSVC.
...
llvm-svn: 57046
2008-10-04 08:11:49 +00:00
13b048268b
Fix fast-isel's handling of atomic instructions. They may
...
expand to multiple basic blocks, in which case fast-isel
needs to informed of which block to use as it resumes
inserting instructions.
llvm-svn: 57040
2008-10-04 00:56:36 +00:00
78bb44fcd4
Fix a bug in the local allocator's liveness computation where it
...
was setting kill flags on tied uses in two-address instructions.
The kill flags were causing the allocator to think it could
allocate the use and its tied def in different registers.
llvm-svn: 57039
2008-10-04 00:31:14 +00:00
5d60c1ebb1
Pass MemOperand through for 64-bit atomics on 32-bit,
...
incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
llvm-svn: 57027
2008-10-03 19:41:08 +00:00
b62cd7ea98
Use -1ULL instead of uint64_t(-1), at Anton's suggestion.
...
llvm-svn: 57021
2008-10-03 17:56:45 +00:00
8428cfc93b
Fix typos pointed out by Duncan. Also untabify these files.
...
llvm-svn: 57018
2008-10-03 17:11:58 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
...
isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
6e42742d2d
The result of getSetCCResultType (eg: i32) may be larger
...
than the type an i1 is promoted to (eg: i8). Account
for this. Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!
llvm-svn: 56997
2008-10-03 07:41:46 +00:00
4e072a75cc
Implement fast-isel support for zero-extending from i1.
...
It turns out that this is a fairly common operation,
and it's easy enough to handle.
llvm-svn: 56990
2008-10-03 01:28:47 +00:00
1ab1d31f7a
Optimize conditional branches in X86FastISel. This replaces
...
sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
llvm-svn: 56969
2008-10-02 22:15:21 +00:00
a78bae34a5
Add a new MachineBasicBlock utility function, isLayoutSuccessor, that
...
can be used when deciding if a block can transfer control to another
via a fall-through instead of a branch.
llvm-svn: 56968
2008-10-02 22:09:09 +00:00
72a9e7367c
fix build gcc 4.3
...
llvm-svn: 56965
2008-10-02 20:15:08 +00:00
c5b45fec6b
Use a multimap rather than a map for holding the list of copies to insert, so we don't lose copies when two of them have
...
the same source. I don't know what I was thinking when I wrote this originally.
Note: There's probably a more efficient way to do this, but I need to think about it some more, and about what determinism
guarantees need to be present.
llvm-svn: 56964
2008-10-02 19:40:33 +00:00
867d549fce
Handle some 64-bit atomics on x86-32, some of the time.
...
llvm-svn: 56963
2008-10-02 18:53:47 +00:00
b25f4637dd
A Partitioned Boolean Quadratic Programming (PBQP) based register allocator.
...
Contributed by Lang Hames.
llvm-svn: 56959
2008-10-02 18:29:27 +00:00
88536398ff
Fix a think-o in isSafeToMove. This fixes it from thinking that
...
volatile memory references are safe to move.
llvm-svn: 56948
2008-10-02 15:04:30 +00:00
1b76f2c40b
Remove OptimizeForSize global. Use function attribute optsize.
...
llvm-svn: 56937
2008-10-01 23:18:38 +00:00
3b88f10f46
Enable FastISel by default (on x86 and x86-64) with the -fast option.
...
llvm-svn: 56930
2008-10-01 20:39:19 +00:00
1dd27578dd
Make some implicit conversions explicit, to avoid compiler warnings.
...
llvm-svn: 56927
2008-10-01 19:58:59 +00:00
94798d31dd
Fold trivial two-operand tokenfactors where the operands are equal
...
immediately.
llvm-svn: 56921
2008-10-01 15:11:19 +00:00
3a293e7404
Fix typos in comments.
...
llvm-svn: 56919
2008-10-01 15:07:49 +00:00
68f12ee567
Implement the -fno-builtin option in the front-end, not in the back-end.
...
llvm-svn: 56900
2008-10-01 00:59:58 +00:00
15e6be8cc5
Mark merged-in VNInfo's as being PHIKilled.
...
llvm-svn: 56893
2008-09-30 23:58:47 +00:00
f4a36407c7
Fix a simple error in renumbering kill markaers, that took an inordinant amount of time to track down.
...
llvm-svn: 56889
2008-09-30 22:51:54 +00:00
e818bc159f
- Initialize "--no-builtin" to "false".
...
- Testcase for r56885.
llvm-svn: 56886
2008-09-30 21:40:30 +00:00
bd09262e97
Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
...
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.
llvm-svn: 56885
2008-09-30 21:22:07 +00:00
b486350b15
Move the primary fast-isel top-level comments to FastISel.cpp, where
...
they'll be a little more visible. Also, update and reword them a bit.
llvm-svn: 56877
2008-09-30 20:48:29 +00:00
86aa16a69a
Optimize SelectionDAG's AssignTopologicalOrder even further.
...
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.
Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.
This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.
llvm-svn: 56867
2008-09-30 18:30:35 +00:00
9156bd2f48
Re-apply 56835 along with header file changes.
...
llvm-svn: 56848
2008-09-30 15:44:16 +00:00
2b9adce1d0
Revert commit 56835 since it breaks the build.
...
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".
llvm-svn: 56837
2008-09-30 10:00:30 +00:00
9469049f7d
If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it.
...
llvm-svn: 56835
2008-09-30 06:36:58 +00:00
f61a84ec43
Remove misuse of ReplaceNodeResults for atomics with
...
valid types. No functional change.
llvm-svn: 56808
2008-09-29 22:25:26 +00:00
4aa9095398
Fix FastISel to not initialize the PIC-base register multiple times
...
in functions with PIC references from more than one basic block.
llvm-svn: 56807
2008-09-29 21:55:50 +00:00
c966a737c5
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
...
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...
llvm-svn: 56703
2008-09-26 22:10:44 +00:00
6e0548336a
Rename ConstantSDNode's getSignExtended to getSExtValue, for
...
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
llvm-svn: 56700
2008-09-26 21:54:37 +00:00
d77cbe8947
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
...
llvm-svn: 56683
2008-09-26 19:48:35 +00:00
0e32a2c935
Add "inreg" field to CallSDNode (doesn't increase
...
its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
llvm-svn: 56677
2008-09-26 19:31:26 +00:00
a381313d98
We don't need to insert copies for implicit_def's.
...
llvm-svn: 56674
2008-09-26 18:50:46 +00:00
374d7f2b16
If we have a function with an unreachable statement such that the ending debug
...
information is in an unreachable block, then it's possible that the high/low pc
values won't be set for the dwarf information. E.g., this function:
void abort(void) __attribute__((__noreturn__));
void dead_beef(void) __attribute__ ((noreturn));
int *b;
void dead_beef(void) {
*b=0xdeadbeef;
abort();
}
has a call to "@llvm.dbg.region.end" only in the unreachable block:
define void @dead_beef() noreturn nounwind {
entry:
call void @llvm.dbg.func.start(...)
call void @llvm.dbg.stoppoint(...)
...
call void @abort( ) noreturn nounwind
unreachable
return: ; No predecessors!
call void @llvm.dbg.stoppoint(...)
call void @llvm.dbg.region.end(...)
ret void
}
The dwarf information emitted is something like:
0x00000084: TAG_subprogram [5]
AT_name( "dead_beef" )
AT_external( 0x01 )
AT_prototyped( 0x01 )
AT_decl_file( 0x01 )
AT_decl_line( 0x08 )
Note that this is *not* the best fix for this problem, but a band-aid for an
gaping wound. This code needs to be changed when we revamp our debugging
information.
llvm-svn: 56628
2008-09-26 00:28:12 +00:00
4c758ea3e0
Large mechanical patch.
...
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
llvm-svn: 56622
2008-09-25 21:00:45 +00:00
c50ada2f56
Accept 'inreg' attribute on x86 functions as
...
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0). Update documentation
to reflect reality.
llvm-svn: 56619
2008-09-25 20:47:45 +00:00
5e490a7567
Support for i1 XOR in FastISel. It is actually safe because
...
i1 operands are assumed to already by zero-extended.
llvm-svn: 56615
2008-09-25 17:22:52 +00:00
6975c36c43
Don't print fast-isel debug messages by default. Thanks Chris!
...
llvm-svn: 56614
2008-09-25 17:21:42 +00:00
dd920bf3f0
Don't forget the newline in debug output.
...
llvm-svn: 56613
2008-09-25 17:17:27 +00:00
32a733e2c7
FastISel support for debug info.
...
llvm-svn: 56610
2008-09-25 17:05:24 +00:00
4b35e64504
bug 2812: Segmentation fault on a big emdiam processor.
...
llvm-svn: 56609
2008-09-25 16:15:10 +00:00
3663f156f7
Fix a recent fast-isel coverage regression - don't bail out before
...
giving the target a chance to materialize constants.
llvm-svn: 56605
2008-09-25 01:28:51 +00:00
b8e69f1755
Enable DeadMachineInstructionElim when Fast-ISel is enabled.
...
llvm-svn: 56604
2008-09-25 01:14:49 +00:00
b873aa632c
Add debug output to this pass.
...
llvm-svn: 56602
2008-09-25 01:06:50 +00:00
acb0554842
Refactor the code that adds standard LLVM codegen passes into
...
a separate function, eliminating duplication between the
add-passes-for-file and add-passes-for-machine-code code.
llvm-svn: 56599
2008-09-25 00:37:07 +00:00
2e7450716a
<rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
...
llvm-svn: 56597
2008-09-25 00:14:04 +00:00
382e2ec6b7
Give LowerSubregs.cpp a top-level description.
...
llvm-svn: 56596
2008-09-24 23:44:12 +00:00
86d421df23
Remove SelectionDag early allocation of registers
...
for earlyclobbers. Teach Local RA about earlyclobber,
and add some tests for it.
llvm-svn: 56592
2008-09-24 23:13:09 +00:00
fd7faecfc2
Use helper
...
llvm-svn: 56584
2008-09-24 22:21:04 +00:00
d19e91e5a8
SmallPtrSet will be better
...
llvm-svn: 56583
2008-09-24 22:20:46 +00:00
123afb88c4
Use generic section-handling stuff to emit constant pool entries
...
llvm-svn: 56579
2008-09-24 22:17:59 +00:00
7497762606
Get rid of duplicate char*/Section* DataSection
...
llvm-svn: 56575
2008-09-24 22:16:16 +00:00
f8dc8aac3c
Get rid of duplicate char*/Section* TextSection
...
llvm-svn: 56574
2008-09-24 22:15:21 +00:00
076e905b94
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.
...
llvm-svn: 56573
2008-09-24 22:14:23 +00:00
69ff51baa0
Drop obsolete hook and change all usage to new interface
...
llvm-svn: 56572
2008-09-24 22:13:07 +00:00
7d002fa77b
Provide direct function to switch to Section
...
llvm-svn: 56571
2008-09-24 22:12:10 +00:00
4ef4b1a7c1
Fix off-by-one error when updating live intervals.
...
llvm-svn: 56567
2008-09-24 21:30:38 +00:00
dea91308ae
Reapplying r56550
...
llvm-svn: 56553
2008-09-24 10:25:02 +00:00
162c26dee3
Forgot this part with my last patch. Sorry about the breakage.
...
llvm-svn: 56552
2008-09-24 10:16:24 +00:00
4e26a81371
Temporarily revert r56550 until missing commit can be added.
...
llvm-svn: 56551
2008-09-24 08:30:44 +00:00
7c31464a0b
Refactor the constant folding code into it's own function. And call it from both
...
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.
This is *not* in response to a bug, so there isn't a testcase.
llvm-svn: 56550
2008-09-24 07:11:26 +00:00
c36660d756
Next round of earlyclobber handling. Approach the
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RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
llvm-svn: 56539
2008-09-24 01:07:17 +00:00
6b33aa4d96
Refactor the logic for testing if an instruction is dead into a
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separate method.
llvm-svn: 56531
2008-09-24 00:27:38 +00:00
1e2b282be3
Set SetStore to false, to allow this pass to delete
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dead loads.
llvm-svn: 56529
2008-09-24 00:07:08 +00:00
7c59ed6ff8
Add a method to MachineInstr for testing whether it makes
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any volatile memory references.
llvm-svn: 56528
2008-09-24 00:06:15 +00:00
e0add20c1b
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
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llvm-svn: 56526
2008-09-24 00:05:32 +00:00
ba3fa6c6e1
s/ParameterAttributes/Attributes/g
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llvm-svn: 56513
2008-09-23 23:03:40 +00:00
676145f02d
Now that DeadMachineInstructionElim is basically working
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correctly, it's not necessary to explicitly remove registers
from their use-def lists.
llvm-svn: 56509
2008-09-23 22:04:18 +00:00
918fe08a56
Arrange for FastISel code to have access to the MachineModuleInfo
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object. This will be needed to support debug info.
llvm-svn: 56508
2008-09-23 21:53:34 +00:00
269999cb03
Track local physical register liveness. This is not the most
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efficient implementation possible, but it's pretty simple and
good enough for the time being.
llvm-svn: 56504
2008-09-23 21:40:44 +00:00
c07f686665
Replace the LiveRegs SmallSet with a simple counter that keeps
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track of the number of live registers, which is all the set was
being used for.
llvm-svn: 56498
2008-09-23 18:50:48 +00:00
4cdc18ad80
Add initial support for inserting last minute copies.
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llvm-svn: 56485
2008-09-23 04:37:10 +00:00
e2947e1e07
Fix the alignment of loads from constant pool entries when the
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load address has an offset from the base of the constant pool
entry.
llvm-svn: 56479
2008-09-22 22:40:08 +00:00
bab5988017
Livestacks really does preserve everything.
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llvm-svn: 56476
2008-09-22 22:26:15 +00:00
962c2cf17a
Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators.
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llvm-svn: 56475
2008-09-22 22:21:38 +00:00
97364655dc
Significant improvements to the logic for merging live intervals. This code can't
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just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.
llvm-svn: 56472
2008-09-22 21:58:58 +00:00
7a74e71489
Make log, log2, log10, exp, exp2 use Expand by
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default.
llvm-svn: 56471
2008-09-22 21:57:32 +00:00
168f8f3916
Mark several codegen passes as preserving all analysis.
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llvm-svn: 56469
2008-09-22 20:58:04 +00:00
f1acc4d610
More refactoring. Yawn.
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llvm-svn: 56468
2008-09-22 20:51:30 +00:00
7beddb8680
Refactor FP intrinisic setup. Per review feedback.
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llvm-svn: 56456
2008-09-22 19:51:58 +00:00
13beeeb128
Per review feedback: Only perform
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(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.
llvm-svn: 56452
2008-09-22 18:19:24 +00:00
a229b3c9a7
Initial support for the CMake build system.
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llvm-svn: 56419
2008-09-22 01:08:49 +00:00
91ef8fcd29
Add helper function to get a 32-bit floating point constant. No functionality change.
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llvm-svn: 56418
2008-09-22 00:44:35 +00:00
ae9d9f4d3f
Factor out code into HandleVirtRegDef, for consistency with
...
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.
llvm-svn: 56412
2008-09-21 21:11:41 +00:00
df8f1cb995
Fetch the starting index of the block when assigning intervals. This gets live-in indices
...
correct in the presence of things like EH labels.
llvm-svn: 56410
2008-09-21 20:43:24 +00:00
43f5449c48
don't print GlobalAddressSDNode's with an offset of zero as "foo0".
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llvm-svn: 56399
2008-09-21 18:38:31 +00:00
9af7b3daec
Teach coalescer about earlyclobber bits.
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Check bits for preferred register.
llvm-svn: 56384
2008-09-20 02:03:04 +00:00
c042000649
Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
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llvm-svn: 56381
2008-09-20 01:28:05 +00:00
29e4c9192d
Continue after removing the current MI.
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llvm-svn: 56372
2008-09-19 22:49:39 +00:00
9801ba451a
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
...
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
llvm-svn: 56371
2008-09-19 22:16:54 +00:00
436aae627d
Make earlyclobber stuff work when virtual regs
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have previously been assigned conflicting physreg.
llvm-svn: 56364
2008-09-19 18:52:31 +00:00
4c0197043c
Re-materalized definition instructions may be dead. Whack them.
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llvm-svn: 56352
2008-09-19 17:38:47 +00:00
e519bd4183
Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis
...
and redo as linked list walk. Logic moved into RA.
Per review feedback.
llvm-svn: 56326
2008-09-19 01:02:35 +00:00
3d9416cf24
Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.
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llvm-svn: 56314
2008-09-18 22:38:47 +00:00
f3d647e00b
Don't consider instructions with implicit physical register
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defs to be necessarily live.
llvm-svn: 56310
2008-09-18 18:22:32 +00:00
95be7d7b85
Add a new "fast" scheduler. This is currently basically just a
...
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.
This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.
llvm-svn: 56307
2008-09-18 16:26:26 +00:00
f8610ebebc
Add a bit to mark operands of asm's that conflict
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with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
llvm-svn: 56290
2008-09-17 21:13:11 +00:00
f3fcd7a464
Unallocatable registers do not have live intervals.
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llvm-svn: 56287
2008-09-17 18:36:25 +00:00
6ab52a8018
Don't worry about clobbering physical register defs that aren't used.
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llvm-svn: 56281
2008-09-17 15:25:49 +00:00
c24cd015a7
Add a new MachineInstr-level DCE pass. It is very simple, and is intended to
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be used with fast-isel.
llvm-svn: 56268
2008-09-17 00:43:24 +00:00
a904f466e8
When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
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llvm-svn: 56258
2008-09-16 23:12:11 +00:00
64d6c6fe30
Change SelectionDAG::getConstantPool to always set the alignment of the
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ConstantPoolSDNode, using the target's preferred alignment for the
constant type.
In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.
This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)
Patch by Paul Redmond!
llvm-svn: 56253
2008-09-16 22:05:41 +00:00
24c79f28b1
Reverting r56249. On further investigation, this functionality isn't needed.
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Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
ab26f20d44
Include the alignment value when displaying ConstantPoolSDNodes.
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llvm-svn: 56250
2008-09-16 21:18:22 +00:00
8bc392fb1d
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
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- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
5cf6120a7c
Fix these comments to reflect current reality. Surprisingly,
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MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.
llvm-svn: 56248
2008-09-16 20:45:53 +00:00
050d7835c6
Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
...
are not enabled. Instead just omit the tail call flag when calls are
created.
llvm-svn: 56235
2008-09-16 01:42:28 +00:00
Dan Gohman