Commit Graph

319559 Commits

Author SHA1 Message Date
Fangrui Song 249fde8583 [ELF][ARM][AARCH64][MIPS][PPC] Simplify the logic to create R_*_RELATIVE for absolute relocation types in writable sections
Summary:
Our rule to create R_*_RELATIVE for absolute relocation types were
loose. D63121 made it stricter but it failed to create R_*_RELATIVE for
R_ARM_TARGET1 and R_PPC64_TOC. rLLD363236 worked around that by
reinstating the original behavior for ARM and PPC64.

This patch is an attempt to simplify the logic.

Note, in ld.bfd, R_ARM_TARGET2 --target2=abs also creates
R_ARM_RELATIVE. This seems a very uncommon scenario (moreover,
--target2=got-rel is the default), so I do not implement any logic
related to it.

Also, delete R_AARCH64_ABS32 from AArch64::getDynRel. We don't have
working ILP32 support yet. Allowing it would create an incorrect
R_AARCH64_RELATIVE.

For MIPS, the (if SymbolRel, then RelativeRel) code is to keep its
behavior unchanged.

Note, in ppc64-abs64-dyn.s, R_PPC64_TOC gets an incorrect addend because
computeAddend() doesn't compute the correct address. We seem to have the
wrong behavior for a long time. The important thing seems that a dynamic
relocation R_PPC64_TOC should not be created as the dynamic loader will
error R_PPC64_TOC is not supported.

Reviewers: atanasyan, grimar, peter.smith, ruiu, sfertile, espindola

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D63383

llvm-svn: 363928
2019-06-20 14:00:08 +00:00
Fangrui Song ffed2c96d9 [ELF][ARM] Merge handleARMTlsRelocation() into handleTlsRelocation()
ARM and RISC-V do not support TLS relaxations. However, for General
Dynamic and Local Dynamic models, if we are producing an executable and
the symbol is non-preemptable, we know it must be defined and the
R_ARM_TLS_DTPMOD32/R_RISCV_TLS_DTPMOD{32,64} dynamic relocation can be
omitted because it is always 1. This may be necessary for static linking
as DTPMOD may not be expected at load time.

Merge handleARMTlsRelocation() into handleTlsRelocation(). This requires
more logic to R_TLSGD_PC and R_TLSLD_PC. Because we use SymbolicRel to
resolve the relocation at link time, R_ARM_TLS_DTPMOD32 can be deleted
from relocateOne(). It cannot be used as a static relocation type.

As a bonus, the additional logic in R_TLSGD_PC code can be shared by the
TLS support for RISC-V (D63220).

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D63333

llvm-svn: 363927
2019-06-20 13:53:11 +00:00
Aaron Ballman d91b1edf7b Dump more information about construct expressions (resolved and unresolved) when dumping the AST to JSON.
llvm-svn: 363926
2019-06-20 13:19:41 +00:00
Simon Pilgrim 72186a2494 [SLP][X86] Add lookahead reordering tests from D60897
llvm-svn: 363925
2019-06-20 12:52:58 +00:00
Simon Pilgrim 98a0ac5c0f [DAGCombine] Add TODOs for some combines that should support non-uniform vectors
We tend to only test for scalar/scalar consts when really we could support non-uniform vectors using ISD::matchUnaryPredicate/matchBinaryPredicate etc.

llvm-svn: 363924
2019-06-20 12:48:49 +00:00
Michal Gorny d687fa7d02 [lldb] [Process/NetBSD] Remove unnecessary register buffer abstraction
Remove most of the abstraction over ptrace() register operations,
as it has little value and introduces more code than it saves.
Instead, leave a single ptrace() wrapper method and call it directly
from ReadRegisterSet() and WriteRegisterSet() with correct PT_* request
and buffer.

Remove the remaining direct ReadGPR() and WriteGPR() invocations
with ReadRegisterSet() and WriteRegisterSet().

Cleanup suggested by Pavel Labath in D63545.

Differential Revision: https://reviews.llvm.org/D63594

llvm-svn: 363923
2019-06-20 12:44:37 +00:00
Simon Pilgrim a4d705e0ef [X86] LowerAVXExtend - handle ANY_EXTEND_VECTOR_INREG lowering as well.
llvm-svn: 363922
2019-06-20 11:31:54 +00:00
Simon Pilgrim a487628270 [DAGCombine] Reduce scope of ShAmtVal variable. NFCI.
Fixes cppcheck warning.

Use the more capable getAPIntVal() instead of getZExtValue() as well since I'm here.

llvm-svn: 363921
2019-06-20 10:56:37 +00:00
Gauthier Harnisch e10a881c2b Revert "[clang] Fixing windows buildbot after D61552"
This reverts commit 5d5d2ca69e.

has already been fixed by c230eea2f3

llvm-svn: 363920
2019-06-20 10:34:02 +00:00
Gauthier Harnisch 5d5d2ca69e [clang] Fixing windows buildbot after D61552
Summary:
original review : https://reviews.llvm.org/D61552

build bot faillure : http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/110

this adds a missing definition of cxxDeductionGuideDecl.
surprisingly it was still working on linux with out it.

Reviewers: aaron.ballman

Differential Revision: https://reviews.llvm.org/D63592

llvm-svn: 363919
2019-06-20 10:27:14 +00:00
Fangrui Song 7064a437f8 [llvm-nm] Generalize ELF symbol types 'N' and 'n'
Reviewed By: grimar, jhenderson

Differential Revision: https://reviews.llvm.org/D63588

llvm-svn: 363918
2019-06-20 10:15:11 +00:00
Kadir Cetinkaya c230eea2f3 [clang][ASTMatchers] Add definition for cxxDeductionGuideDecl introduced in rL363855
llvm-svn: 363917
2019-06-20 10:13:58 +00:00
David Zarzycki f237c7d411 [Testing] Dumping the graph requires assertions be enabled
llvm-svn: 363916
2019-06-20 09:58:58 +00:00
Pavel Labath 5418d335e1 Fix -Wmismatched-tags introduced in r363910
That commit changed DIERef from a struct to a class, but did not update
the forward-declarations. This fixes one forward-declaration, and
removes other (unused) decls.

llvm-svn: 363915
2019-06-20 09:46:37 +00:00
Serge Guelton dad50a7458 [NFC] Update documentation for AtomicCmpXchgInst
Fix bz#42325

llvm-svn: 363914
2019-06-20 09:37:52 +00:00
Sjoerd Meijer e79b3cdc39 TargetParserTest.ARMExtensionFeatures run out of memory on 32-bit (PR42316)
Nothing of these tests made much sense. Loops were iterating too much, and I
also don't think it was actually testing anything. I think we simply want to
check that AEK_SOME_EXT returns "+some_ext".

I've given the AArch64 tests the same treatment as they very similarly didn't
made any sense either.

This fixes PR42316.

Differential Revision: https://reviews.llvm.org/D63569

llvm-svn: 363913
2019-06-20 09:33:11 +00:00
Petar Avramovic 153bd24eda [MIPS GlobalISel] Select integer to floating point conversions
Select G_SITOFP and G_UITOFP for MIPS32.

Differential Revision: https://reviews.llvm.org/D63542

llvm-svn: 363912
2019-06-20 09:05:02 +00:00
Petar Avramovic 4b4dae1c76 [MIPS GlobalISel] Select floating point to integer conversions
Select G_FPTOSI and G_FPTOUI for MIPS32.

Differential Revision: https://reviews.llvm.org/D63541

llvm-svn: 363911
2019-06-20 08:52:53 +00:00
Pavel Labath 0de98ebd00 DWARF: Provide accessors to DIERef fields
Summary:
Instead of accessing the fields directly, use accessor functions to
provide access to the DIERef components. This allows us to decouple the
external interface, from the internal representation. The external
interface can use llvm::Optional and similar goodies, while the data can
still be stored internally in a more compact representation.

I also document the purpose of the existing DIERef fields.

The main motivation for this change is a need to introduce an additional
field to the DIERef class, but I believe the change has its own merit.

Reviewers: JDevlieghere, aprantl, clayborg

Subscribers: arphaman, lldb-commits

Differential Revision: https://reviews.llvm.org/D63400

llvm-svn: 363910
2019-06-20 08:24:46 +00:00
Craig Topper 3ba20e943e [X86] Add test cases showing missed opportunities to use the C flag from the BLSI instruction to avoid a TEST instruction
llvm-svn: 363909
2019-06-20 06:45:01 +00:00
Puyan Lotfi d5d15b4c1f [clang][AST] Refactoring ASTNameGenerator to use pimpl pattern (NFC).
The original pimpl pattern used between CodegenNameGenerator and
CodegenNameGeneratorImpl did a good job of hiding DataLayout making it so that
users of CodegenNameGenerator did not need to link with llvm core.  This is an
NFC change to neatly wrap ASTNameGenerator in a pimpl.

Differential Revision: https://reviews.llvm.org/D63584

llvm-svn: 363908
2019-06-20 06:01:06 +00:00
Craig Topper b4ea64570c [X86] Remove memory instructions form isUseDefConvertible.
The caller of this is looking for comparisons of the input
to these instructions with 0. But the memory instructions
input is an addess not a value input in a register.

llvm-svn: 363907
2019-06-20 04:58:40 +00:00
Craig Topper 451f7feb64 [X86] Add v64i8/v32i16 to several places in X86CallingConv.td where they seemed obviously missing.
llvm-svn: 363906
2019-06-20 04:29:00 +00:00
Kostya Serebryany 27cf743bff [libFuzzer] ensure that DFT and autofocus works for C++ (mangled) functions
llvm-svn: 363905
2019-06-20 01:48:45 +00:00
Matt Arsenault c67c484f36 AMDGPU: Don't clobber VCC in MUBUF addr64 emulation
Introducing VCC defs during SIFixSGPRCopies is generally
problematic. Avoid it by starting with the VOP3 form with the general
condition register. This is the easiest to fix instance, but doesn't
solve any specific problems I'm looking at.

llvm-svn: 363904
2019-06-20 00:51:28 +00:00
Eli Friedman d88e28d13e [llvm-objdump] Switch between ARM/Thumb based on mapping symbols.
The ARMDisassembler changes allow changing between ARM and Thumb mode
based on the MCSubtargetInfo, rather than the Target, which simplifies
the other changes a bit.

I'm not really happy with adding more target-specific logic to
tools/llvm-objdump/, but there isn't any easy way around it: the logic
in question specifically applies to disassembling an object file, and
that code simply isn't located in lib/Target, at least at the moment.

Differential Revision: https://reviews.llvm.org/D60927

llvm-svn: 363903
2019-06-20 00:29:40 +00:00
Matt Arsenault e4c2e9b016 AMDGPU: Consolidate some getGeneration checks
This is incomplete, and ideally these would all be removed, but it's
better to localize them to the subtarget first with comments about
what they're for.

llvm-svn: 363902
2019-06-19 23:54:58 +00:00
Thomas Preud'homme a2ef1ba32f [FileCheck] Stop qualifying expressions as numeric
Summary:
Stop referring to "numeric expression", using simply the term
"expression" instead. Likewise for numeric operation since operations
are only used in numeric expressions.

Reviewers: jhenderson, jdenny, probinson, arichardson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63500

llvm-svn: 363901
2019-06-19 23:47:24 +00:00
Thomas Preud'homme baae41ff76 FileCheck: Return parse error w/ Error & Expected
Summary:
Make use of Error and Expected to bubble up diagnostics and force
checking of errors in the callers.

Reviewers: jhenderson, jdenny, probinson, arichardson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63125

llvm-svn: 363900
2019-06-19 23:47:10 +00:00
Matt Arsenault e24b34e9c9 AMDGPU: Undo sub x, c canonicalization for v2i16
Should avoid regression from D62341

llvm-svn: 363899
2019-06-19 23:37:43 +00:00
Artem Dergachev 5740e77f03 [analyzer] exploded-graph-rewriter: Implement a --diff mode.
In this mode the tool would avoid duplicating the contents of the
program state on every node, replacing them with a diff-like dump
of changes that happened on that node.

This is useful because most of the time we only interested in whether
the effect of the statement was modeled correctly. A diffed graph would
also be much faster to load and navigate, being much smaller than
the original graph.

The diffs are computed "semantically" as opposed to plain text diffs.
I.e., the diff algorithm is hand-crafted separately for every state trait,
taking the underlying data structures into account. This is especially nice
for Environment because textual diffs would have been terrible.
On the other hand, it requires some boilerplate to implement.

Differential Revision: https://reviews.llvm.org/D62761

llvm-svn: 363898
2019-06-19 23:33:59 +00:00
Artem Dergachev b50d167358 [analyzer] exploded-graph-rewriter: Fix escaping StringRegions.
Quotes around StringRegions are now escaped and unescaped correctly,
producing valid JSON.

Additionally, add a forgotten escape for Store values.

Differential Revision: https://reviews.llvm.org/D63519

llvm-svn: 363897
2019-06-19 23:33:55 +00:00
Artem Dergachev 064c8c689a [analyzer] Fix JSON dumps for store clusters.
Include a unique pointer so that it was possible to figure out if it's
the same cluster in different program states. This allows comparing
dumps of different states against each other.

Differential Revision: https://reviews.llvm.org/D63362

llvm-svn: 363896
2019-06-19 23:33:51 +00:00
Artem Dergachev f9f6cdb1a8 [analyzer] Fix JSON dumps for location contexts.
Location context ID is a property of the location context, not of an item
within it. It's useful to know the id even when there are no items
in the context, eg. for the purposes of figuring out how did contents
of the Environment for the same location context changed across states.

Differential Revision: https://reviews.llvm.org/D62754

llvm-svn: 363895
2019-06-19 23:33:48 +00:00
Artem Dergachev 3bb7b2ec7f [analyzer] Fix JSON dumps for dynamic type information.
They're now valid JSON.

Differential Revision: https://reviews.llvm.org/D62716

llvm-svn: 363894
2019-06-19 23:33:45 +00:00
Artem Dergachev 44820630df [analyzer] NFC: Change evalCall() to provide a CallEvent.
This changes the checker callback signature to use the modern, easy to
use interface. Additionally, this unblocks future work on allowing
checkers to implement evalCall() for calls that don't correspond to any
call-expression or require additional information that's only available
as part of the CallEvent, such as C++ constructors and destructors.

Differential Revision: https://reviews.llvm.org/D62440

llvm-svn: 363893
2019-06-19 23:33:42 +00:00
Artem Dergachev 3707b05211 [analyzer] DeadStores: Add a crude suppression files generated by DriverKit IIG.
IIG is a replacement for MIG in DriverKit: IIG is autogenerating C++ code.
Suppress dead store warnings on such code, as the tool seems to be producing
them regularly, and the users of IIG are not in position to address these
warnings, as they don't control the autogenerated code. IIG-generated code
is identified by looking at the comments at the top of the file.

Differential Revision: https://reviews.llvm.org/D63118

llvm-svn: 363892
2019-06-19 23:33:39 +00:00
Artem Dergachev b03854f8e8 [analyzer] RetainCount: Add support for OSRequiredCast().
It's a new API for custom RTTI in Apple IOKit/DriverKit framework that is
similar to OSDynamicCast() that's already supported, but crashes instead of
returning null (and therefore causing UB when the cast fails unexpectedly).
Kind of like cast_or_null<> as opposed to dyn_cast_or_null<> in LLVM's RTTI.

Historically, RetainCountChecker was responsible for modeling OSDynamicCast.
This is simply an extension of the same functionality.

Differential Revision: https://reviews.llvm.org/D63117

llvm-svn: 363891
2019-06-19 23:33:34 +00:00
Craig Topper 24151619a0 [X86] Correct the __min_vector_width__ attribute on a few intrinsics.
llvm-svn: 363890
2019-06-19 23:27:04 +00:00
Nathan Ridge 8df5f444a2 [clangd] Include the diagnostics's code when comparing diagnostics
Summary: This fixes https://github.com/clangd/clangd/issues/60

Reviewers: kadircet

Reviewed By: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D63316

llvm-svn: 363889
2019-06-19 23:11:02 +00:00
Matt Arsenault 532be255a5 AMDGPU: Add baseline test for vector sub x, c canonicalization
This will catch regressions from D62341, and show improvements from a
future patch to fix them.

llvm-svn: 363888
2019-06-19 22:37:08 +00:00
Simon Pilgrim 046d49a8dc [DAGCombine] Use ConstantSDNode::getAPIntValue() instead of getZExtValue().
Use getAPIntValue() in a few more places. Most of the time getZExtValue() is fine, but occasionally there's fuzzed code or someone decides to create i65536 or something.....

llvm-svn: 363887
2019-06-19 22:14:24 +00:00
Simon Atanasyan f61c43c636 [mips] Mark the `lwupc` instruction as MIPS64 R6 only
The "The MIPS64 Instruction Set Reference Manual" [1] states that
the `lwupc` is MIPS64 Release 6 only. It should not be supported
for 32-bit CPUs.

[1] https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

llvm-svn: 363886
2019-06-19 22:08:06 +00:00
Simon Atanasyan 0121432602 [mips] Add (GPR|PTR)_64 predicates to PseudoReturn64 and PseudoIndirectHazardBranch64
This patch is one of a series of patches. The goal is to make P5600
scheduler model complete and turn on the `CompleteModel` flag.

llvm-svn: 363885
2019-06-19 22:07:46 +00:00
Philip Reames 046f855758 [Util] Add a helper script for converting -print-before-all output into a file based equivelent
Simple little utility which takes a opt logfile generated with "opt -print-before-all -print-module-scope -o /dev/null <args> 2&>1", and splits into a series of individual "chunk-X.ll" files. The intended purpose is to help automate one step in failure reduction.

The imagined workflow is:

    New crasher bug reported against clang or other frontend
    Frontend run with -emit-llvm equivalent and manually confirmed that opt -O2 <emit.ll> crashes
    Run this splitter script
    Manually map pass name to invocation command (next on the to automate list)
    Run bugpoint on last chunk file + manual command

I chose to dump every chunk rather than only the last since miscompile debugging frequently requires either manual step by step reduction, or cross feeding IR into different compiler versions. Not an immediate target, but there may be applications.

Differential Revision: https://reviews.llvm.org/D63461

llvm-svn: 363884
2019-06-19 22:05:47 +00:00
Philip Reames eda1ba65ca LFTR for multiple exit loops
Teach IndVarSimply's LinearFunctionTestReplace transform to handle multiple exit loops. LFTR does two key things 1) it rewrites (all) exit tests in terms of a common IV potentially eliminating one in the process and 2) it moves any offset/indexing/f(i) style logic out of the loop.

This turns out to actually be pretty easy to implement. SCEV already has all the information we need to know what the backedge taken count is for each individual exit. (We use that when computing the BE taken count for the loop as a whole.) We basically just need to iterate through the exiting blocks and apply the existing logic with the exit specific BE taken count. (The previously landed NFC makes this super obvious.)

I chose to go ahead and apply this to all loop exits instead of only latch exits as originally proposed. After reviewing other passes, the only case I could find where LFTR form was harmful was LoopPredication. I've fixed the latch case, and guards aren't LFTRed anyways. We'll have some more work to do on the way towards widenable_conditions, but that's easily deferred.

I do want to note that I added one bit after the review.  When running tests, I saw a new failure (no idea why didn't see previously) which pointed out LFTR can rewrite a constant condition back to a loop varying one.  This was theoretically possible with a single exit, but the zero case covered it in practice.  With multiple exits, we saw this happening in practice for the eliminate-comparison.ll test case because we'd compute a ExitCount for one of the exits which was guaranteed to never actually be reached.  Since LFTR ran after simplifyAndExtend, we'd immediately turn around and undo the simplication work we'd just done.  The solution seemed obvious, so I didn't bother with another round of review.

Differential Revision: https://reviews.llvm.org/D62625

llvm-svn: 363883
2019-06-19 21:58:25 +00:00
Philip Reames 80eb1ce7a0 [Tests] Autogen a test so that future changes are understandable
llvm-svn: 363882
2019-06-19 21:39:07 +00:00
Alex Langford 86df61cc93 [Process] Remove unused field from HistoryThread
Summary:
These fields are unused and have been since their inception, from what
I can tell.

Reviewers: compnerd, JDevlieghere, davide, labath

Subscribers: kubamracek, lldb-commits

Differential Revision: https://reviews.llvm.org/D63357

llvm-svn: 363881
2019-06-19 21:33:44 +00:00
Alina Sbirlea 109d2ea153 [MemorySSA] Cleanup trivial phis.
Summary:
This is unfortunately needed for correctness, if we are to extend the tolerance of the update API to the way simple loop unswitch is doing cloning.

In simple loop unswitch (as opposed to loop unswitch), not all blocks are cloned. This can create unreachable cloned blocks (no predecessor), which are later cleaned up.

In MemorySSA, the  APIs for supporting these kind of updates (clone + update exit blocks), make certain assumption on the integrity of the CFG. When cloning, if something was not cloned, it's values in MemorySSA default to LiveOnEntry. When updating exit blocks, it is safe to assume that we can first insert phis in the blocks merging two clones, then add additional phis in the IDF of the blocks that received phis. This no longer holds true if one of the clones being merged comes from an unreachable block. We'd conservatively need to add all phis before filling in their incoming definitions. In practice this restriction can be relaxed if we clean up trivial phis after the first round of insertion.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63354

llvm-svn: 363880
2019-06-19 21:33:09 +00:00
Alina Sbirlea 238b8e62b6 [MemorySSA] Use GraphDiff info when computing IDF.
Summary:
When computing IDF for insert updates, ensure we use the snapshot CFG offered by GraphDiff.
Caught by D63389.

Reviewers: kuhar, george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits, Szelethus

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63443

llvm-svn: 363879
2019-06-19 21:17:31 +00:00