5 Commits

Author	SHA1	Message	Date
Dmitry Preobrazhensky	414e05383f	[AMDGPU][MC] Incorrect parsing of flat/global atomic modifiers ... See bug 35730: https://bugs.llvm.org/show_bug.cgi?id=35730 Differential Revision: https://reviews.llvm.org/D41598 Reviewers: vpykhtin, artem.tamazov, arsenm llvm-svn: 321552	2017-12-29 13:55:11 +00:00
Dmitry Preobrazhensky	dd2f1c993e	[AMDGPU][MC][GFX9] Added support of 'inst_offset' modifier for compatibility with SP3 ... See bug 35329: https://bugs.llvm.org//show_bug.cgi?id=35329 Reviewers: arsenm, vpykhtin, artem.tamazov Differential Revision: https://reviews.llvm.org/D40350 llvm-svn: 318947	2017-11-24 13:22:38 +00:00
Matt Arsenault	ed6e8f0a90	AMDGPU: Add most d16 load/store instruction definitions ... Doesn't include the tied operand necessary for the loads, but is enough for the assembler to work. llvm-svn: 312347	2017-09-01 18:36:06 +00:00
Matt Arsenault	04004716ff	AMDGPU: Correct encoding for global instructions ... The soffset field needs to be be set to 0x7f to disable it, not 0. 0 is interpreted as an SGPR offset. This should be enough to get basic usage of the global instructions working. Technically it is possible to use an SGPR_32 offset, but I'm not sure if it's correct with 64-bit pointers, but that is not handled now. This should also be cleaned up to be more similar to how different MUBUF modes are handled, and to have InstrMappings between the different types. llvm-svn: 308583	2017-07-20 05:17:54 +00:00
Matt Arsenault	fd02314113	AMDGPU: Start adding offset fields to flat instructions ... llvm-svn: 305194	2017-06-12 15:55:58 +00:00