Commit Graph

27367 Commits

Author SHA1 Message Date
Venkatraman Govindaraju f703132b09 [Sparc] Add support for decoding 'swap' instruction.
llvm-svn: 203424
2014-03-09 23:32:07 +00:00
Craig Topper 39012ccee9 [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203418
2014-03-09 18:03:14 +00:00
NAKAMURA Takumi 1783e1e984 Revert r203230, "CodeGenPrep: sink extends of illegal types into use block."
It choked i686 stage2.

llvm-svn: 203386
2014-03-09 11:01:07 +00:00
Craig Topper f5e3b0b98c De-virtualize some methods since they don't override anything.
llvm-svn: 203379
2014-03-09 07:58:15 +00:00
Craig Topper 2d9361e325 [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203378
2014-03-09 07:44:38 +00:00
Chandler Carruth cdf4788401 [C++11] Add range based accessors for the Use-Def chain of a Value.
This requires a number of steps.
1) Move value_use_iterator into the Value class as an implementation
   detail
2) Change it to actually be a *Use* iterator rather than a *User*
   iterator.
3) Add an adaptor which is a User iterator that always looks through the
   Use to the User.
4) Wrap these in Value::use_iterator and Value::user_iterator typedefs.
5) Add the range adaptors as Value::uses() and Value::users().
6) Update *all* of the callers to correctly distinguish between whether
   they wanted a use_iterator (and to explicitly dig out the User when
   needed), or a user_iterator which makes the Use itself totally
   opaque.

Because #6 requires churning essentially everything that walked the
Use-Def chains, I went ahead and added all of the range adaptors and
switched them to range-based loops where appropriate. Also because the
renaming requires at least churning every line of code, it didn't make
any sense to split these up into multiple commits -- all of which would
touch all of the same lies of code.

The result is still not quite optimal. The Value::use_iterator is a nice
regular iterator, but Value::user_iterator is an iterator over User*s
rather than over the User objects themselves. As a consequence, it fits
a bit awkwardly into the range-based world and it has the weird
extra-dereferencing 'operator->' that so many of our iterators have.
I think this could be fixed by providing something which transforms
a range of T&s into a range of T*s, but that *can* be separated into
another patch, and it isn't yet 100% clear whether this is the right
move.

However, this change gets us most of the benefit and cleans up
a substantial amount of code around Use and User. =]

llvm-svn: 203364
2014-03-09 03:16:01 +00:00
Duncan P. N. Exon Smith 429d2608f9 Change else if => if after return, after r203265
llvm-svn: 203347
2014-03-08 15:15:42 +00:00
Owen Anderson 8c1f17bb98 Range-ify some for loops.
llvm-svn: 203306
2014-03-07 22:48:22 +00:00
Eli Bendersky ab9da5129a Remove unused method declaration
llvm-svn: 203301
2014-03-07 22:19:10 +00:00
Tom Stellard e28859f8fa R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCC
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 203281
2014-03-07 20:12:39 +00:00
Tom Stellard 1c8788ef5a R600/SI: Custom lower i1 stores
These are sometimes created by the shrink to boolean optimization in the
globalopt pass.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 203280
2014-03-07 20:12:33 +00:00
Rafael Espindola 24a542fd5c Don't avoid cfi instructions on the bg/p.
The integrated assembler now works for ppc. Since this was the last use of the
bg/p predicate and Hal says that it is now dead, drop the predicate too.

llvm-svn: 203269
2014-03-07 19:04:12 +00:00
Ted Kremenek d9e9c72732 Remove dead 'break' (dominated by 'return').
llvm-svn: 203267
2014-03-07 18:54:08 +00:00
Ted Kremenek 0b01471694 Remove dead 'return'.
llvm-svn: 203265
2014-03-07 18:51:16 +00:00
Nico Weber ad15692061 "Mac OS/X" -> "Mac OS X" spelling fixes for llvm.
Patch from Sean McBride <sean@rogue-research.com>!

llvm-svn: 203258
2014-03-07 18:08:54 +00:00
Duncan P. N. Exon Smith 29db0eb855 ARM: Make .unreq directives case-insensitive
Be case-insensitive when processing .unreq directives.

Patch by Lin Zuojian!

llvm-svn: 203251
2014-03-07 16:16:52 +00:00
Richard Sandiford 95bc5f92ee [SystemZ] Move sign_extend optimization to PerformDAGCombine
The target was marking SIGN_EXTEND as Custom because it wanted to optimize
certain sign-extended shifts.  In all other respects the extension is Legal,
so it'd be better to do the optimization in PerformDAGCombine instead.

No functional change intended.

llvm-svn: 203234
2014-03-07 11:34:35 +00:00
Tim Northover ad3d81d320 CodeGenPrep: sink extends of illegal types into use block.
This helps the instruction selector to lower an i64 * i64 -> i128
multiplication into a single instruction on targets which support it.

Patch by Manuel Jacob.

llvm-svn: 203230
2014-03-07 11:04:30 +00:00
Tim Northover fad2761ca0 InstCombine: form shuffles from wider range of insert/extractelements
Sequences of insertelement/extractelements are sometimes used to build
vectorsr; this code tries to put them back together into shuffles, but
could only produce a completely uniform shuffle types (<N x T> from two
<N x T> sources).

This should allow shuffles with different numbers of elements on the
input and output sides as well.

llvm-svn: 203229
2014-03-07 10:24:44 +00:00
Alexey Volkov 1051f04a8d Enable FeatureFastUAMem for Silvermont processor
Differential Revision: http://llvm-reviews.chandlerc.com/D2982

llvm-svn: 203218
2014-03-07 09:03:49 +00:00
Alexey Volkov bb2f047346 Test commit
Removed whitespace

llvm-svn: 203216
2014-03-07 08:28:44 +00:00
David Majnemer 7b58305ff6 MC: Remove superfluous section attribute flag definitions
Summary:
llvm/MC/MCSectionMachO.h and llvm/Support/MachO.h both had the same
definitions for the section flags.  Instead, grab the definitions out of
support.

No functionality change.

Reviewers: grosbach, Bigcheese, rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2998

llvm-svn: 203211
2014-03-07 07:36:05 +00:00
Rafael Espindola b1f25f1b93 Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted:
* A temporary label was created.
* A single PROLOG_LABEL was created with it.
* A few MCCFIInstructions were created with the same label.

The semantics were that the cfi instructions were mapped to the PROLOG_LABEL
via the temporary label. The output position was that of the PROLOG_LABEL.
The temporary label itself was used only for doing the mapping.

The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to
one by holding an index into the CFI instructions of this function.

I did consider removing MMI.getFrameInstructions completelly and having
CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non
trivial constructors and destructors and are somewhat big, so the this setup
is probably better.

The net result is that we don't create temporary labels that are never used.

llvm-svn: 203204
2014-03-07 06:08:31 +00:00
Rafael Espindola 0233bf19fd Simplify. No functionality change.
llvm-svn: 203202
2014-03-07 04:58:32 +00:00
Rafael Espindola afeb01c0a7 Simplify. No functionality change.
llvm-svn: 203199
2014-03-07 04:45:03 +00:00
Saleem Abdulrasool 35476334e9 Support: split object format out of environment
This is a preliminary setup change to support a renaming of Windows target
triples.  Split the object file format information out of the environment into a
separate entity.  Unfortunately, file format was previously treated as an
environment with an unknown OS.  This is most obvious in the ARM subtarget where
the handling for macho on an arbitrary platform switches to AAPCS rather than
APCS (as per Apple's needs).

llvm-svn: 203160
2014-03-06 20:47:11 +00:00
Reid Kleckner 94a1c4d3f1 MS asm: The initial dot in struct access is optional
Fixes PR18994.

Tests, once again, in that other repository.  =P

llvm-svn: 203146
2014-03-06 19:19:12 +00:00
Matt Arsenault f9a995d68c R600: Fix extloads from i8 / i16 to i64.
This appears to only be working for global loads. Private
and local break for other reasons.

llvm-svn: 203135
2014-03-06 17:34:12 +00:00
Matt Arsenault 9fe669c522 R600/SI: Expand selects on vectors.
llvm-svn: 203134
2014-03-06 17:34:03 +00:00
Matt Arsenault e6ed1d796f Fix missing C++ mode comment
llvm-svn: 203133
2014-03-06 17:33:58 +00:00
Richard Osborne 47155af5eb [XCore] Add support for the "m" inline asm constraint.
Summary:
This provides support for CP and DP relative global accesses in inline
asm.

Reviewers: robertlytton

Reviewed By: robertlytton

Differential Revision: http://llvm-reviews.chandlerc.com/D2943

llvm-svn: 203129
2014-03-06 16:37:48 +00:00
Chad Rosier 86a8f72041 [AArch64] This is a work in progress to provide a machine description
for the Cortex-A53 subtarget in the AArch64 backend.

This patch lays the ground work to annotate each AArch64 instruction
(no NEON yet) with a list of SchedReadWrite types. The patch also
provides the Cortex-A53 processor resources, maps those the the default
SchedReadWrites, and provides basic latency. NEON support will be added
in a subsequent patch with proper forwarding logic.

Verification was done by setting the pre-RA scheduler to linearize to
better gauge the effect of the MIScheduler. Even without modeling the
forward logic, the results show a modest improvement for Cortex-A53.

Reviewers: apazos, mcrosier, atrick
Patch by Dave Estes <cestes@codeaurora.org>!

llvm-svn: 203125
2014-03-06 16:04:00 +00:00
Richard Sandiford b4d67b593e [SystemZ] Remove "virtual" from override methods
Also fix a couple of cases where "override" was missing.  No behavioural
change intended.

llvm-svn: 203110
2014-03-06 12:03:36 +00:00
Richard Sandiford 21f5d68a17 [SystemZ] Use "auto" for cast results
No functional change intended.

llvm-svn: 203106
2014-03-06 11:22:58 +00:00
Richard Sandiford 28c111ec8a [SystemZ] Use "for (auto" a bit
Just the simple cases for now.  There were a few knock-on changes of
MachineBasicBlock *s to MachineBasicBlock &s.  No functional change intended.

llvm-svn: 203105
2014-03-06 11:00:15 +00:00
Richard Sandiford c231269ff9 [SystemZ] Update namespace formatting to match current guidelines
No functional change intended.

llvm-svn: 203103
2014-03-06 10:38:30 +00:00
Elena Demikhovsky f7c1b16591 AVX-512: Added rrk, rrkz, rmk, rmkz, rmbk, rmbkz versions of AVX512 FP packed instructions, added encoding tests for them.
By Robert Khazanov.

llvm-svn: 203098
2014-03-06 08:45:30 +00:00
Elena Demikhovsky 8fae565f08 AVX-512: fixed comressed displacement - by Robert Khazanov
llvm-svn: 203096
2014-03-06 08:15:35 +00:00
Yaron Keren cf96c257f4 Cleaning up two more pre-Visual C++ 2012 build hacks.
llvm-svn: 203093
2014-03-06 08:05:43 +00:00
Chandler Carruth 7da14f1ab9 [Layering] Move InstVisitor.h into the IR library as it is pretty
obviously coupled to the IR.

llvm-svn: 203064
2014-03-06 03:23:41 +00:00
Hal Finkel 6daf2aa140 The PPC global base register cannot be r0
The global base register cannot be r0 because it might end up as the first
argument to addi or addis. Fixes PR18316.

I don't have a small stable test case.

llvm-svn: 203054
2014-03-06 01:28:23 +00:00
Chandler Carruth 9a4c9e597b [Layering] Move DebugInfo.h into the IR library where its implementation
already lives.

llvm-svn: 203046
2014-03-06 00:46:21 +00:00
Hal Finkel 7f908e8ef4 Fixup PPC Darwin i1 argument handling
Like on other targets, we need to zero_extend/truncate i1 args before copying
them to GPRs.

llvm-svn: 203045
2014-03-06 00:45:19 +00:00
Hal Finkel 2a9d318e4a When using CR bit registers on PPC32, handle the i1 vaarg case
When copying an i1 value into a GPR for a vaarg call, we need to explicitly
zero-extend the i1 value (otherwise an invalid CRBIT -> GPR copy will be
generated).

llvm-svn: 203041
2014-03-06 00:23:33 +00:00
Hal Finkel 6a56b21729 With PPC CR bit registers, handle int_to_fp on older cores
On cores without fpcvt support, we cannot promote int_to_fp i1 operations,
because there is nothing to promote them to. The most straightforward
implementation of this uses a select to choose between the two possible
resulting floating-point values (and that's what is done here).

llvm-svn: 203015
2014-03-05 22:14:00 +00:00
Matt Arsenault ca6dcfcf59 Fix typo
llvm-svn: 203013
2014-03-05 21:47:22 +00:00
Cameron McInally 791ae9927c Lower AVX v4i64->v4i32 truncate to one shuffle.
llvm-svn: 202996
2014-03-05 19:41:16 +00:00
David Blaikie 7f4a52eaee Fix clang -Werror build break due to mismatched sign comparison.
Originally committed in r202985.

llvm-svn: 202992
2014-03-05 18:53:36 +00:00
Oliver Stannard d55e115b58 ARM: Correctly align arguments after a byval struct is passed on the stack
llvm-svn: 202985
2014-03-05 15:25:27 +00:00
Joerg Sonnenberger cce644a633 Enable integrated assembler on OpenBSD/PPC32 by default, too.
From Brad Smith.

llvm-svn: 202967
2014-03-05 11:37:04 +00:00