Commit Graph

196 Commits

Author SHA1 Message Date
Dale Johannesen 08645f1991 Don't hoist things out of a large switch inside a
loop, for the reasons in the comments.  This is a
major win on 253.perlbmk on ARM Darwin.  I expect it
to be a good heuristic in general, but it's possible
some things will regress; I'll be watching.
7940152.

llvm-svn: 108792
2010-07-20 00:50:13 +00:00
Evan Cheng d542414945 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.
llvm-svn: 108304
2010-07-14 01:22:19 +00:00
Chris Lattner 0b7ae20a35 change machinelicm to use MachineInstr::isSafeToMove. No
intended functionality change.

The avoidance of hoistiing implicitdef seems wrong though.

llvm-svn: 108109
2010-07-12 00:00:35 +00:00
Dan Gohman 7929c448fc Fix MachineLICM to actually visit inner loops.
llvm-svn: 108001
2010-07-09 18:49:45 +00:00
Dan Gohman 3570f81b1e Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out
into a utility routine, teach it how to update MachineLoopInfo, and
make use of it in MachineLICM to split critical edges on demand.

llvm-svn: 106555
2010-06-22 17:25:57 +00:00
Evan Cheng 032f3261a2 Doh. Machine LICM is re-initializing the CSE map over and over. Patch by Anna Zaks. rdar://8037934.
llvm-svn: 105065
2010-05-29 00:06:36 +00:00
Dan Gohman c90f51c00b Teach MachineLICM and MachineSink how to clear kill flags conservatively
when they move instructions.

llvm-svn: 103737
2010-05-13 20:34:42 +00:00
Jakob Stoklund Olesen 011207a0ae When MachineLICM is hoisting a physical register after regalloc, make sure the
register is not killed in the loop.

This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.

A testcase would be huge and fragile, sorry.

llvm-svn: 101930
2010-04-20 18:45:47 +00:00
Evan Cheng 5fdb57cc10 Postra machine licm must add registers defined by loop invariants to *all* of
the live-in sets of BBs in the loop. Otherwise later pass may end up using the
registers and override the invariant. rdar://7852937
No reasonablly sized test case possible.

llvm-svn: 101626
2010-04-17 07:07:11 +00:00
Evan Cheng 87585d72a5 Fast path implicit_def check.
llvm-svn: 101183
2010-04-13 22:13:34 +00:00
Evan Cheng cce672c172 Avoid variable shadowing.
llvm-svn: 101170
2010-04-13 20:25:29 +00:00
Evan Cheng 89e74792b6 Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.
llvm-svn: 101167
2010-04-13 20:21:05 +00:00
Evan Cheng 0a2aff2d12 Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands.
llvm-svn: 101154
2010-04-13 18:16:00 +00:00
Dan Gohman 9d2d053e11 Eliminate MachineBasicBlock::const_livein_iterator and make
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.

llvm-svn: 101147
2010-04-13 16:57:55 +00:00
Benjamin Kramer d0b5c6cbed Plug trivial leak.
llvm-svn: 101034
2010-04-12 11:38:35 +00:00
Dan Gohman 87f8207c97 Delete this obsolete comment.
llvm-svn: 100858
2010-04-09 14:12:01 +00:00
Evan Cheng 058b9f04e8 Make post regalloc machine licm functional. It now passes all of MultiSource.
llvm-svn: 100742
2010-04-08 01:03:47 +00:00
Evan Cheng 5ed679282b Add comments for missed opportunities.
llvm-svn: 100610
2010-04-07 06:00:33 +00:00
Evan Cheng fcbcc0bd51 Fix typo.
llvm-svn: 100609
2010-04-07 05:59:12 +00:00
Evan Cheng 6ea5949a93 Post regalloc LICM. Work in progress.
llvm-svn: 100592
2010-04-07 00:41:17 +00:00
Evan Cheng e9c46c25a1 - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality.
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628
2010-03-03 01:44:33 +00:00
Dan Gohman 34021b7445 Don't try to replace physical registers when doing CSE.
llvm-svn: 97360
2010-02-28 01:33:43 +00:00
Dan Gohman 6fb6a59766 Don't unconditionally suppress hoisting of instructions with implicit
defs or uses. The regular def and use checking below covers them, and
can be more precise. It's safe to hoist an instruction with a dead
implicit def if the register isn't live into the loop header.

llvm-svn: 97352
2010-02-28 00:08:44 +00:00
Chris Lattner b06015aa69 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
David Greene 55cf95c202 Change errs() to dbgs().
llvm-svn: 92547
2010-01-05 00:03:48 +00:00
Dan Gohman 18fa5686f6 Add Loop contains utility methods for testing whether a loop
contains another loop, or an instruction. The loop form is
substantially more efficient on large loops than the typical
code it replaces.

llvm-svn: 91654
2009-12-18 01:24:09 +00:00
Evan Cheng 73f9a9e2c8 Enable hoisting load from constant memories.
llvm-svn: 89510
2009-11-20 23:31:34 +00:00
Evan Cheng b39a9fd3ed Add option -licm-const-load to hoist all loads from constant memory.
llvm-svn: 89477
2009-11-20 19:55:37 +00:00
Jakob Stoklund Olesen 2bbeaa8774 Add MachineBasicBlock::getName, and use it in place of getBasicBlock()->getName.
Fix debug code that assumes getBasicBlock never returns NULL.

llvm-svn: 89428
2009-11-20 01:17:03 +00:00
Evan Cheng 0229536301 Fix comment.
llvm-svn: 89129
2009-11-17 19:19:01 +00:00
Evan Cheng 7ff831962a - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
except it doesn't care if the definitions' virtual registers differ. This is
  used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
  Since pc relative constantpool entries are always different, this requires it
  it check if the values can actually the same.

llvm-svn: 86328
2009-11-07 03:52:02 +00:00
Evan Cheng 921152fe9d Code refactoring.
llvm-svn: 86085
2009-11-05 00:51:13 +00:00
Evan Cheng f42b5af549 Re-apply 85799. It turns out my code isn't buggy.
llvm-svn: 85947
2009-11-03 21:40:02 +00:00
Evan Cheng a8a58efc03 Revert 85799 for now. It might be breaking llvm-gcc driver.
llvm-svn: 85827
2009-11-02 21:49:14 +00:00
Evan Cheng 2729543984 Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.

llvm-svn: 85799
2009-11-02 08:09:49 +00:00
Dan Gohman 49fa51d936 Fix MachineLICM to use the correct virtual register class when
unfolding loads for hoisting.  getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.

llvm-svn: 85622
2009-10-30 22:18:41 +00:00
Dan Gohman 104f57cae8 Refactor the code for unfolding a load into a separate function.
llvm-svn: 85515
2009-10-29 17:47:20 +00:00
Dan Gohman 57780dfdfc Simplify this code: if the unfolded load can't be hoisted, just delete
the new instructions and leave the old one in place.

llvm-svn: 85393
2009-10-28 15:23:36 +00:00
Dan Gohman 1b44f10ff4 Teach MachineLICM to unfold loads from constant memory from
otherwise unhoistable instructions in order to allow the loads
to be hoisted.

llvm-svn: 85364
2009-10-28 03:21:57 +00:00
Nick Lewycky 974e12b2d3 Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.

llvm-svn: 85043
2009-10-25 06:57:41 +00:00
Nick Lewycky 02d5f77d26 Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.

llvm-svn: 85042
2009-10-25 06:33:48 +00:00
Dan Gohman 87b02d5bbc Factor out LiveIntervalAnalysis' code to determine whether an instruction
is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.

llvm-svn: 83687
2009-10-09 23:27:56 +00:00
Dan Gohman e19c1810d7 isTriviallyReMaterializable checks the
TargetInstrDesc::isRematerializable flag, so it isn't necessary to do
this check in its callers.

llvm-svn: 83671
2009-10-09 21:02:10 +00:00
Evan Cheng 7ddb844a2d Give Dan and my recent changes, machine LICM is now code size neutral.
llvm-svn: 83624
2009-10-09 06:31:25 +00:00
Evan Cheng ccd4545ecb Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
llvm-svn: 83622
2009-10-09 06:21:52 +00:00
Dan Gohman be8137b0b4 Replace TargetInstrInfo::isInvariantLoad and its target-specific
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475
2009-10-07 17:38:06 +00:00
Dan Gohman 2f5bdcb7c2 Don't hoist or sink instructions with physreg uses if the physreg is
allocatable. Even if it doesn't appear to have any defs, it may latter
on after register allocation.

llvm-svn: 82834
2009-09-26 02:34:00 +00:00
Dan Gohman e30d63f1d8 Unbreak MachineLICM for instructions that reference RIP on x86-64 too.
llvm-svn: 82825
2009-09-25 23:58:45 +00:00
Bill Wendling 8781b35be5 Convert DOUT to DEBUG(errs()...).
llvm-svn: 79754
2009-08-22 20:25:44 +00:00
Dan Gohman 7c50c9bd63 Tidy #includes.
llvm-svn: 78677
2009-08-11 16:02:12 +00:00
Daniel Dunbar 0dd5e1ed39 More migration to raw_ostream, the water has dried up around the iostream hole.
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
   "magic" DOUT behavior which avoided calling printing functions when the
   statement was disabled. In addition to being unnecessary magic, it had the
   downside of leaving code in -Asserts builds, and of hiding potentially
   unnecessary computations.

llvm-svn: 77019
2009-07-25 00:23:56 +00:00
Evan Cheng 8d0b4d4fd6 MachineLICM CSE should match destination register classes; avoid hoisting implicit_def's.
llvm-svn: 65592
2009-02-27 00:02:22 +00:00
Evan Cheng 9d8bfbfdef Machine LICM increases register pressure and it almost always increase code size. For now, disable it for optimizing for size.
llvm-svn: 63856
2009-02-05 08:51:13 +00:00
Evan Cheng 399660c384 Teach machine licm to CSE hoisted instructions.
llvm-svn: 63854
2009-02-05 08:45:46 +00:00
Evan Cheng 4ded601445 Don't call isInvariantLoad twice.
llvm-svn: 63729
2009-02-04 09:21:58 +00:00
Evan Cheng 1d9f7ac8cc Don't bother hoisting out a "cheap" instruction if all of its uses are PHIs. LICM "cheap" instructions are not particularly beneficial to start with. This will just end up making the copies harder to coalesce.
llvm-svn: 63728
2009-02-04 09:19:56 +00:00
Evan Cheng 0649abdfe2 For now, only hoist re-materilizable instructions. LICM will increase register pressure. We want to avoid spilling more instructions if it's possible.
llvm-svn: 63725
2009-02-04 07:17:49 +00:00
Dan Gohman 79618d1de8 Simplify the MachineLICM pass by having it only traverse outer
loops, hoisting instructions all the way out in one step rather
than hoisting them one nest level at a time. Also, make a few
other code simplifications. This speeds up MachineLICM
by several fold.

llvm-svn: 62283
2009-01-15 22:01:38 +00:00
Dan Gohman 906152a20f Tidy up #includes, deleting a bunch of unnecessary #includes.
llvm-svn: 61715
2009-01-05 17:59:02 +00:00
Dan Gohman 072e52f170 Use isTerminator() instead of isBranch()||isReturn() in
several places. isTerminator() returns true for a superset
of cases, and includes things like FP_REG_KILL, which are
nither return or branch but aren't safe to move/remat/etc.

llvm-svn: 61373
2008-12-23 17:28:50 +00:00
Dan Gohman 83682a9441 Give MachineLICM a name, for -time-passes etc.
llvm-svn: 61184
2008-12-18 01:37:56 +00:00
Dan Gohman 0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Bill Wendling 58bb4f1bf0 Cosmetic changes to Machine LICM. No functionality change.
llvm-svn: 55578
2008-08-31 02:30:23 +00:00
Bill Wendling cd01e89852 Don't hoist instructions that define a physical register.
llvm-svn: 55074
2008-08-20 20:32:05 +00:00
Bill Wendling cf596eb12f Don't hoist instructions that have implicit uses or defines. Before, it was
hoisting out some "test" and "cmp" instructions. This was obvious badness.

llvm-svn: 54908
2008-08-18 00:33:49 +00:00
Bill Wendling ecf34435f4 Prevent option name conflict.
llvm-svn: 53166
2008-07-07 05:42:27 +00:00
Dan Gohman d78c400b5b Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Bill Wendling 2930845065 Revert the previous commit. Go ahead and hoist rematerializable instructions.
llvm-svn: 50990
2008-05-12 19:47:18 +00:00
Bill Wendling 70613b84da One real change - don't hoist something that's trivially rematerializable. It's
possible for it to produce worse code than before.

The rest of this patch is code cleanup.

llvm-svn: 50987
2008-05-12 19:38:32 +00:00
Bill Wendling 2823eaebe8 Minor cleanup. No functionality change.
llvm-svn: 48142
2008-03-10 08:13:01 +00:00
Bill Wendling d7a258d325 Rename PrintableName to Name.
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
Bill Wendling c24ea4fb41 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Dan Gohman 3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Chris Lattner c8226f32e9 Simplify the side effect stuff a bit more and make licm/sinking
both work right according to the new flags.

This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad. 

It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags.  Now the clients
can decide everything they need.

I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.

llvm-svn: 45843
2008-01-10 23:08:24 +00:00
Chris Lattner 03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Bill Wendling 3bf5603ce4 Add that this preserves some analyses.
llvm-svn: 45573
2008-01-04 08:48:49 +00:00
Bill Wendling 66470d02c3 Move option to enable machine LICM into LLVMTargetMachine.cpp.
llvm-svn: 45572
2008-01-04 08:11:03 +00:00
Bill Wendling d865697016 Call the parent's getAnalysisUsage.
llvm-svn: 45571
2008-01-04 07:50:05 +00:00
Chris Lattner b5c1d9b7da remove dead #includes and reorder the rest.
llvm-svn: 45569
2008-01-04 06:41:45 +00:00
Bill Wendling 0ba4184404 Use the correct MachineRegisterInfo object.
llvm-svn: 45499
2008-01-02 21:10:54 +00:00
Bill Wendling f0b37780ca Remove dead code.
llvm-svn: 45496
2008-01-02 20:47:37 +00:00
Bill Wendling 5da1945cdd Use the new architecture to get the containing machine basic block for a machine
instruction. Also, use "splice" to move the new instruction instead of
remove/insert (where it was leaking memory anyway).

llvm-svn: 45492
2008-01-02 19:32:43 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Bill Wendling 65c001e6bc Updated comments to reflect what "side effects" means in this situation.
llvm-svn: 45245
2007-12-20 01:08:10 +00:00
Bill Wendling 166f746246 Add debugging info. Use the newly created "hasUnmodelledSideEffects" method.
llvm-svn: 45178
2007-12-18 21:38:04 +00:00
Bill Wendling 38236ef6cb Need to grow the indexed map. Added debug statements.
llvm-svn: 44892
2007-12-11 23:27:51 +00:00
Bill Wendling 642e15a7cb Simplify slightly.
llvm-svn: 44881
2007-12-11 22:22:22 +00:00
Bill Wendling b678ae7c38 Blark! How in the world did this work without this?!
llvm-svn: 44874
2007-12-11 19:40:06 +00:00
Bill Wendling 7717a8a37d - Update the virtual reg to machine instruction map when hoisting.
- Fix subtle bug when creating initially creating this map.

llvm-svn: 44873
2007-12-11 19:17:04 +00:00
Bill Wendling 5143d898c8 Checking for "zero operands" during the "CanHoistInst()" method isn't necessary
because those with side effects will be caught by other checks in here.

Also, simplify the check for a BB in a sub loop.

llvm-svn: 44871
2007-12-11 18:45:11 +00:00
Bill Wendling 3f19dfe794 Reverting 44702. It wasn't correct to rename them.
llvm-svn: 44727
2007-12-08 23:58:46 +00:00
Bill Wendling 2b07d8c5a0 Renaming:
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
2007-12-08 07:17:56 +00:00
Bill Wendling 4375173ba0 Incorporated comments from Evan and Chris:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html

llvm-svn: 44696
2007-12-08 01:47:01 +00:00
Bill Wendling fb706bc52b Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
2007-12-07 21:42:31 +00:00