23a419f361
Use _exit rather than exit in the child process after a failed exec.
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Add a comment explaining why.
llvm-svn: 78128
2009-08-05 00:09:12 +00:00
337b124a24
Make ExecutionEngine::updateGlobalMapping(GV, NULL) properly remove GV's old
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address from the reverse mapping, and add a test that this works now.
llvm-svn: 78127
2009-08-04 23:53:16 +00:00
7cc6aca1e6
Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
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llvm-svn: 78126
2009-08-04 23:47:55 +00:00
d918649d5f
Privatize the VectorType uniquing.
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llvm-svn: 78125
2009-08-04 23:47:44 +00:00
542cffc3eb
Begin the process of privatizing the type uniquing tables. No API changes yet, but there will be in the near future.
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llvm-svn: 78122
2009-08-04 23:33:01 +00:00
298bce2aa9
Check for !isa<Constant> instead of isa<Instruction>. This
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matches what the comment says, and it avoids spurious BitCast
instructions for Argument values.
llvm-svn: 78121
2009-08-04 23:23:56 +00:00
6faa1d2f8f
Follow Unix behavior and return 127 if the command is not found,
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and 126 if it is not executable.
llvm-svn: 78120
2009-08-04 23:15:49 +00:00
694285ca6d
revert r78048, it isn't worth using assertingvh here.
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llvm-svn: 78119
2009-08-04 23:07:12 +00:00
83c917a627
Update CMakeLists.
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llvm-svn: 78118
2009-08-04 23:02:53 +00:00
9b67698574
It helps if I remember to actually add the file...
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llvm-svn: 78116
2009-08-04 22:55:26 +00:00
afd0c4cd56
Factor some of the constants+context related code out into a separate header, to make LLVMContextImpl.h
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not hideous. Also, fix some MSVC compile errors.
llvm-svn: 78115
2009-08-04 22:41:48 +00:00
a8720101b5
Replace dregsingle operand modifier with explicit escaped curly brackets.
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For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.
llvm-svn: 78109
2009-08-04 21:39:33 +00:00
0e0b5405f5
Clean up the handling of two-address operands in RegScavenger.
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This fixes PR4528.
llvm-svn: 78107
2009-08-04 21:30:30 +00:00
86cdcdc3d2
Don't give implicit machine operands special treatment in the register scavenger.
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Imp-def is *not* allowed to redefine a live register.
Imp-use is *not* allowed to use a dead register.
llvm-svn: 78106
2009-08-04 21:29:11 +00:00
f2dbd2e205
Restlyize to match other targets, fixes cmake build to boot.
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llvm-svn: 78105
2009-08-04 21:27:06 +00:00
783b65b546
Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
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llvm-svn: 78104
2009-08-04 21:12:13 +00:00
cd450bbbe5
remove a random reference to subtarget. Even without this, we
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still get "intel syntax" instructions from llc with
-x86-asm-syntax=intel
llvm-svn: 78103
2009-08-04 21:12:08 +00:00
30bf625ac2
Add NEON single-precision FP support for fabs and fneg.
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llvm-svn: 78101
2009-08-04 20:39:05 +00:00
8b6be17777
When exec() fails, return 127 instead of errno; the parent process has no way to
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distinguish that the result is errno, so it can't use it to provide more
information about the error (it also exposes the numeric value of errno).
llvm-svn: 78098
2009-08-04 20:32:25 +00:00
1584a29536
Privatize the last bit of Constant-creation state.
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llvm-svn: 78097
2009-08-04 20:25:11 +00:00
16dc0cd8a2
rip out SectionEndDirectiveSuffix support, only uses by
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the masm backend. If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.
llvm-svn: 78096
2009-08-04 20:09:41 +00:00
f465f06aa4
Don't tamper with <undef> operands in MachineInstr::addRegisterKilled.
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For an undef operand, MO.getReg() is meaningless and we should not use it.
Undef operands should be skipped entirely.
llvm-svn: 78095
2009-08-04 20:09:25 +00:00
6304369c4e
LowerSubregsInstructionPass::LowerExtract should not extend the live range of registers.
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When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the
kill flag to the place where the sub-register is killed. This can accidentally
overlap with the use of a sibling sub-register, and we have trouble.
In the test case we have this code:
Live Ins: %R0 %R1 %R2
%R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
%R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
%R1L<def> = EXTRACT_SUBREG %R1<kill>, 1
%R0L<def> = EXTRACT_SUBREG %R0<kill>, 1
%R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>
subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: eliminated!
subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>
The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H:
*** Bad machine code: Redefining a live physical register ***
- function: f
- basic block: 0x18358c0 (#0 )
- instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
Register R2H was defined but already live.
The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating
it completely:
subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill>
Note that these IMPLICIT_DEF instructions survive to the asm output. It is
necessary to fix the stack-color-with-reg test case because of that.
llvm-svn: 78093
2009-08-04 20:01:11 +00:00
3c2a1dea71
Enforce stricter rules in machine code verifier.
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Implicit operands no longer get a free pass: Imp-use requires a live register
and imp-def requires a dead register.
There is also no special rule allowing redefinition of a sub-register when the
super-register is live. The super register must have imp-kill+imp-def operands
instead.
llvm-svn: 78090
2009-08-04 19:18:01 +00:00
d302ab9961
Most flags are reserved registers on Blackfin.
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The only exception is CC.
llvm-svn: 78089
2009-08-04 19:16:55 +00:00
a3abe2a7ce
In thumb mode, r7 is used as frame register. This fixes pr4681.
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llvm-svn: 78086
2009-08-04 18:46:17 +00:00
a3839bc6c0
Match common pattern for FNMAC. Add NEON SP support.
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llvm-svn: 78085
2009-08-04 18:44:29 +00:00
b4c28d23e1
Legalize i64 store operations generated by inst-combine.
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llvm-svn: 78082
2009-08-04 17:59:16 +00:00
3b9c52c5c1
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
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llvm-svn: 78081
2009-08-04 17:53:06 +00:00
206ee96bd6
Fix PR4528. This scavenger assertion is too strict. The two-address value is
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killed by another operand.
There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.
llvm-svn: 78072
2009-08-04 16:52:44 +00:00
ed65bf420d
Avoid compiler warning (in -Asserts mode)
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llvm-svn: 78070
2009-08-04 16:46:12 +00:00
f222054df7
enhance codegen to put 16-bit character strings into the
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__TEXT,__ustring section on darwin.
llvm-svn: 78068
2009-08-04 16:27:13 +00:00
eee9df0e97
fix a fixme: don't create an explicit "CStringSection" for ELF,
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it is just being used as a prefix, so forward substitute it directly.
llvm-svn: 78067
2009-08-04 16:19:50 +00:00
81bbf443fe
Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
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section on ELF targets.
llvm-svn: 78066
2009-08-04 16:13:09 +00:00
d0a53d380a
Ooops, I was too fast to commit the wrong fix :(
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llvm-svn: 78060
2009-08-04 11:18:31 +00:00
3c5b68e2a7
Fix a typo - this unbreaks llvm-gcc build on arm
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llvm-svn: 78059
2009-08-04 11:12:51 +00:00
3870fbb561
Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm.
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llvm-svn: 78057
2009-08-04 08:34:18 +00:00
05eb617da5
Use separate ValueList for metadata.
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This fixes PR4666.
llvm-svn: 78056
2009-08-04 06:00:18 +00:00
b58dc1c667
make MergeableCString be a SectionKind "abstract class", and
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add new concrete versions for 1/2/4-byte mergable strings.
These are not actually created yet.
llvm-svn: 78055
2009-08-04 05:35:56 +00:00
8cca7b4abe
Revert recent bitcode writer patches.
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llvm-svn: 78053
2009-08-04 05:01:35 +00:00
59c08e76ca
switch ValueMap to using AssertingVH. This is an old patch I had laying
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around in a tree I forgot about.
llvm-svn: 78048
2009-08-04 04:31:02 +00:00
ad9a6c4855
No really, it's unused.
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llvm-svn: 78047
2009-08-04 04:08:40 +00:00
09c1d0002b
Remove now unused Module argument to createTargetMachine.
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llvm-svn: 78043
2009-08-04 04:02:45 +00:00
4314b1dc01
Remove dead code.
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llvm-svn: 78035
2009-08-04 02:54:15 +00:00
b299790411
Fix MDString Abbrev setup.
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llvm-svn: 78034
2009-08-04 02:36:39 +00:00
8abe6bc291
Constants and Metadata share ValueList. This means they must be emitted interleaved (using appropriate BLOCK_IDs) otherwise ValuePtrs index gets out of sync.
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llvm-svn: 78033
2009-08-04 02:26:56 +00:00
f43cf709cb
Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler.
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llvm-svn: 78032
2009-08-04 01:56:09 +00:00
71756e789b
Load / store multiple pass fixes for Thumb2. Not enabled yet.
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llvm-svn: 78031
2009-08-04 01:43:45 +00:00
03eb0e3c33
Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
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llvm-svn: 78030
2009-08-04 01:41:15 +00:00
f45dee3ad2
Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the
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results to fixed registers.
llvm-svn: 78025
2009-08-04 00:36:16 +00:00
Dan Gohman