Commit Graph

164242 Commits

Author SHA1 Message Date
Clement Courbet cdb0eb88e3 Fix compilation under pre-c++14 gccs.
llvm-svn: 332346
2018-05-15 12:38:06 +00:00
Clement Courbet 7b19ffcc01 Fix r332344: only the native target is linked.
llvm-svn: 332345
2018-05-15 12:27:36 +00:00
Clement Courbet 37f0ca0328 [llvm-exegesis] Add an analysis mode.
Summary:
The analysis mode gives the user a clustered view of the measurement results.
Next steps are (requires the split ok AsmTemplate.Name into {mnemonic, mode}):
 - Show the sched class.
 - Highlight any inconsistencies with the checked-in data.

Reviewers: gchatelet

Subscribers: mgorny, llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D46865

llvm-svn: 332344
2018-05-15 12:08:00 +00:00
whitequark 8f0ab258bd [MergeFunctions] Fix merging of small weak functions
When two interposable functions are merged, we cannot replace
uses and have to emit calls to a common internal function. However,
writeThunk() will not actually emit a thunk if the function is too
small. This leaves us in a broken state where mergeTwoFunctions
already rewired the functions, but writeThunk doesn't do anything.

This patch changes the implementation so that:

 * writeThunk() does just that.
 * The direct replacement of calls is moved into mergeTwoFunctions()
   into the non-interposable case only.
 * isThunkProfitable() is extracted and will be called for
   the non-iterposable case always, and in the interposable case
   only if uses are still left after replacement.

This issue has been introduced in https://reviews.llvm.org/D34806,
where the code for checking thunk profitability has been moved.

Differential Revision: https://reviews.llvm.org/D46804

Reviewed By: whitequark

llvm-svn: 332342
2018-05-15 11:31:07 +00:00
Simon Dardis ce5d3d657a [mips] Fix formatting of floating point conversion patterns
llvm-svn: 332341
2018-05-15 11:21:07 +00:00
Simon Dardis aa6bdba0ca [mips] Add disassembly support for comparison instructions
llvm-svn: 332340
2018-05-15 11:18:24 +00:00
Simon Dardis b79ecec20d [mips] Fix predicates of mfc1, mtc1 instructions
Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46692

llvm-svn: 332339
2018-05-15 11:10:30 +00:00
Andrea Di Biagio 904684cf5c [llvm-mca] Remove unused include header files. NFC
Also, run clang-format on RetireControlUnit.cpp.

llvm-svn: 332337
2018-05-15 10:30:39 +00:00
Artur Gainullin 243a3d56d8 [X86] Improve unsigned saturation downconvert detection.
Summary:
New unsigned saturation downconvert patterns detection was implemented in
X86 Codegen:

(truncate (smin (smax (x, C1), C2)) to dest_type),
where C1 >= 0 and C2 is unsigned max of destination type.

(truncate (smax (smin (x, C2), C1)) to dest_type)
where C1 >= 0, C2 is unsigned max of destination type and C1 <= C2.
These two patterns are equivalent to:

(truncate (umin (smax(x, C1), unsigned_max_of_dest_type)) to dest_type)

Reviewers: RKSimon

Subscribers: llvm-commits, a.elovikov

Differential Revision: https://reviews.llvm.org/D45315

llvm-svn: 332336
2018-05-15 10:24:12 +00:00
Andrea Di Biagio e2492c860a [llvm-mca] Add file header to RetireControlUnit.cpp.
Strictly speaking, this is not necessary for .cpp files. However, other .cpp
files from this same tool have it. This also matches what we do in other tools.

llvm-svn: 332334
2018-05-15 09:31:32 +00:00
Clement Courbet 559d1e34df [llvm-exegesis] InMemoryAssembler: handle return-less targets (e.g. arm).
Summary: Arm does not have a ret code per se.

Reviewers: gchatelet

Subscribers: mgorny, javed.absar, kristof.beyls, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D45672

llvm-svn: 332331
2018-05-15 07:40:21 +00:00
Clement Courbet 27d4ca2df9 [llvm-exegesis] Check perf event validity.
This was part of https://reviews.llvm.org/D46821.

Authored by Guillaume Chatelet

llvm-svn: 332330
2018-05-15 07:35:21 +00:00
Martin Storsjo 11adbacac8 [llvm-rc] Add support for parsing memory flags
Most of the handling is pretty straightforward; fetch the default
memory flags for the specific resource type before parsing the flags
and apply them on top of that, except that some flags imply others
and some flags clear more than one flag.

For icons and cursors, the flags set get passed on to all individual
single icon/cursor resources, while only some flags affect the icon/cursor
group resource.

For stringtables, the behaviour is pretty simple; the first stringtable
resource of a bundle sets the flags for the whole bundle.

The output of these tests match rc.exe byte for byte.

The actual use of these memory flags is deprecated and they have no
effect since Win16, but some resource script files may still happen
to have them in place.

Differential Revision: https://reviews.llvm.org/D46818

llvm-svn: 332329
2018-05-15 06:35:29 +00:00
Martin Storsjo 860e5fcdf4 [llvm-rc] Read the Planes/BitCount fields from BITMAPINFOHEADER for icons
Previously these fields were only read from this header for cursors,
while Planes was hardcoded to 1 for icons (with a comment that it was
unknown why this was needed) and BitCount was left at the value
read originally in the RESDIRENTRY.

This fixes the single byte that was differing for the icon/cursor test
compared to rc.exe.

This is based on research/testing by Nico Weber.

Differential Revision: https://reviews.llvm.org/D46816

llvm-svn: 332328
2018-05-15 06:35:20 +00:00
Craig Topper fadf8b8dec [X86] Add fast isel tests for some of the avx512 truncate intrinsics to match current clang codegen.
llvm-svn: 332326
2018-05-15 04:26:27 +00:00
JF Bastien 9f62b4c8a8 [NFC] pull a function into its own lambda
As requested in D46858, pulling this function into its own lambda makes it
easier to read that part of the code and reason as to what's going on because
the scope it can be called from is extremely limited. We want to keep it as a
function because it's called from the two subsequent lines.

llvm-svn: 332325
2018-05-15 04:23:48 +00:00
JF Bastien 93bce5108b [NFC] Update comments
Don't prepend function or data name before each comment. Split into its own NFC patch as requested in D46858.

llvm-svn: 332323
2018-05-15 04:06:28 +00:00
Craig Topper 60ff7dab00 [X86] Revert part of r332267: Remove GCCBuiltin from the intrinsics that clang stopped using in r332266.
The masking of instructions that produce byte or word elements doesn't work right without avx512bw since the generic i8/i16 select won't be legal in the SelectionDAG.

llvm-svn: 332321
2018-05-15 03:17:05 +00:00
Shiva Chen 3969425081 [RISCV] Define FeatureRelax and shouldForceRelocation for RISCV linker relaxation
1. Deine FeatureRelax to enable/disable linker relaxation.

2. Define shouldForceRelocation to preserve relocation types even if the fixup
   can be resolved when linker relaxation enabled. This is necessary for
   correctness as offsets may change during relaxation.

Differential Revision: https://reviews.llvm.org/D46674

llvm-svn: 332318
2018-05-15 01:28:50 +00:00
Max Kazantsev 9b90373c8b [NFC] Add const to method signature
llvm-svn: 332317
2018-05-15 01:21:56 +00:00
Sam Clegg ed56629871 Fix debug build by adding missing dependencies on libBinaryFormat
Debug BUILD_SHARED_LIBS build was broken by rL332305

Differential Revision: https://reviews.llvm.org/D46859

llvm-svn: 332315
2018-05-15 00:46:43 +00:00
Vedant Kumar 595ba1d548 [Debugify] Add -debugify-each for testing each pass in a pipeline
This adds a -debugify-each mode to opt which, when enabled, wraps each
{Module,Function}Pass in a pipeline with logic to add, check, and strip
synthetic debug info for testing purposes.

This mode can be used to test complex pipelines for debug info bugs, or
to collect statistics about the number of debug values & locations lost
throughout various stages of a pipeline.

Patch by Son Tuan Vu!

Differential Revision: https://reviews.llvm.org/D46525

llvm-svn: 332312
2018-05-15 00:29:27 +00:00
Keno Fischer 8248d7c661 [CommandLine] Error message for incorrect PositionalEatArgs usage
Summary:
bugpoint has several options specified as `PositionalEatArgs` to pass
options through to the underlying tool, e.g. `-tool-args`. The `-help`
message suggests the usage is: `-tool-args=<string>`. However, this is
misleading, because that's not how these arguments work. Rather than taking
a value, the option consumes all positional arguments until the next
recognized option (or all arguments if `--` is specified at some point).
To make this slightly clearer, instead print the help as:
```
  -tool-args <string>...                            - <tool arguments>...
```
Additionally, add an error if the user attempts to use a `PositionalEatArgs`
argument with a value, instead of silently ignoring it. Example:
```
./bin/bugpoint -tool-args=-mpcu=skylake-avx512
bugpoint: for the -tool-args option: This argument does not take a value.
    Instead, it consumes any positional arguments until the next recognized option.
```

Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D46787

llvm-svn: 332311
2018-05-14 23:26:06 +00:00
Sam Clegg 5f87ab336e [WebAssembly] Move toString helpers to BinaryFormat
Subscribers: dschuff, mgorny, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46847

llvm-svn: 332305
2018-05-14 22:42:07 +00:00
Brian Gesiak ed5b3255f0 Revert "[Option] Fix PR37006 prefix choice in findNearest"
Summary:
This revision causes build failures in PS4 and ppc64le buildbots (for example,
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/29988).
I'll revert for now and try to diagnose the issue.

Test Plan: check-llvm check-clang

llvm-svn: 332304
2018-05-14 22:36:47 +00:00
Keno Fischer de577af8c0 [InstCombine] fix crash due to ignored addrspacecast
Summary:
Part of the InstCombine code for simplifying GEPs looks through
addrspacecasts. However, this was done by updating a variable
also used by the next transformation, for marking GEPs as
inbounds. This led to replacing a GEP with a similar instruction
in a different addrspace, which caused an assertion failure in RAUW.

This caused julia issue https://github.com/JuliaLang/julia/issues/27055

Patch by Jeff Bezanson <jeff@juliacomputing.com>

Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D46722

llvm-svn: 332302
2018-05-14 22:05:01 +00:00
Sanjay Patel 165587b424 [AArch64] enhance test to show FMF loss; NFC
llvm-svn: 332301
2018-05-14 21:53:21 +00:00
Brian Gesiak eda977f414 [Option] Fix PR37006 prefix choice in findNearest
Summary:
In https://bugs.llvm.org/show_bug.cgi?id=37006 Nico Weber points out a
flaw in `OptTable::findNearest`: if an option "foo"'s prefixes are "--"
and "-", then the nearest option for "--fob" will be "-foo". This is
incorrect, however, since the function is expected to return "--foo".

The bug is due to a naive loop that attempts to predetermines which
prefix is best. Instead, compute the edit distance for each prefix/name
pair.

Test Plan: `check-llvm`

Reviewers: thakis

Reviewed By: thakis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46776

llvm-svn: 332299
2018-05-14 21:35:00 +00:00
Martin Storsjo ace7ae935f [ARM] Back up R4 and LR if calling the stack probe function
Differential Revision: https://reviews.llvm.org/D46777

llvm-svn: 332298
2018-05-14 21:32:52 +00:00
Martin Storsjo 5556841cd3 [llvm-rc] Add missing inputs for tag-icon-cursor.test.
This adds the missing input files used for this test, except for
the separate input files for specific error cases; matching
test input files were provided by Nico Weber.

The extra copying of files into the %t directory doesn't seem to
be necessary since that directory only ever is used for output here,
not for inputs.

Differential Revision: https://reviews.llvm.org/D46813

llvm-svn: 332297
2018-05-14 21:32:47 +00:00
Brock Wyma 3db2b108c3 [CodeView] Improve debugging of virtual base class member variables
Initial support for passing the virtual base pointer offset to CodeViewDebug.

https://reviews.llvm.org/D46271

llvm-svn: 332296
2018-05-14 21:21:22 +00:00
Sanjay Patel 4c8a67a229 [PowerPC] add more tests for FMF propagation; NFC
llvm-svn: 332295
2018-05-14 21:17:49 +00:00
Krzysztof Parzyszek 44e180ba89 [Hexagon] Add a target feature to control using small data section
llvm-svn: 332292
2018-05-14 21:01:56 +00:00
Krzysztof Parzyszek f66f7612bf [Hexagon] Add a target feature for generating new-value stores
llvm-svn: 332290
2018-05-14 20:41:04 +00:00
Paul Robinson 5f53f07b66 [DWARF] Factor out a DWARFUnitHeader class. NFC
Extract information related to a "unit header" from DWARFUnit into a
new DWARFUnitHeader class, and add a DWARFUnit member for the header.
This is one step in the direction of allowing type units in the
.debug_info section for DWARF v5.

Differential Revision: https://reviews.llvm.org/D46707

llvm-svn: 332289
2018-05-14 20:32:31 +00:00
Krzysztof Parzyszek 771f2422d0 [Hexagon] Add a target feature for memop generation
llvm-svn: 332285
2018-05-14 20:09:07 +00:00
Sid Manning d9f2873511 Hexagon: Put relocations after instructions not packets.
Change relocation output so that relocation information follows
individual instructions rather than clustering them at the end
of packets.

This change required shifting block of code but the actual change
is in HexagonPrettyPrinter's PrintInst.

Differential Revision: https://reviews.llvm.org/D46728

llvm-svn: 332283
2018-05-14 19:46:08 +00:00
Nico Weber 9668e45b61 Inline a few CMake variables into their only uses.
No behavior change. Makes unittests CMakeLists.txt files more self-consistent.

llvm-svn: 332280
2018-05-14 19:23:31 +00:00
Nico Weber 38f8b9c882 Remove a workaround that should be unneeded after r202806.
llvm-svn: 332278
2018-05-14 19:13:23 +00:00
Simon Pilgrim 215ce4a1ca [X86] Add NT load/store scheduler classes
llvm-svn: 332274
2018-05-14 18:37:19 +00:00
Nico Weber 1b64a12654 alphabetize list
llvm-svn: 332272
2018-05-14 18:23:05 +00:00
Craig Topper 53ceb4805f [X86] Remove and autoupgrade avx512.vbroadcast.ss/avx512.vbroadcast.sd intrinsics.
llvm-svn: 332271
2018-05-14 18:21:22 +00:00
Simon Pilgrim 5bd5e2fd3e [llvm-mca][X86] Add missing SSE4A test file
llvm-svn: 332270
2018-05-14 18:20:40 +00:00
Simon Pilgrim 228d24a2d6 [X86][BtVer2] Fix MMX/YMM integer vector nt store schedules
MMX was missing and YMM was tagged as a fp nt store

llvm-svn: 332269
2018-05-14 18:07:28 +00:00
Craig Topper 5e0feeae34 [X86] Remove GCCBuiltin from the intrinsics that clang stopped using in r332266.
Add a FIXME for their eventual removal.

llvm-svn: 332267
2018-05-14 18:02:21 +00:00
Geoff Berry 64a2ea41ea [BranchFolding] Allow hoisting to block with a single conditional branch.
Summary:
The BranchFolding pass is currently missing opportunities to hoist
common code if the hoisted-to block contains a single conditional branch
that has register uses.  This occurs somewhat frequently on AArch64 with
CBZ/TBZ opcodes.

This change also eliminates some code differences when debug info is
present since the presence of e.g. DBG_VALUE instructions in the
hoisted-to block can enable hoisting that wouldn't have occurred without
them.

Reviewers: MatzeB, rnk, kparzysz, twoh, aprantl, javed.absar

Subscribers: kristof.beyls, JDevlieghere, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D46324

llvm-svn: 332265
2018-05-14 17:31:18 +00:00
Simon Pilgrim 4135de2e93 [llvm-mca][x86] Add scalar nt-store instruction tests
llvm-svn: 332262
2018-05-14 17:10:33 +00:00
Krzysztof Parzyszek 329c3e9a5f [Hexagon] Avoid predicate copies to integer registers from store-locked
llvm-svn: 332260
2018-05-14 16:41:40 +00:00
Simon Dardis bb818b4421 [mips] Fix the predicates of round, ceiling, floor and trunc.
Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46691

llvm-svn: 332258
2018-05-14 16:26:50 +00:00
Simon Pilgrim 7340d88740 [llvm-mca][x86] Add and/not/or/xor instruction tests
llvm-svn: 332257
2018-05-14 16:26:24 +00:00
Zaara Syeda 421a5960d2 [NFC] [Power] Fix instruction format for xsrqpi
xsrqpi is currently using Z23Form_1.
The instruction format is xsrqpi R,VRT,VRB,RMC.
Rathar than bits 11-15 being used for FRA, it should have
bits 11-14 reserved and bit 15 for R. This patch adds a new
class Z23Form_4 to fix the instruction format.

Differential Revision: https://reviews.llvm.org/D46761

llvm-svn: 332253
2018-05-14 15:45:15 +00:00
Evandro Menezes 14fa2e4fa5 [AArch64] Improve single vector lane stores
When storing the 0th lane of a vector, use a simpler and usually more efficient scalar store instead.

Differential revision: https://reviews.llvm.org/D46655

llvm-svn: 332251
2018-05-14 15:26:35 +00:00
Andrea Di Biagio 8ea3a34e39 [llvm-mca] Improved support for dependency-breaking instructions.
The tool assumes that a zero-latency instruction that doesn't consume hardware
resources is an optimizable dependency-breaking instruction. That means, it
doesn't have to wait on register input operands, and it doesn't consume any
physical register. The PRF knows how to optimize it at register renaming stage.

llvm-svn: 332249
2018-05-14 15:08:22 +00:00
Pavel Labath 2a6afe5f87 [CodeGen/AccelTable]: Handle -dwarf-linkage-names=Abstract correctly
Summary:
If we are not emitting a linkage name in the .debug_info sections, we
should not add it into the index either. This makes sure our index is
consistent with the actual debug info.

I am also explicitly setting the --dwarf-linkage-names=All in the
name-collsions test as that one would now fail on targets where this
defaults to "Abstract" (in fact, it would have failed already if there
wasn't a bug in the DWARF verifier, which I fix as well).

Reviewers: probinson, aprantl, JDevlieghere

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46748

llvm-svn: 332246
2018-05-14 14:13:20 +00:00
Nicola Zaghen ded3dae331 Docs: Fix the title underline too short.
llvm-svn: 332245
2018-05-14 13:54:39 +00:00
Sanjay Patel bf55e6dee1 [AggressiveInstCombine] avoid crashing on unsimplified code (PR37446)
This bug:
https://bugs.llvm.org/show_bug.cgi?id=37446
...raises another question: why do we run aggressive-instcombine before 
regular instcombine?

llvm-svn: 332243
2018-05-14 13:43:32 +00:00
Simon Dardis bb95dea8e7 [mips] Add missing test case from r332227
I did not commit this test from D46689.

llvm-svn: 332241
2018-05-14 13:18:51 +00:00
Nicola Zaghen d34e60ca85 Rename DEBUG macro to LLVM_DEBUG.
The DEBUG() macro is very generic so it might clash with other projects.
The renaming was done as follows:
- git grep -l 'DEBUG' | xargs sed -i 's/\bDEBUG\s\?(/LLVM_DEBUG(/g'
- git diff -U0 master | ../clang/tools/clang-format/clang-format-diff.py -i -p1 -style LLVM
- Manual change to APInt
- Manually chage DOCS as regex doesn't match it.

In the transition period the DEBUG() macro is still present and aliased
to the LLVM_DEBUG() one.

Differential Revision: https://reviews.llvm.org/D43624

llvm-svn: 332240
2018-05-14 12:53:11 +00:00
Simon Pilgrim affbc99bea Fix Wdocumentation warnings. NFCI.
llvm-svn: 332239
2018-05-14 12:22:30 +00:00
Simon Pilgrim e91a631df7 Fix "not all control paths return a value" MSVC warning. NFCI.
llvm-svn: 332238
2018-05-14 12:20:19 +00:00
Clement Courbet 4c0fb1dc68 Re-land r332230 "[llvm-exegesis]Fix a warning in r332221"
comparison of integers of different signs: 'const unsigned long' and 'const int' [-Werror,-Wsign-compare]

unittests/tools/llvm-exegesis/BenchmarkResultTest.cpp:60:5: note: in instantiation of function template specialization 'testing::internal::EqHelper<false>::Compare<unsigned long, int>' requested here
    ASSERT_EQ(FromDiskVector.size(), 1);

llvm-svn: 332235
2018-05-14 12:00:35 +00:00
Sander de Smalen 93380371bb [AArch64][SVE] Extend parsing of Prefetch operation for SVE.
Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D46681

llvm-svn: 332234
2018-05-14 11:54:41 +00:00
Clement Courbet dffc4ca4f2 [llvm-exegesis] Revert accidentally commited code.
llvm-svn: 332231
2018-05-14 11:35:37 +00:00
Clement Courbet 4623da8991 [llvm-exegesis] Fix a warning in r332221
comparison of integers of different signs: 'const unsigned long' and 'const int' [-Werror,-Wsign-compare]

unittests/tools/llvm-exegesis/BenchmarkResultTest.cpp:60:5: note: in instantiation of function template specialization 'testing::internal::EqHelper<false>::Compare<unsigned long, int>' requested here
    ASSERT_EQ(FromDiskVector.size(), 1);

llvm-svn: 332230
2018-05-14 11:31:02 +00:00
Clement Courbet 3d479fe81c [llvm-exegesis] Add an analysis mode.
The analysis mode gives the user a clustered view of the measurement results and
highlights any inconsistencies with the checked-in data.

llvm-svn: 332229
2018-05-14 11:30:56 +00:00
Simon Dardis fba0362096 [mips] Correct the predicates of indexed floating point stores and loads.
Also, fix the register class for microMIPS.

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D46689

llvm-svn: 332227
2018-05-14 10:53:15 +00:00
Clement Courbet 7b7c27afca [llvm-exegesis] Allow lists of BenchmarkResults to be parsed as std::vector<BenchmarkResult>.
llvm-svn: 332221
2018-05-14 09:01:22 +00:00
Nicola Zaghen 617d4a8199 Test commit access.
Remove trailing whitespace.

llvm-svn: 332220
2018-05-14 08:24:29 +00:00
Robert Widmann bce36770b7 [LLVM-C] Add Bindings For Module Flags
Summary:
The first foray into merging debug info into the echo tests.

- Add bindings to Module::getModuleFlagsMetadata() in the form of LLVMCopyModuleFlagsMetadata
- Add the opaque type LLVMModuleFlagEntry to represent Module::ModuleFlagEntry
- Add accessors for LLVMModuleFlagEntry's behavior, key, and metadata node.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: aprantl, JDevlieghere, llvm-commits, harlanhaskins

Differential Revision: https://reviews.llvm.org/D46792

llvm-svn: 332219
2018-05-14 08:09:00 +00:00
Fangrui Song 73cf805ffd [llvm-ar] Make PositionalArgs static.
llvm-svn: 332216
2018-05-14 05:56:48 +00:00
Bill Wendling 2a302210d0 Correct compatibility with the GNU Assembler's handling of comparison ops
GAS returns -1 for a comparison operator if the result is true and 0 if false.

  https://www.sourceware.org/binutils/docs-2.12/as.info/Infix-Ops.html#Infix%20Ops

llvm-svn: 332215
2018-05-14 05:25:36 +00:00
Craig Topper f633f3eb67 [X86] Add fast isel test cases for the clang output for 512-bit cvtps2pd related intrinsics.
llvm-svn: 332214
2018-05-14 05:09:41 +00:00
Craig Topper 266b7ae55d [X86] Cleanup a multiclass that doesn't need as many parameters after recent intrinsic removals.
llvm-svn: 332207
2018-05-14 00:17:52 +00:00
Craig Topper 0e71c6d5ca [X86] Remove and autoupgrade the cvtusi2sd intrinsic. Use uitofp+insertelement instead.
llvm-svn: 332206
2018-05-14 00:06:49 +00:00
Craig Topper 97e74b05ef [X86] Add patterns for combining movss+uint_to_fp into the intrinsic instructions under AVX512.
This matches what we do for sint_to_fp.

llvm-svn: 332205
2018-05-13 23:24:21 +00:00
Craig Topper 12067185d4 [X86] Add fast-isel test cases for _mm_cvtu32_sd, _mm_cvtu64_sd, _mm_cvtu32_ss, and _mm_cvtu64_ss.
llvm-svn: 332204
2018-05-13 23:24:19 +00:00
Craig Topper 911025b1cd [X86] Extend instcombine folds for pclmuldq intrinsics to the 256 and 512 bit version.
llvm-svn: 332202
2018-05-13 21:56:32 +00:00
Craig Topper f170b85d40 [X86] Add missing test for the InstCombines of pclmulqdq.
Apparently this test was lost when r293151 was committed. It was present in the review, but not the commit.

llvm-svn: 332199
2018-05-13 18:26:06 +00:00
Craig Topper 85906cf041 [X86] Remove and autoupgrade masked vpermd/vpermps intrinsics.
llvm-svn: 332198
2018-05-13 18:03:59 +00:00
Dimitry Andric a39c409619 Follow-up to rL332176 by adding a test case for PR37264.
Noticed by Simon Pilgrim.

llvm-svn: 332197
2018-05-13 14:32:23 +00:00
Matt Arsenault 432aaea63f AMDGPU: Rename OpenCL lowering pass to be R600 specific.
This pass is
  a) broken.
  b) r600 specific.

Fixing (a) is a bit more non-trivial, but fixing (b)
is easy. Move this pass to being R600 only for now.

This pass does pass all the unit tests, however clang
no longer generates code that looks like the unit test
input, so fixing the pass requires fixing the tests and
the pass as one, and checking it works with clang still.

Patch by Dave Airlie

llvm-svn: 332196
2018-05-13 10:04:48 +00:00
Matt Arsenault dfb88dfe30 AMDGPU: Make undef legal for v2i16/v2f16
This is apparently necessary to stop undef from being
turned into a build_vector of 0s.

llvm-svn: 332195
2018-05-13 10:04:38 +00:00
Puyan Lotfi 71540f5197 Fixing build bot error: adding const qualifiers to std::sort lambda.
Errors were not reproducible on clang-6.0 on ubuntu 16.04.

llvm-svn: 332192
2018-05-13 06:50:55 +00:00
Puyan Lotfi 380a6f55ff [NFC] MIR-Canon: switching to a stable string sorting of instructions.
llvm-svn: 332191
2018-05-13 06:07:20 +00:00
Craig Topper 38b713d4a7 [X86] Add some load folding patterns for cvtsi2ss/sd into intrinsic instructions.
llvm-svn: 332189
2018-05-13 01:54:33 +00:00
Craig Topper 28b85caea8 [X86] Remove some unused CHECK lines from tests.
llvm-svn: 332188
2018-05-13 00:58:23 +00:00
Craig Topper df3a9cedff [X86] Remove an autoupgrade legacy cvtss2sd intrinsics.
llvm-svn: 332187
2018-05-13 00:29:40 +00:00
Craig Topper 38ad7ddabc [X86] Remove and autoupgrade cvtsi2ss/cvtsi2sd intrinsics to match what clang has used for a very long time.
llvm-svn: 332186
2018-05-12 23:14:39 +00:00
Chandler Carruth 095d69507e [x86] Remove a comment obviated by r330269. Should have deleted the
comment in the same revision but missed it.

Thanks to Dimitry Andric for catching this!

llvm-svn: 332177
2018-05-12 21:28:53 +00:00
Dimitry Andric 74f2989202 Clear converters map after X86 Domain Reassignment to avoid crashes
Summary:
As reported in PR37264, in some cases the X86 Domain Reassignment
`runOnMachineFunction()` is called twice.  Because it only deletes the
`.second` members of its `InstrConverterBaseMap`, and does not clean up
the map itself, this can lead to double frees and crashes.

Use `DeleteContainerSeconds()` instead, so the `Converters` map can
safely be reinitialized and its members re-deleted for each X86 Domain
Reassignment pass.

Reviewers: guyblank, craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46425

llvm-svn: 332176
2018-05-12 19:59:54 +00:00
JF Bastien 6a68f38c0c [NFC] Remove inaccurate comment
Summary:
r271558 moved getManagedStaticMutex's mutex from a function-local
static to using call_once, but left a comment added in r211424. That comment is
now erroneous, remove it.

Reviewers: zturner, chandlerc

Subscribers: aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D46784

llvm-svn: 332175
2018-05-12 19:39:34 +00:00
JF Bastien 47b894b4a3 llc: don't call llvm_shutdown twice
Summary:
InitLLVM already calls llvm_shutdown, but llc registers for shutdown
with llvm_shutdown_obj so it gets called twice. It's not hurting anything, but
it's also not useful, so don't do it.

Reviewers: ruiu

Subscribers: aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D46788

llvm-svn: 332174
2018-05-12 19:38:44 +00:00
Simon Pilgrim 6e160c1813 [X86] Add WriteFCMOV scheduler class for x87 CMOVs
llvm-svn: 332173
2018-05-12 18:07:07 +00:00
Simon Dardis 65cc0cb31f [mips] Initialize the long branch pass for testing purposes
llvm-svn: 332172
2018-05-12 16:57:26 +00:00
Craig Topper a288f241cd [X86] Remove some unused masked conversion intrinsics that can be replaced with an older intrinsic and a select.
This is what clang already uses.

llvm-svn: 332170
2018-05-12 02:34:28 +00:00
Michael Zolotukhin a41660df7e Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading."
Stage3/stage4 bootstrap miscompares should be fixed by a non-determinism
fix in IDF (r332167).

This reverts commit r330446.

llvm-svn: 332168
2018-05-12 01:52:36 +00:00
Michael Zolotukhin 046da97806 [IDF] Enforce the returned blocks to be sorted.
Summary:
Currently the order of blocks returned by `IDF::calculate` can be
non-deterministic. This was discovered in several attempts to enable
SSAUpdaterBulk for JumpThreading (which led to miscompare in bootstrap between
stage 3 and stage4). Originally, the blocks were put into a priority queue with
a depth level as their key, and this patch adds a DFSIn number as a second key
to specify a deterministic order across blocks from one level.

The solution was suggested by Daniel Berlin.

Reviewers: dberlin, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46646

llvm-svn: 332167
2018-05-12 01:44:32 +00:00
Stanislav Mekhanoshin 7012c246c1 [AMDGPU] Fix amdgpu-waves-per-eu accounting in scheduler
We cannot query this attribute from a subtarget given a machine function.
At this point attribute itself is already unavailable and can only be
obtained through MFI.

Differential Revision: https://reviews.llvm.org/D46781

llvm-svn: 332166
2018-05-12 01:41:56 +00:00
Chris Matthews f616804903 Requirements can have & in them!
Lets escape those so the XML is valid!

llvm-svn: 332161
2018-05-12 00:13:54 +00:00
Chris Matthews 811a83d036 Add the message attribute to skipped
JUnit xml allows for a message attribute to be displayed on skips. Lets
populate that with an analysis of why we skipped the test.

llvm-svn: 332156
2018-05-11 23:15:11 +00:00
Sanjay Patel fe645d295f [DAG] add convenience function to propagate FMF; NFC
There's only one use of this currently, but that could
change with D46563. Either way, we shouldn't have to
update code outside of the flags struct when those
flag definitions change.

llvm-svn: 332155
2018-05-11 23:13:36 +00:00
Tom Stellard 655fdd3f82 AMDGPU/GlobalISel: Implement select() for >32-bit G_STORE
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D46153

llvm-svn: 332154
2018-05-11 23:12:49 +00:00
Alina Sbirlea c3c14666b6 [MemorySSA] getIncomingValueForBlock should return a MemoryAccess.
Summary: getIncomingValueForBlock is just a wrapper API that should return a MemoryAccess, instead of a generic Value.

Reviewers: george.burgess.iv

Subscribers: sanjoy, jlebar, Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D46779

llvm-svn: 332153
2018-05-11 22:59:37 +00:00
Sergey Dmitriev 69c9cd277d [CodeExtractor] Allow extracting blocks with exception handling
This is a CodeExtractor improvement which adds support for extracting blocks
which have exception handling constructs if that is legal to do. CodeExtractor
performs validation checks to ensure that extraction is legal when it finds
invoke instructions or EH pads (landingpad, catchswitch, or cleanuppad) in
blocks to be extracted.

I have also added an option to allow extraction of blocks with alloca
instructions, but no validation is done for allocas. CodeExtractor caller has
to validate it himself before allowing alloca instructions to be extracted.
By default allocas are still not allowed in extraction blocks.

Differential Revision: https://reviews.llvm.org/D45904

llvm-svn: 332151
2018-05-11 22:49:49 +00:00
Sanjay Patel c4e4c5b076 [DAG] clean up flag propagation for binops; NFCI
llvm-svn: 332150
2018-05-11 22:45:22 +00:00
Chris Matthews 6b3db8519d Overhaul unicode handling in xunit output
I have seen a lot of errors where the xunit does not encode unicode
test output correctly.  Handle that explicitly now.

llvm-svn: 332148
2018-05-11 22:18:22 +00:00
Changpeng Fang f094885a9e AMDGPU/SI: Don't promote alloca to vector for AddrSpaceCast instruction.
Summary:
  We have no logic to promote alloca to vector for an AddrSpaceCast instruction.

Reviewer:
  arsenm

Differential Revision:
  https://reviews.llvm.org/D45993

llvm-svn: 332147
2018-05-11 22:17:57 +00:00
Craig Topper a17d627abb [X86] Remove and autoupgrade a bunch of FMA instrinsics that are no longer used by clang.
llvm-svn: 332146
2018-05-11 21:59:34 +00:00
Artem Belevich c2cd5d5ce0 [Split GEP] handle trunc() in separate-const-offset-from-gep pass.
Let separate-const-offset-from-gep pass handle trunc() when it calculates
constant offset relative to base. The pass itself may insert trunc()
instructions when it canonicalises array indices to pointer-size integers
and needs to handle trunc() in order to evaluate the offset.

Differential Revision: https://reviews.llvm.org/D46732

llvm-svn: 332142
2018-05-11 21:13:19 +00:00
Yaxun Liu deba150c27 [AMDGPU] Fix compilation failure when IR contains comdat
Remove a useless SwitchSection which also causes compilation failure
when IR contains comdat.

The SwitchSection is useless because the current section is already
correct text section for the function therefore no need to switch.

It causes compilation failure for comdat because functions with comdat
has specific text section, not the default .text section.

Since HIP uses comdat, this bug caused failures for HIP.

Differential Revision: https://reviews.llvm.org/D46770

llvm-svn: 332137
2018-05-11 20:40:14 +00:00
Sanjay Patel 0ddf09a36c [DAG] reduce code duplication; NFCI
llvm-svn: 332133
2018-05-11 20:08:23 +00:00
Daniel Neilson f6651d4d94 [InstCombine] Handle atomic memset in the same way as regular memset
Summary:
This change adds handling of the atomic memset intrinsic to the
code path that simplifies the regular memset. In practice this means
that we will now also expand a small constant-length atomic memset
into a single unordered atomic store.

Reviewers: apilipenko, skatkov, mkazantsev, anna, reames

Reviewed By: reames

Subscribers: reames, llvm-commits

Differential Revision: https://reviews.llvm.org/D46660

llvm-svn: 332132
2018-05-11 20:04:50 +00:00
David Blaikie c30365ce1d Move standard library inclusions to after internal inclusions.
llvm-svn: 332124
2018-05-11 19:21:40 +00:00
Vedant Kumar 99d5c072f0 [DAGCombiner] Set the right SDLoc on extended SETCC uses (7/N)
ExtendSetCCUses updates SETCC nodes which use a load (OriginalLoad) to
reflect a simplification to the load (ExtLoad).

Based on my reading, ExtendSetCCUses may create new nodes to extend a
constant attached to a SETCC. It also creates fresh SETCC nodes which
refer to any updated operands.

ISTM that the location applied to the new constant and SETCC nodes
should be the same as the location of the ExtLoad.

This was suggested by Adrian in https://reviews.llvm.org/D45995.

Part of: llvm.org/PR37262

Differential Revision: https://reviews.llvm.org/D46216

llvm-svn: 332119
2018-05-11 18:40:10 +00:00
Vedant Kumar fd340a4047 [DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
This teaches tryToFoldExtOfLoad to set the right location on a
newly-created extload. With that in place, the logic for performing a
certain ([s|z]ext (load ...)) combine becomes identical for sexts and
zexts, and we can get rid of one copy of the logic.

The test case churn is due to dependencies on IROrders inherited from
the wrong SDLoc.

Part of: llvm.org/PR37262

Differential Revision: https://reviews.llvm.org/D46158

llvm-svn: 332118
2018-05-11 18:40:08 +00:00
Vedant Kumar f0e5f7c45e [DAGCombiner] Factor out duplicated logic for an extload combine, NFC (5/N)
Part of the logic for combining (zext (load ...)) and (sext (load ...))
is duplicated. This creates problems because bugs in one version have to
be fixed again in the other version.

To address this, as a first step, I've extracted the duplicate logic
into a helper. I'll fix the debug location bug in the helper and
eliminate the copy of its logic in a followup.

Part of: llvm.org/PR37262

Differential Revision: https://reviews.llvm.org/D46157

llvm-svn: 332117
2018-05-11 18:40:02 +00:00
Chris Matthews d1386a88dd [LIT] replace output escapes wit a cdata block
CDATA blocks don't need to have XML stuff escaped. Makes sense to wrap
output in them instead of escaping.

llvm-svn: 332116
2018-05-11 18:38:02 +00:00
Nico Weber 06b0c2fe2c make add_llvm_fuzzer calls slightly more consisten with other cmake
llvm-svn: 332112
2018-05-11 17:58:52 +00:00
David Bolvansky cd93c4ef1a [InstCombine] snprintf optimizations
Reviewers: spatel, efriedma, majnemer, rja, bkramer

Reviewed By: rja, bkramer

Subscribers: mstorsjo, rja, llvm-commits

Differential Revision: https://reviews.llvm.org/D46285

llvm-svn: 332110
2018-05-11 17:50:49 +00:00
Simon Pilgrim 661ae7778d [X86][BtVer2] Model ymm move as double pumped instructions
We still need to handle mmx/xmm moves as 'decode-only' no-pipe instructions

llvm-svn: 332109
2018-05-11 17:38:36 +00:00
Alex Bradbury bca0c3cdb6 [RISCV] Support .option rvc and norvc assembler directives
These directives allow the 'C' (compressed) extension to be enabled/disabled 
within a single file.

Differential Revision: https://reviews.llvm.org/D45864
Patch by Kito Cheng

llvm-svn: 332107
2018-05-11 17:30:28 +00:00
Martin Storsjo 0d7c37756b [Analysis] Validate the return type of s(n)printf like libcalls
If the sprintf function is static (as on mingw-w64, where many stdio
functions are static inline wrappers), earlier optimization passes
could optimize out the return value altogether, and make it void,
which could break optimizations of this libcall that touch the
return value.

This fixes the issue discussed in PR37408 for the sprintf function.

Differential Revision: https://reviews.llvm.org/D46752

llvm-svn: 332106
2018-05-11 16:53:56 +00:00
Simon Pilgrim 706403bab8 [X86][MMX] Tag MMX Move/Load/Store as WriteVec schedule classes
Fixes an issue on SLM/Btver2 where we had instructions were being treated as scalar loads/stores

llvm-svn: 332104
2018-05-11 16:38:59 +00:00
Geoff Berry 60460268c0 [AArch64] Fix performPostLD1Combine to check for constant lane index.
Summary:
performPostLD1Combine in AArch64ISelLowering looks for vector
insert_vector_elt of a loaded value which it can optimize into a single
LD1LANE instruction.  The code checking for the pattern was not checking
if the lane index was a constant which could cause two problems:

- an assert when lowering the LD1LANE ISD node since it assumes an
  constant operand

- an assert in isel if the lane index value depends on the
  post-incremented base register

Both of these issues are avoided by simply checking that the lane index
is a constant.

Fixes bug 35822.

Reviewers: t.p.northover, javed.absar

Subscribers: rengolin, kristof.beyls, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D46591

llvm-svn: 332103
2018-05-11 16:25:06 +00:00
Simon Dardis ae2010813f [mips] Rename Filler to MipsDelaySlotFiller and initialize the pass
llvm-svn: 332102
2018-05-11 16:13:53 +00:00
Sanjoy Das 82105e2a7d Use iteration instead of recursion in CFIInserter
Summary: This recursive step can overflow the stack.

Reviewers: djokov, petarj

Subscribers: mcrosier, jlebar, bixia, llvm-commits

Differential Revision: https://reviews.llvm.org/D46671

llvm-svn: 332101
2018-05-11 15:54:46 +00:00
Davide Italiano 6e1f7bf316 [Reassociate] Prevent infinite loops when processing PHIs.
Phi nodes can reside in live blocks but one of their incoming
arguments can come from a dead block. Dead blocks and reassociate
don't play nice together. In fact, reassociate performs an RPO
as a first step to avoid processing dead blocks.

The reason why Reassociate might not fixpoint when examining
dead blocks is that the following:

  %xor0 = xor i16 %xor1, undef
  %xor1 = xor i16 %xor0, undef

is perfectly valid LLVM IR (if it appears in a dead block),
so the worklist algorithm keeps pushing the two instructions for
reexamination. Note that this is not Reassociate fault, at least
not entirely. It's llvm that has a weird definition of dominance.

Fixes PR37390.

llvm-svn: 332100
2018-05-11 15:45:36 +00:00
Nico Weber 0f2a48c1ae Remove unused SyncExecutor and make it clearer that the whole file is only used if LLVM_ENABLE_THREADS
llvm-svn: 332098
2018-05-11 15:25:38 +00:00
Simon Dardis d4169ad7c1 [mips] Enable disassembly of fused (negative) multiply add/sub instructions
Reviewers: atanasyan, smaksimovic, abeserminji

Differential Revision: https://reviews.llvm.org/D46392

llvm-svn: 332097
2018-05-11 15:21:40 +00:00
Simon Pilgrim 032a01f74a [X86][SLM] Vector stores only use the MEC port.
Confirmed by both Agner and Intel's AOM - the IEC/FPC are not required for pure load/stores (even if its a partial update).

Can't fix WriteStore until all RMW instructions are cleaned up though....

llvm-svn: 332096
2018-05-11 15:16:15 +00:00
Simon Pilgrim 22dd72b995 [X86] Split WriteF/WriteVec Move/Load/Store scheduler classes by vector width
Fixes a SNB issue that was missing vlddqu/vmovntdqa ymm instructions

llvm-svn: 332094
2018-05-11 14:30:54 +00:00
Daniel Neilson 8f30ec65b0 [InstCombine] Unify handling of atomic memtransfer with non-atomic memtransfer
Summary:
This change reworks the handling of atomic memcpy within the instcombine pass.
Previously, a constant length atomic memcpy would be lowered into loads & stores
as long as no more than 16 load/store pairs are created. This is quite different
from the lowering done for a non-atomic memcpy; which only ever lowers into a single
load/store pair of no more than 8 bytes. Larger constant-sized memcpy calls are
expanded to load/stores in later passes, such as SelectionDAG lowering.

In this change the behaviour for atomic memcpy is unified with non-atomic memcpy;
atomic memcpy is now treated in the same was as non-atomic memcpy has always been.
We leave it to later passes to lower longer-length atomic memcpy calls.

Due to the structure of the pass's handling of memtransfer intrinsics, this change
also gives us handling of atomic memmove that we did not previously have.

Reviewers: apilipenko, skatkov, mkazantsev, anna, reames

Reviewed By: reames

Subscribers: reames, llvm-commits

Differential Revision: https://reviews.llvm.org/D46658

llvm-svn: 332093
2018-05-11 14:30:02 +00:00
Simon Pilgrim ead11e4d4b [X86] Added scheduler helper classes to split move/load/store by size
Nothing uses this yet but this will allow us to specialize MMX/XMM/YMM/ZMM vector moves.

llvm-svn: 332090
2018-05-11 12:46:54 +00:00
Sven van Haastregt 5ad5c3c7ed [APFloat] Set losesInfo on no-op convert
losesInfo would be left unset when no conversion needs to be done.  A
caller such as InstCombine's fitsInFPType would then branch on an
uninitialized value.

Caught using valgrind on an out-of-tree target.

Differential Revision: https://reviews.llvm.org/D46645

llvm-svn: 332087
2018-05-11 09:45:42 +00:00
Jakub Kuderski 0cbc1b0de4 [IRTests] Verify PDT instead of DT
Summary: Fix two typos which result in verifying wrong data structures (DT) instead of PDT in DominatorTreeBatchUpdatesTest.

Reviewers: davide, kuhar, grosser, dberlin

Reviewed By: davide, kuhar, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46696

llvm-svn: 332086
2018-05-11 09:30:29 +00:00
Tom Stellard dcc95e9385 AMDGPU/GlobalISel: Implement select() for 32-bit G_FPTOUI
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45883

llvm-svn: 332082
2018-05-11 05:44:16 +00:00
Alexander Shaposhnikov 18b5fb7b84 [llvm-strip] Add support for -remove-section
This diff adds support for -remove-section to llvm-strip.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46567

llvm-svn: 332081
2018-05-11 05:27:06 +00:00
Craig Topper 9968af4a2a [X86] Remove and autoupgrade the avx512.mask.store.ss intrinsic.
llvm-svn: 332079
2018-05-11 04:33:18 +00:00
Alexander Shaposhnikov 191913e3e7 [llvm-objcopy] Update remove-section.test
Verify that the input binary is not getting modified
and add an invocation which uses -remove-section instead of -R.

Test plan: make check-all

llvm-svn: 332078
2018-05-11 04:30:57 +00:00
Brian Gesiak c651113439 [Coroutines] PR34897: Fix incorrect elisions
Summary:
https://bugs.llvm.org/show_bug.cgi?id=34897 demonstrates an incorrect
coroutine frame allocation elision in the coro-elide pass. The elision
is performed on the basis that the SSA variables from all llvm.coro.begin
are directly referenced in subsequent llvm.coro.destroy instructions.

However, this ignores the fact that the function may exit through paths
that do not run these destroy instructions. In the sample program from
PR34897, for example, the llvm.coro.destroy instruction is only
executed in exception handling code. When the coroutine function exits
normally, llvm.coro.destroy is not called. Eliding the allocation in
this case causes a subsequent reference to the coroutine handle from
outside of the function to access freed memory.

To fix the issue, when finding an llvm.coro.destroy for each llvm.coro.begin,
only consider llvm.coro.destroy that are executed along non-exceptional paths.

Test Plan:
1. Download the sample program from
   https://bugs.llvm.org/show_bug.cgi?id=34897, compile it with
   `clang++ -fcoroutines-ts -stdlib=libc++ -std=c++1z -O2`, and run it.
   It should print `"run1\ncheck1\nrun2\ncheck2"` and then exit
   successfully.
2. Compile https://godbolt.org/g/mCKfnr and confirm it is still
   optimized to a single instruction, 'return 1190'.
3. `check-llvm`

Reviewers: rsmith, GorNishanov, eric_niebler

Reviewed By: GorNishanov

Subscribers: andrewrk, lewissbaker, EricWF, llvm-commits

Differential Revision: https://reviews.llvm.org/D43242

llvm-svn: 332077
2018-05-11 03:12:28 +00:00
Brian Gesiak 82de4e6b93 [Support] Add docs for 'openFileFor{Write,Read}'
Summary:
Add documentation for the LLVM Support functions `openFileForWrite` and
`openFileForRead`. The `openFileForRead` parameter `RealPath`, in
particular, I think warranted some explanation.

In addition, make the behavior of the functions more consistent across
platforms. Prior to this patch, Windows would set or not set the result
file descriptor based on the nature of the error, whereas Unix would
consistently set it to `-1` if the open failed. Make Windows
consistently set it to `-1` as well.

Test Plan:
1. `ninja check-llvm`
2. `ninja docs-llvm-html`

Reviewers: zturner, rnk, danielmartin, scanon

Reviewed By: danielmartin, scanon

Subscribers: scanon, danielmartin, llvm-commits

Differential Revision: https://reviews.llvm.org/D46499

llvm-svn: 332075
2018-05-11 01:47:27 +00:00
Kostya Serebryany a2759327fd [sanitizer-coverage] don't instrument a function if it's entry block ends with 'unreachable'
llvm-svn: 332072
2018-05-11 01:09:39 +00:00
Kamil Rytarowski 02c432a72b Register NetBSD/i386 in AddressSanitizer.cpp
Summary:
Ship kNetBSD_ShadowOffset32 set to 1ULL << 30.

This is prepared for the amd64 kernel runtime.

Sponsored by <The NetBSD Foundation>

Reviewers: vitalybuka, joerg, kcc

Reviewed By: vitalybuka

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46724

llvm-svn: 332069
2018-05-11 00:58:01 +00:00
Craig Topper 4b026e5ebd [InstCombine] Add tests for cases where we don't recognize type promoted rotate idioms.
These rotates take the form

(x << (n & mask)) | (x >> (-n & mask)) where mask is bitwidth - 1.

If x has been promoted to a wider type than its original bit width due to type promotion we fail to narrower it and therefore don't recognize it as a rotate.

llvm-svn: 332068
2018-05-11 00:46:09 +00:00
Chris Matthews 7d6224d2fa Support Unsupported Tests in xunit output
We were reporting  "Unsupported" tests in xunit as passes, however since
they are not run, it make more sense to mark them as skipped. The Junit
xml standard has support for that, so lets use it.

llvm-svn: 332065
2018-05-11 00:25:43 +00:00
Chris Matthews 5f74591847 Refactor xunit test case builder to not use as much str addition
String concatenation in python is slow.  Refactor to not concatenate the
possibly large strings of test output and instead write them directly
to the output file.

llvm-svn: 332064
2018-05-11 00:25:42 +00:00
Wei Mi 0c2f6be662 [SampleFDO] Don't treat warm callsite with inline instance in the profile as cold
We found current sampleFDO had a performance issue when triaging a regression.
For a callsite with inline instance in the profile, even if hot callsite inliner
cannot inline it, it may still execute enough times and should not be treated as
cold in regular inliner later. However, currently if such callsite is not inlined
by hot callsite inliner, and the BB where the callsite locates doesn't get
samples from other instructions inside of it, the callsite will have no profile
metadata annotated. In regular inliner cost analysis, if the callsite has no
profile annotated and its caller has profile information, it will be treated as
cold.

The fix changes the isCallsiteHot check and chooses to compare
CallsiteTotalSamples with hot cutoff value computed by ProfileSummaryInfo.

Differential Revision: https://reviews.llvm.org/D45377

llvm-svn: 332058
2018-05-10 23:02:27 +00:00
Vedant Kumar e0b5f86b30 [STLExtras] Add distance() for ranges, pred_size(), and succ_size()
This commit adds a wrapper for std::distance() which works with ranges.
As it would be a common case to write `distance(predecessors(BB))`, this
also introduces `pred_size()` and `succ_size()` helpers to make that
easier to write.

Differential Revision: https://reviews.llvm.org/D46668

llvm-svn: 332057
2018-05-10 23:01:54 +00:00
Chris Matthews 4855c5f717 [LIT] Move xunit tests tests into their own location, and and add failures
Failures will increase coverage.

llvm-svn: 332056
2018-05-10 22:51:28 +00:00
Craig Topper ea78a261de [InstCombine] Replace an 'if' that should always be true with an assert.
The bitwidth of the operation should always be wider than the result width of the truncate since we don't recurse through any width changing operations.

llvm-svn: 332055
2018-05-10 22:45:28 +00:00
Sam Clegg 16c16827bc [WebAssembly] Initial Disassembler.
This implements a new table-gen emitter to create tables for
a wasm disassembler, and a dissassembler to use them.

Comes with 2 tests, that tests a few instructions manually. Is also able to
disassemble large .wasm files with objdump reasonably.

Not working so well, to be addressed in followups:
- objdump appears to be passing an incorrect starting point.
- since the disassembler works an instruction at a time, and it is
  disassembling stack instruction, it has no idea of pseudo register assignments.
  These registers are required for the instruction printing code that follows.
  For now, all such registers appear in the output as $0.

Patch by Wouter van Oortmerssen

Differential Revision: https://reviews.llvm.org/D45848

llvm-svn: 332052
2018-05-10 22:16:44 +00:00
Craig Topper 1ee19ae126 [X86] Add new patterns for masked scalar load/store to match clang's codegen from r331958.
Clang's codegen now uses 128-bit masked load/store intrinsics in IR. The backend will widen to 512-bits on AVX512F targets.

So this patch adds patterns to detect codegen's widening and patterns for AVX512VL that don't get widened.

We may be able to drop some of the old patterns, but I leave that for a future patch.

llvm-svn: 332049
2018-05-10 21:49:16 +00:00
Martin Storsjo 86e6742c17 Revert "[InstCombine] snprintf optimizations"
This reverts commit SVN r331889, which could trigger failed
assertions for cases where the snprintf function is declared
with a vaguely differing signature (e.g. being defined as
static inline), see PR37408.

llvm-svn: 332043
2018-05-10 21:23:36 +00:00
Tom Stellard 1e0edad4bb AMDGPU/GlobalISel: Implement select() for G_BITCAST s32 <--> <2 x s16>
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45881

llvm-svn: 332042
2018-05-10 21:20:10 +00:00
Robert Widmann 4b0084bfcf [LLVM-C] Consolidate llgo's DIBuilder Bindings
Summary: Move and correct LLVMDIBuilderCreateTypedef.  This is the last API in DIBuilderBindings.h, so it is being removed and the C API will now be re-exported from IRBindings.h.

Reviewers: whitequark, harlanhaskins, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46725

llvm-svn: 332041
2018-05-10 21:10:06 +00:00
Tom Stellard 1dc90204bf AMDGPU/GlobalISel: Enable TableGen'd instruction selector
Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, mgorny, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45994

llvm-svn: 332039
2018-05-10 20:53:06 +00:00
Sanjay Patel c7bb14301a [InstCombine] add folds for minnum(-a, -b) --> -maxnum(a, b)
This is similar to what we do for integer min/max with 'not'
ops (rL321882).

This should fix:
https://bugs.llvm.org/show_bug.cgi?id=37404
https://bugs.llvm.org/show_bug.cgi?id=37405

llvm-svn: 332031
2018-05-10 20:03:13 +00:00
Wolfgang Pieb f2b6915ed4 [DWARF] Fixing a bug in DWARF v5 string offsets tables where the length encoded the contribution
length excluding the table header. Instead it must encode the contribution length minus the length
field itself.

Reviewer: JDevliegehere

Differential Revision: https://reviews.llvm.org/D45922

llvm-svn: 332030
2018-05-10 20:02:34 +00:00
Omer Paparo Bivas fbb83deef7 [InstCombine] Moving overflow computation logic from InstCombine to ValueTracking; NFC
Differential Revision: https://reviews.llvm.org/D46704

Change-Id: Ifabcbe431a2169743b3cc310f2a34fd706f13f02
llvm-svn: 332026
2018-05-10 19:46:19 +00:00
Sanjay Patel b5322e385e [InstCombine] add minnum/maxnum tests (PR37404, PR37405); NFC
llvm-svn: 332025
2018-05-10 19:21:08 +00:00
Gabor Buella a3b581906f [X86] Initialize HasPTWRITE member of X86Subtarget
This was missing from r331961.
Caught by sanitizer bots.

llvm-svn: 332024
2018-05-10 19:15:10 +00:00
Simon Pilgrim a3686c9a28 [X86] Convert/Merge more instregex patterns to reduce InstrRW compile time.
Use instrs lists or merge multiple instregex patterns.

llvm-svn: 332022
2018-05-10 19:08:06 +00:00
George Burgess IV 175400a801 Add regression test for r331976
In general, it's difficult to poke the ConstantExpr code in CFLAA, since
LLVM is so great at eagerly reducing ConstantExprs. :)

Sadly, this only shows a functional difference from before the patch
because CFLAA has some special logic around taking loads of non-pointers
into account. Namely, with the broken select behavior, CFLAA will
completely fail to take note of @g3. Since CFLAA doesn't have any record
about @g3 when we do an alias query for @g3 and %a, it conservatively
answers MayAlias. When we properly take @g3 into account with the new
select logic, we get NoAlias for this query.

I suspect that the aforementioned "special logic" isn't completely
correct, but this test-case should prevent future wonky aliasing results
from appearing for these flavors of ConstantExprs, so I think it's still
worth having.

llvm-svn: 332017
2018-05-10 18:37:54 +00:00
Haicheng Wu 0aae2bc260 [CGP] Split large data structres to sink more GEPs
Accessing the members of a large data structures needs a lot of GEPs which
usually have large offsets due to the size of the underlying data structure. If
the offsets are too large to fit into the r+i addressing mode, these GEPs cannot
be sunk to their users' blocks and many extra registers are needed then to carry
the values of these GEPs.

This patch tries to split a large data struct starting from %base like the
following.

Before:
BB0:
  %base     =

BB1:
  %gep0     = gep %base, off0
  %gep1     = gep %base, off1
  %gep2     = gep %base, off2

BB2:
  %load1    = load %gep0
  %load2    = load %gep1
  %load3    = load %gep2

After:
BB0:
  %base     =
  %new_base = gep %base, off0

BB1:
  %new_gep0 = %new_base
  %new_gep1 = gep %new_base, off1 - off0
  %new_gep2 = gep %new_base, off2 - off0

BB2:
  %load1    = load i32, i32* %new_gep0
  %load2    = load i32, i32* %new_gep1
  %load3    = load i32, i32* %new_gep2

In the above example, the struct is split into two parts. The first part still
starts from %base and the second part starts from %new_base. After the
splitting, %new_gep1 and %new_gep2 have smaller offsets and then can be sunk to
BB2 and folded into their users.

The algorithm to split data structure is simple and very similar to the work of
merging SExts. First, it collects GEPs that have large offsets when iterating
the blocks. Second, it splits the underlying data structures and updates the
collected GEPs to use smaller offsets.

Differential Revision: https://reviews.llvm.org/D42759

llvm-svn: 332015
2018-05-10 18:27:36 +00:00
Robert Widmann 260b581498 [LLVM-C] Add Accessors for Common DIType and DILocation Properties
Summary:
- Adds getters for the line, column, and scope of a DILocation
- Adds getters for the name, size in bits, offset in bits, alignment in bits, line, and flags of a DIType

Reviewers: whitequark, harlanhaskins, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46627

llvm-svn: 332014
2018-05-10 18:23:55 +00:00
Robert Widmann a428eba85e [LLVM-C] Move DIBuilder Bindings For Temporary MDNodes
Summary: Move LLVMTemporaryMDNode and LLVMMetadataReplaceAllUsesWith to the C bindings and add LLVMDeleteTemporaryMDNode for deleting non-RAUW'ed temporary nodes.

Reviewers: whitequark, harlanhaskins, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46632

llvm-svn: 332010
2018-05-10 18:09:53 +00:00
Sam Clegg a5908009cd [WebAsembly] Update default triple in test files to wasm32-unknown-unkown.
Summary: The final -wasm component has been the default for some time now.

Subscribers: jfb, dschuff, jgravelle-google, eraman, aheejin, JDevlieghere, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46342

llvm-svn: 332007
2018-05-10 17:49:11 +00:00
Simon Pilgrim b7f274ef16 [X86][Znver1] Remove unnecessary SchedWritePMULLD InstRW overrides.
llvm-svn: 332006
2018-05-10 17:42:26 +00:00
Sam Clegg b210c64b28 [WebAssembly] Create section start symbols automatically for all sections
These symbols only get included in the output symbols table if
they are used in a relocation.

This behaviour matches more closely the ELF object writer.

Differential Revision: https://reviews.llvm.org/D46561

llvm-svn: 332005
2018-05-10 17:38:35 +00:00
Chandler Carruth baf045fb28 [PM/LoopUnswitch] Avoid pointlessly creating an exit block set.
This code can just test whether blocks are *in* the loop, which we
already have a dedicated set tracking in the loop itself.

llvm-svn: 332004
2018-05-10 17:33:20 +00:00
Simon Pilgrim 37fbb7f173 [X86][SNB] Fix typo in PEXTRDmr instregex, was missing VPEXTRDmr.
llvm-svn: 332002
2018-05-10 17:30:49 +00:00
Simon Pilgrim 38ac0e9c6b [X86] Split WriteVecALU/WriteVecLogic/WriteShuffle/WriteVarShuffle/WritePSADBW/WritePHAdd scheduler classes
Split off XMM classes from the default (MMX) classes.

llvm-svn: 331999
2018-05-10 17:06:09 +00:00
Sanjay Patel dc4bb3fd36 [InstCombine] regenerate full checks; NFC
llvm-svn: 331998
2018-05-10 17:05:38 +00:00
Simon Atanasyan 05db279f52 [mips] Accept 32-bit offsets for ld/sd/lld commands
This is a follow up to the rL330983. The patch teaches ld, sd, and lld
commands accept 32-bit memory offsets by replacing `mem_simm16` operand
to `mem_simmptr`. In fact, these commands should accept 64-bit offsets,
but so large offsets require another command expanding and will be
supported by a separate patch.

Differential Revision: https://reviews.llvm.org/D46629

llvm-svn: 331997
2018-05-10 16:01:36 +00:00
Simon Atanasyan ac5f4e0546 [mips] Accept 32-bit offsets for lh and lhu commands
This is a follow up to the rL330983. The patch teaches lh and lhu
commands accepts 32-bit memory offsets by replacing `mem_simm16` operand
to `mem_simmptr`.

Differential Revision: https://reviews.llvm.org/D46513

llvm-svn: 331996
2018-05-10 16:01:18 +00:00
Alexander Shaposhnikov af555fb4a3 [llvm-objcopy] Add tests for help messages
This diff slightly reorganizes the tests  and improves 
the test coverage of help messages / error reports.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46589

llvm-svn: 331993
2018-05-10 15:56:04 +00:00
Sanjay Patel b4e7893ba8 [x86] fix fmaxnum/fminnum with nnan
With nnan, there's no need for the masked merge / blend
sequence (that probably costs much more than the min/max
instruction).

Somewhere between clang 5.0 and 6.0, we started producing
these intrinsics for fmax()/fmin() in C source instead of
libcalls or fcmp/select. The backend wasn't prepared for
that, so we regressed perf in those cases.

Note: it's possible that other targets have similar problems
as seen here. 

Noticed while investigating PR37403 and related bugs:
https://bugs.llvm.org/show_bug.cgi?id=37403

The IR FMF propagation cases still don't work. There's
a proposal that might fix those cases in D46563.

llvm-svn: 331992
2018-05-10 15:40:49 +00:00
Daniel Neilson 71fa1b904a [DSE] Teach the pass about partial overwrite of atomic memory intrinsics
Summary:
This change teaches DSE that the atomic memory intrinsics can be overwriten
partially in the same way as the non-atomic forms. Specifically, that the
atomic memcpy & memset can be shortened at the end and that the atomic memset
can be shortened at the beginning, if they partially overwritten
by later stores.

Reviewers: mkazantsev, skatkov, apilipenko, efriedma, rsmith, spatel, filcab, sanjoy

Reviewed By: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45584

llvm-svn: 331991
2018-05-10 15:12:49 +00:00
whitequark 68403564df [PR37339] Fix assertion in FunctionComparator::cmpInlineAsm
Fixes bug https://bugs.llvm.org/show_bug.cgi?id=37339.

InlineAsm is only uniqued if the FunctionTypes are exactly the
same, while cmpTypes() for example considers all pointer types
in the default address space to be the same. For this reason
the end of cmpInlineAsm() can be reached.

This patch replaces the unreachable assertion with a check that
the function types are not identical.

Differential Revision: https://reviews.llvm.org/D46495

Reviewers: jfb
llvm-svn: 331990
2018-05-10 15:05:47 +00:00
Sanjay Patel ec9b6be26f [x86] fix test names; NFC
llvm-svn: 331989
2018-05-10 14:58:47 +00:00
Sanjay Patel be97134955 [x86] add tests for maxnum/minnum intrinsics with nnan; NFC
Clang 6.0 was updated to create these intrinsics rather than 
libcalls or fcmp/select, but the backend wasn't prepared to 
handle that optimally. 

This bug is not the primary reason for PR37403:
https://bugs.llvm.org/show_bug.cgi?id=37403
...but it's probably more important for x86 perf.

llvm-svn: 331988
2018-05-10 14:48:42 +00:00
Nico Weber 2a0810e27f Don't redefine a bunch of defines from llvm-config.h in config.h.
r210144 made config.h include llvm-config.h and deduplicated defines. Then
rL239987 later added back some of the duplication.
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20150914/300329.html
suggests this was done for the configure/make build, which no longer exists.

No intended behavior change.

https://reviews.llvm.org/D46288

llvm-svn: 331987
2018-05-10 14:45:05 +00:00
James Henderson 198a87c8f3 [DWARF] Remove unused member and fix(?) the unit-tests on big endian hosts
I can't verified the fix on a big endian host, so I'm not 100% certain it
will work.

llvm-svn: 331986
2018-05-10 14:36:24 +00:00
Nirav Dave a5ad417589 [DAG] Avoid using deleted node in rebuildSetCC
Summary:
The combine in rebuildSetCC may be combined to another
node leaving our references stale. Keep a handle on
it to avoid stale references.

Fixes PR36602.

Reviewers: dbabokin, RKSimon, eli.friedman, davide

Subscribers: hiraditya, uabelho, JesperAntonsson, qcolombet, llvm-commits

Differential Revision: https://reviews.llvm.org/D46404

llvm-svn: 331985
2018-05-10 14:28:54 +00:00
Roman Lebedev 85343925d7 [DWARF] DwarfGenerator.h LineTable: explicitly mark DG as unused
Just want to unbreak the build.

llvm-svn: 331984
2018-05-10 14:16:45 +00:00
Roman Lebedev e1b0e29e1e [DWARF] dwarfgen::LineTable::writeData(): pacify -Wcovered-switch-default
llvm-svn: 331983
2018-05-10 14:16:41 +00:00
Roman Lebedev a68aee07d5 [DWARF] DWARFDebugLineTest: fix a few more signed/unsigned mismatch warnings
llvm-svn: 331982
2018-05-10 14:16:37 +00:00
James Henderson 11a9de74c9 Fix signed/unsigned comparison warning and print format
The print format was causing at least 2 unit-test failures from r331971.

The signed/unsigned comparison warnings only appeared to affect two lines but
it was unclear whether it might just pop up on other lines, so I have been
explicit in all the literals in the tests.

There were other bot unit-test failures that I am still investigating.

llvm-svn: 331978
2018-05-10 12:15:43 +00:00
David Bolvansky 10c218d4af [CFLGraph] Fixed Select instruction handling
Summary:
Operand 0 is the condition, not the true value.

Use op 1 and op 2 as the correct values.

Reviewers: george.burgess.iv, nlopes, efriedma

Reviewed By: george.burgess.iv

Subscribers: craig.topper, rjmccall, lebedev.ri, llvm-commits

Differential Revision: https://reviews.llvm.org/D46343

llvm-svn: 331976
2018-05-10 11:47:36 +00:00
Benjamin Kramer 456f473ea8 [InstCombine] Only propagate known leading zeros from udiv input to output.
Put in a conservatively correct estimate for now. Avoids miscompiling
clang in FDO mode. This is really tricky to trigger in reality as
basically all interesting cases will be folded away by computeKnownBits
earlier, I was unable to find a reasonably small test case.

llvm-svn: 331975
2018-05-10 11:45:18 +00:00
James Henderson a3acf99e59 [DWARF] Rework debug line parsing to use llvm::Error and callbacks
Reviewed by: dblaikie, JDevlieghere, espindola

Differential Revision: https://reviews.llvm.org/D44560

Summary:
The .debug_line parser previously reported errors by printing to stderr and
return false. This is not particularly helpful for clients of the library code,
as it prevents them from handling the errors in a manner based on the calling
context. This change switches to using llvm::Error and callbacks to indicate
what problems were detected during parsing, and has updated clients to handle
the errors in a location-specific manner. In general, this means that they
continue to do the same thing to external users. Below, I have outlined what
the known behaviour changes are, relating to this change.

There are two levels of "errors" in the new error mechanism, to broadly
distinguish between different fail states of the parser, since not every
failure will prevent parsing of the unit, or of subsequent unit. Malformed
table errors that prevent reading the remainder of the table (reported by
returning them) and other minor issues representing problems with parsing that
do not prevent attempting to continue reading the table (reported by calling a
specified callback funciton). The only example of this currently is when the
last sequence of a unit is unterminated. However, I think it would be good to
change the handling of unrecognised opcodes to report as minor issues as well,
rather than just printing to the stream if --verbose is used (this would be a
subsequent change however).

I have substantially extended the DwarfGenerator to be able to handle
custom-crafted .debug_line sections, allowing for comprehensive unit-testing
of the parser code. For now, I am just adding unit tests to cover the basic
error reporting, and positive cases, and do not currently intend to test every
part of the parser, although the framework should be sufficient to do so at a
later point.

Known behaviour changes:
  - The dump function in DWARFContext now does not attempt to read subsequent
  tables when searching for a specific offset, if the unit length field of a
  table before the specified offset is a reserved value.
  - getOrParseLineTable now returns a useful Error if an invalid offset is
  encountered, rather than simply a nullptr.
  - The parse functions no longer use `WithColor::warning` directly to report
  errors, allowing LLD to call its own warning function.
  - The existing parse error messages have been updated to not specifically
  include "warning" in their message, allowing consumers to determine what
  severity the problem is.
  - If the line table version field appears to have a value less than 2, an
  informative error is returned, instead of just false.
  - If the line table unit length field uses a reserved value, an informative
  error is returned, instead of just false.
  - Dumping of .debug_line.dwo sections is now implemented the same as regular
  .debug_line sections.
  - Verbose dumping of .debug_line[.dwo] sections now prints the prologue, if
  there is a prologue error, just like non-verbose dumping.

As a helper for the generator code, I have re-added emitInt64 to the
AsmPrinter code. This previously existed, but was removed way back in r100296,
presumably because it was dead at the time.

This change also requires a change to LLD, which will be committed separately.

llvm-svn: 331971
2018-05-10 10:51:33 +00:00
Simon Dardis ce6ada4151 [mips] Correct the predicates of cvt.fmt.fmt instructions
Reviewers: atanasyan, smaksimovic, abeserminji

Differential Revision: https://reviews.llvm.org/D46390

llvm-svn: 331969
2018-05-10 10:42:30 +00:00
Gabor Buella a832b22bae [X86] ptwrite intrinsic
Reviewers: craig.topper, RKSimon

Reviewed By: craig.topper, RKSimon

Differential Revision: https://reviews.llvm.org/D46539

llvm-svn: 331961
2018-05-10 07:26:05 +00:00
Douglas Yung 1d4c29c437 Fix tests added in r331924 so that they work on Windows.
The test needed to check for the optional executable extension (llvm-objcopy.EXE).

llvm-svn: 331952
2018-05-10 03:06:42 +00:00
Serguei Katkov 32754aa37f [SCEV] Add missed Test for rL331949.
llvm-svn: 331950
2018-05-10 01:42:59 +00:00
Serguei Katkov 7d02f059e7 SCEV] Do not use induction in isKnownPredicate for simplification umax.
During simplification umax we trigger isKnownPredicate twice. As a first attempt it
tries the induction. To do that it tries to get post increment of SCEV.
Re-writing the SCEV may result in simplification of umax. If the SCEV contains a lot
of umax operations this recursion becomes very slow.

The added test demonstrates the slow behavior.

To resolve this we use only simple ways to check whether the predicate is known.

Reviewers: sanjoy, mkazantsev
Reviewed By: sanjoy
Subscribers: lebedev.ri, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D46046

llvm-svn: 331949
2018-05-10 01:40:43 +00:00
Craig Topper 553d451e95 [InstCombine] Reorder an if condition to put a cheap check in front of a computeKnownBits call. NFC
llvm-svn: 331948
2018-05-10 00:53:25 +00:00
Craig Topper 333efc951a [InstCombine] Use APInt::getBitsSetFrom to shortern a line and fix an 80 columns violation. NFC
Fix a similar line in the same function.

llvm-svn: 331947
2018-05-10 00:53:22 +00:00
Chris Matthews c3f259cb6c [LIT] Add the missing file
I forgot to commit this file.

llvm-svn: 331946
2018-05-10 00:08:39 +00:00
Chris Matthews bd9ffc6243 Refactor test incase results are backwards
Looks like results can come in either way in this file.  Loosen the ordering constraints.

llvm-svn: 331945
2018-05-10 00:06:17 +00:00