Commit Graph

80804 Commits

Author SHA1 Message Date
Evgeniy Stepanov d33e3d8c6e ASan: use getTypeAllocSize instead of getTypeStoreSize.
This change replaces getTypeStoreSize with getTypeAllocSize in AddressSanitizer
instrumentation for stack allocations.

One case where old behaviour produced undesired results is an optimization in
InstCombine pass (PromoteCastOfAllocation), which can replace  alloca(T) with
alloca(S), where S has the same AllocSize, but a smaller StoreSize. Another
case is memcpy(long double => long double), where ASan will poison bytes 10-15
of a stack-allocated long double (StoreSize  10, AllocSize 16,
sizeof(long double) = 16).

See http://llvm.org/bugs/show_bug.cgi?id=12047 for more context.

llvm-svn: 151887
2012-03-02 10:41:08 +00:00
Chandler Carruth becfda3e40 Add a golden data test that I missed somehow the first time around.
llvm-svn: 151886
2012-03-02 10:01:29 +00:00
Chandler Carruth b101eed332 Fix bad indenting that was left over from cut/paste of the golden values
for 32-bit builds in here.

llvm-svn: 151885
2012-03-02 10:01:27 +00:00
Chandler Carruth 6f604398a2 Add a header that was technically missing to see if this gets the
offsetof buildbot errors to go away...

llvm-svn: 151884
2012-03-02 09:46:02 +00:00
Chandler Carruth 40119fb9c6 We really want to hash pairs of directly-hashable data as directly
hashable data. This matters when we have pair<T*, U*> as a key, which is
quite common in DenseMap, etc. To that end, we need to detect when this
is safe. The requirements on a generic std::pair<T, U> are:

1) Both T and U must satisfy the existing is_hashable_data trait. Note
   that this includes the requirement that T and U have no internal
   padding bits or other bits not contributing directly to equality.
2) The alignment constraints of std::pair<T, U> do not require padding
   between consecutive objects.
3) The alignment constraints of U and the size of T do not conspire to
   require padding between the first and second elements.

Grow two somewhat magical traits to detect this by forming a pod
structure and inspecting offset artifacts on it. Hopefully this won't
cause any compilers to panic.

Added and adjusted tests now that pairs, even nested pairs, are treated
as just sequences of data.

Thanks to Jeffrey Yasskin for helping me sort through this and reviewing
the somewhat subtle traits.

llvm-svn: 151883
2012-03-02 09:26:36 +00:00
Chandler Carruth 4718430a5a Add support for hashing pairs by delegating to each sub-object. There is
an open question of whether we can do better than this by treating pairs
as boring data containers and directly hashing the two subobjects. This
at least makes the API reasonable.

In order to make this change, I reorganized the header a bit. I lifted
the declarations of the hash_value functions up to the top of the header
with their doxygen comments as these are intended for users to interact
with. They shouldn't have to wade through implementation details. I then
defined them at the very end so that they could be defined in terms of
hash_combine or any other hashing infrastructure.

Added various pair-hashing unittests.

llvm-svn: 151882
2012-03-02 08:32:29 +00:00
Chad Rosier f5e086f18e Prevent obscure and incorrect tail-call optimization.
In this instance we are generating the tail-call during legalizeDAG.  The 2nd
floor call can't be a tail call because it clobbers %xmm1, which is defined by
the first floor call.  The first floor call can't be a tail-call because it's
not in the tail position.  The only reasonable way I could think to fix this
in a target-independent manner was to check for glue logic on the copy reg.

rdar://10930395

llvm-svn: 151877
2012-03-02 02:50:46 +00:00
Eric Christopher 1df94bfe8a Grammar-o in function name.
llvm-svn: 151875
2012-03-02 02:11:47 +00:00
Eric Christopher e19f4cd066 Grammar.
llvm-svn: 151874
2012-03-02 01:57:55 +00:00
Eric Christopher 7772531567 If the linkage name doesn't exist we're supposed to emit a reference
to the string table for the function name, not the function name.

llvm-svn: 151873
2012-03-02 01:57:52 +00:00
Dan Gohman 362eb69f24 Fix an iterator invalidation problem. operator[] on a DenseMap
can insert a new element, invalidating iterators. Use find
instead, and handle the case where the key is not found explicitly.

llvm-svn: 151871
2012-03-02 01:26:46 +00:00
Dan Gohman 55b067427b Misc micro-optimizations.
llvm-svn: 151869
2012-03-02 01:13:53 +00:00
Chandler Carruth 0d7c2788e4 Remove the misguided extension here that reserved two special values in
the hash_code. I'm not sure what I was thinking here, the use cases for
special values are in the *keys*, not in the hashes of those keys.

We can always resurrect this if needed, or clients can accomplish the
same goal themselves. This makes the general case somewhat faster (~5
cycles faster on my machine) and smaller with less branching.

llvm-svn: 151865
2012-03-02 00:48:38 +00:00
Eric Christopher 7524fe4551 Revert "Reorder the sections being output to reduce the number of assembler"
The inline table needs to be constructed ahead of time so that it doesn't try to
create new strings while we're emitting everything.

This reverts commit a8ff9bccb399183cdd5f1c3cec2bda763664b4b0.

llvm-svn: 151864
2012-03-02 00:30:24 +00:00
Evan Cheng d12af5dc69 Neuter the optimization I implemented with r107852 and r108258 which turn some
floating point equality comparisons into integer ones with -ffast-math. The
issue is the optimization causes +0.0 != -0.0.

Now the optimization is only done when one side is known to be 0.0. The other
side's sign bit is masked off for the comparison.

rdar://10964603

llvm-svn: 151861
2012-03-01 23:27:13 +00:00
Chandler Carruth 396260c484 Re-disable the debug output. The comment is there explaining why we want
to keep this around -- updating golden tests is annoying otherwise.

Thanks to Benjamin for pointing this omission out on IRC.

llvm-svn: 151860
2012-03-01 23:20:45 +00:00
Chandler Carruth 93cffd2fb5 Switch FoldingSet over to the new hashing infrastructure. We might want
to do more invasive refactoring here to get FoldingSet to use size_t or
even hash_code directly, but for now this is a good first step to remove
Yet Another Hashing Algorithm from LLVM.

llvm-svn: 151859
2012-03-01 23:18:44 +00:00
Chandler Carruth 3da579832f Provide the 32-bit variant of the golden tests. Not sure how I forgot to
do this initially, sorry.

llvm-svn: 151857
2012-03-01 23:06:19 +00:00
Jakob Stoklund Olesen 693225f04a Handle regmasks in Thumb1RegisterInfo::saveScavengerRegister().
This function could have r12 live across a function call when compiling
thumb1 code.

The test case for this is not included because it is very long. It must
provoke emergency spilling near a function call. The behavior is
provoked by MultiSource/Applications/JM/lencod, and it triggers an
assertion in the scavenger.

<rdar://problem/10963642>

llvm-svn: 151855
2012-03-01 22:57:32 +00:00
Eric Christopher 66b0721014 Reorder the sections being output to reduce the number of assembler
fixups that are being used to determine section offsets. Reduces
the total number of fixups by 50% for a non-trivial testcase.

Part of rdar://10413936

llvm-svn: 151852
2012-03-01 22:50:31 +00:00
Jim Grosbach 6990e5f08c ARM use the right opcode for FP<->Integer move in fast-isel.
rdar://10965031

llvm-svn: 151850
2012-03-01 22:47:09 +00:00
Michael J. Spencer 35145f830a Minimal changes for LLVM to compile under VS11.
llvm-svn: 151849
2012-03-01 22:42:52 +00:00
Akira Hatanaka 5350c24509 Changes for migrating to using register mask operands.
llvm-svn: 151847
2012-03-01 22:27:29 +00:00
David Meyer c429b80da1 [Object]
Add ObjectFile::getLoadName() for retrieving the soname/installname of a shared object.

llvm-svn: 151845
2012-03-01 22:19:54 +00:00
Kevin Enderby f0269b4270 Change ARMInstPrinter::printPredicateOperand() so it will not abort if it
runs into the undefined 15 condition code value.

llvm-svn: 151844
2012-03-01 22:13:02 +00:00
Akira Hatanaka 6bbe1f0d10 Fix bugs which were introduced when support for base+index floating point loads
and stores was added.

- SelectAddr should return false if Parent is an unaligned f32 load or store.
- Only aligned load and store nodes should be matched to select reg+imm
  floating point instructions.
- MIPS does not have support for f64 unaligned load or store instructions.

llvm-svn: 151843
2012-03-01 22:12:30 +00:00
Benjamin Kramer f7e02a0cab BumpPtrAllocator: Make sure threshold cannot be initialized with a value smaller than the slab size.
This replaces r151834 with a simpler fix.

llvm-svn: 151842
2012-03-01 22:10:16 +00:00
Chandler Carruth b4f6a51184 Fix two warnings in this code that I missed.
llvm-svn: 151839
2012-03-01 21:45:51 +00:00
Argyrios Kyrtzidis 16558f4d3b If BumpPtrAllocator is requested to allocate a size that exceeds the slab size,
increase the slab size.

llvm-svn: 151834
2012-03-01 20:36:32 +00:00
Preston Gurd be1c875a1c Trivial change to make the test use Use –mcpu=generic,
so that the test will not fail when run on an Intel Atom
processor, due to the Atom scheduler producing an instruction sequence that is
different from that which is normally expected.

llvm-svn: 151832
2012-03-01 19:57:20 +00:00
Argyrios Kyrtzidis 0b21b3d580 Move include/llvm/ADT/SaveAndRestore.h -> include/llvm/Support/SaveAndRestore.h
llvm-svn: 151828
2012-03-01 19:45:47 +00:00
Chandler Carruth 34085df4e8 Add the source file with trivial definitions in it that was missing from
r151822, sorry sorry. =[

We need 'git svn nothave' or some such...

llvm-svn: 151824
2012-03-01 18:58:59 +00:00
Chandler Carruth 1d03a3b6b1 Rewrite LLVM's generalized support library for hashing to follow the API
of the proposed standard hashing interfaces (N3333), and to use
a modified and tuned version of the CityHash algorithm.

Some of the highlights of this change:
 -- Significantly higher quality hashing algorithm with very well
    distributed results, and extremely few collisions. Should be close to
    a checksum for up to 64-bit keys. Very little clustering or clumping of
    hash codes, to better distribute load on probed hash tables.
 -- Built-in support for reserved values.
 -- Simplified API that composes cleanly with other C++ idioms and APIs.
 -- Better scaling performance as keys grow. This is the fastest
    algorithm I've found and measured for moderately sized keys (such as
    show up in some of the uniquing and folding use cases)
 -- Support for enabling per-execution seeds to prevent table ordering
    or other artifacts of hashing algorithms to impact the output of
    LLVM. The seeding would make each run different and highlight these
    problems during bootstrap.

This implementation was tested extensively using the SMHasher test
suite, and pased with flying colors, doing better than the original
CityHash algorithm even.

I've included a unittest, although it is somewhat minimal at the moment.
I've also added (or refactored into the proper location) type traits
necessary to implement this, and converted users of GeneralHash over.

My only immediate concerns with this implementation is the performance
of hashing small keys. I've already started working to improve this, and
will continue to do so. Currently, the only algorithms faster produce
lower quality results, but it is likely there is a better compromise
than the current one.

Many thanks to Jeffrey Yasskin who did most of the work on the N3333
paper, pair-programmed some of this code, and reviewed much of it. Many
thanks also go to Geoff Pike Pike and Jyrki Alakuijala, the original
authors of CityHash on which this is heavily based, and Austin Appleby
who created MurmurHash and the SMHasher test suite.

Also thanks to Nadav, Tobias, Howard, Jay, Nick, Ahmed, and Duncan for
all of the review comments! If there are further comments or concerns,
please let me know and I'll jump on 'em.

llvm-svn: 151822
2012-03-01 18:55:25 +00:00
Benjamin Kramer c3098f2ab2 Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.
llvm-svn: 151821
2012-03-01 18:16:35 +00:00
Chad Rosier 2913f500fa Revert r151816 as Jim has the appropriate fix.
llvm-svn: 151818
2012-03-01 17:41:19 +00:00
Chad Rosier f0208ed76a Fix testcases from r151807.
llvm-svn: 151816
2012-03-01 17:31:30 +00:00
Jim Grosbach e89025b8ce Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.
Allows us to de-virtualize the function and provides access to it in
the instruction printer, which is useful for handling composite
physical registers (e.g., ARM register lists).

llvm-svn: 151815
2012-03-01 17:30:39 +00:00
Jim Grosbach 53733cdb23 Revert "Emit the SubRegTable with the smallest possible integer type."
This reverts commit 151760.

We want to move getSubReg() from TargetRegisterInfo into MCRegisterInfo,
but to do that, the type of the lookup table needs to be the same for
all targets.

llvm-svn: 151814
2012-03-01 17:30:35 +00:00
Jim Grosbach 394ad59d90 Add missing triple for tests.
Make darwin bots happier.

llvm-svn: 151813
2012-03-01 17:30:32 +00:00
Jia Liu b1cb18468b rplace Alpha with ARM in docs/WritingAnLLVMBackend.html, patch by chenwj
llvm-svn: 151811
2012-03-01 15:14:19 +00:00
James Molloy f6298e9281 Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even though they could have sideeffects.
Only allow log2/exp2 to be converted to an intrinsic if they are declared "readnone".

llvm-svn: 151807
2012-03-01 14:32:18 +00:00
Benjamin Kramer e39d7ac396 Make TargetRegisterClasses non-virtual by making the only virtual function a function pointer.
This allows us to make TRC non-polymorphic and value-initializable, eliminating a huge static
initializer and a ton of cruft from the generated code.

Shrinks ARMBaseRegisterInfo.o by ~100k.

llvm-svn: 151806
2012-03-01 13:37:55 +00:00
NAKAMURA Takumi 74e736f0eb llvm/test/CMakeLists.txt: Update dependencies to add llvm-readobj to "check".
llvm-svn: 151795
2012-03-01 03:14:13 +00:00
Benjamin Kramer acd78d5092 Emit the "is an intrinsic overloaded" table as a bitfield.
llvm-svn: 151792
2012-03-01 02:16:57 +00:00
Akira Hatanaka 1ee768db53 Pass endian information to constructors. Define separate functions to create
objects for big endian and little endian targets.

Patch by Jack Carter.

llvm-svn: 151788
2012-03-01 01:53:15 +00:00
Jakob Stoklund Olesen abe8c09b20 Make InlineSpiller bundle-aware.
Simply treat bundles as instructions. Spill code is inserted between
bundles, never inside a bundle.  Rewrite all operands in a bundle at
once.

Don't attempt and memory operand folding inside bundles.

llvm-svn: 151787
2012-03-01 01:43:25 +00:00
David Meyer 2fc34c5f84 [Object]
* Add begin_dynamic_table() / end_dynamic_table() private interface to ELFObjectFile.
* Add begin_libraries_needed() / end_libraries_needed() interface to ObjectFile, for grabbing the list of needed libraries for a shared object or dynamic executable.
* Implement this new interface completely for ELF, leave stubs for COFF and MachO.
* Add 'llvm-readobj' tool for dumping ObjectFile information.

llvm-svn: 151785
2012-03-01 01:36:50 +00:00
Jakob Stoklund Olesen d256c21666 Move getBundleStart() into MachineInstrBundle.h.
This allows the function to be inlined, and makes it suitable for use in
getInstructionIndex().

Also provide a const version. C++ is great for touch typing practice.

llvm-svn: 151782
2012-03-01 01:26:01 +00:00
Benjamin Kramer aba3503639 Emit the intrinsic modref info as a lookup table instead of a huge switch.
Shrinks BasicAliasAnalysis.o from 106k to 56k on i386.

llvm-svn: 151781
2012-03-01 01:18:32 +00:00
Lang Hames 76e66c31a0 Don't redundantly copy implicit operands when rematerializing.
While we're at it - don't copy vreg implicit operands while rematerializing.
This fixes PR12138.

llvm-svn: 151779
2012-03-01 00:41:17 +00:00
Richard Trieu 37ddc0fab6 Fix flags for test in MC/MachO/ARM/empty-function-nop.ll
llvm-svn: 151778
2012-03-01 00:29:09 +00:00
Sean Callanan 0a5597d356 Fixed the 32-bit runtime dynamic loader to allocate
code sections when needed.  It just had a conditional
the wrong way around.

llvm-svn: 151777
2012-03-01 00:15:29 +00:00
Benjamin Kramer 0aafd06a85 Implement getSubRegIndex as a linear search on the SubRegTable instead of using a big switch.
- The search bounds are constant, in the worst case (ARM target) it will scan over 30 uint16_ts.
- This method isn't very hot, I had problems finding a testcase where it's called more than a dozen of times (no perf impact).

llvm-svn: 151773
2012-02-29 23:46:50 +00:00
Kevin Enderby b119c08af3 Added annotations for x86 pc relative loads to llvm's 'C' disassembler.
So with darwin's otool(1) an x86_64 hello world .o file will print:
leaq	L_.str(%rip), %rax ## literal pool for: Hello world

llvm-svn: 151769
2012-02-29 22:58:34 +00:00
Jim Grosbach 3f4b23933f Tidy up. 80 columns.
llvm-svn: 151764
2012-02-29 22:07:56 +00:00
Benjamin Kramer c80c3fd5a7 Emit the SubRegTable with the smallest possible integer type.
Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets.

llvm-svn: 151760
2012-02-29 21:57:08 +00:00
Jim Grosbach 43bb61ea29 Tidy up. Spelling.
llvm-svn: 151758
2012-02-29 21:46:32 +00:00
Jim Grosbach 8d2f09117b Move the subregister indicies enum into the REGINFO_ENUM section.
llvm-svn: 151756
2012-02-29 21:43:16 +00:00
Daniel Dunbar 842bb492a9 BitstreamWriter: Use SmallVector::append instead of multiple push_back calls.
llvm-svn: 151755
2012-02-29 21:02:05 +00:00
Jim Grosbach f591df6dd7 Switch TargetRegisterInfo::getSubReg() to use a lookup table.
Instead of nested switch statements, use a lookup table. On ARM, this replaces
a 23k (x86_64 release build) function with a 16k table. Its not unlikely to
be faster, as well.

llvm-svn: 151751
2012-02-29 20:31:17 +00:00
Daniel Dunbar 42fcf81aba BitstreamWriter: Change primary output buffer to be a SmallVector instead of an
std::vector.
 - Good for 1-2% speedup on writing PCH for Cocoa.h.
 - Clang side API match to follow shortly, there wasn't an easy way to make this
   non-breaking.

llvm-svn: 151750
2012-02-29 20:31:09 +00:00
Daniel Dunbar 60df263f54 BitstreamWriter: Isolate access to the underlying buffer.
llvm-svn: 151749
2012-02-29 20:31:05 +00:00
Daniel Dunbar 6e45c02c48 BitcodeWriter: Expose less implementation details -- make BackpatchWord private
and remove getBuffer().

llvm-svn: 151748
2012-02-29 20:31:01 +00:00
Daniel Dunbar 5fa5ecf852 Bitcode: Don't expose WriteBitcodeToStream to clients.
llvm-svn: 151747
2012-02-29 20:30:56 +00:00
Andrew Trick 6eb6528b98 Intel Atom instruction itineraries for mov sign extension and mov zero extension.
Patch by Tyler Nowicki!

llvm-svn: 151743
2012-02-29 19:44:41 +00:00
Hal Finkel 230e870df5 Add myself to the credits file
llvm-svn: 151732
2012-02-29 16:43:11 +00:00
Benjamin Kramer d05a0c6c42 LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier.
llvm-svn: 151722
2012-02-29 13:27:00 +00:00
Duncan Sands bb2fe65542 Have GVN also do condition propagation when the right-hand side is not
a constant.  This fixes PR1768.

llvm-svn: 151713
2012-02-29 11:12:03 +00:00
Nick Lewycky efe5e2ea9f Where the alloca'd space actually lives in ram is undefined, and attempting to
pin it down is undefined behaviour.

llvm-svn: 151710
2012-02-29 08:26:44 +00:00
David Meyer 7e4b976c36 [Object] Add symbol attribute flags: ST_ThreadLocal, ST_Common, and ST_Undefined. Implement these completely for ELF.
Rename ST_External to ST_Unknown, and slightly change its semantics. It now only indicates that the symbol's type
is unknown, not that the symbol is undefined. (For that, use ST_Undefined).

llvm-svn: 151696
2012-02-29 02:11:55 +00:00
Bill Wendling 7f9f5680ca Testcase for r151691.
llvm-svn: 151694
2012-02-29 01:53:13 +00:00
Bill Wendling f2c78f344e Restrict this transformation to equality conditions.
This transformation is not correct for not-equal conditions:

(trunc x) != C1 & (and x, CA) != C2 -> (and x, CA|CMAX) != C1|C2

Let
  C1 == 0
  C2 == 0
  CA == 0xFF0000
  CMAX == 0xFF
and truncating to i8.

The original truth table:

    x   | A: trunc x != 0 | B: x & 0xFF0000 != 0 | A & B != 0
--------------------------------------------------------------
0x00000 |        0        |          0           |     0
0x00001 |        1        |          0           |     0
0x10000 |        0        |          1           |     0
0x10001 |        1        |          1           |     1

The truth table of the replacement:

    x   | x & 0xFF00FF != 0
----------------------------
0x00000 |        0
0x00001 |        1
0x10000 |        1
0x10001 |        1

So they are different.

llvm-svn: 151691
2012-02-29 01:46:50 +00:00
Jakob Stoklund Olesen 9e821456a3 Add an analyzeVirtReg() function.
This function does more or less the same as
MI::readsWritesVirtualRegister(), but it supports bundles as well.

It also determines if any constraint requires reading and writing
operands to use the same register.  Most clients want to know.

Use the more modern MO.readsReg() instead of trying to sort out undefs
and partial redefines.  Stop supporting the extra full <imp-def> operand
as an alternative to <def,undef> sub-register defines.

llvm-svn: 151690
2012-02-29 01:40:37 +00:00
Derek Schuff 56b662ce0f Make MemoryObject accessor members const again
llvm-svn: 151687
2012-02-29 01:09:06 +00:00
Daniel Dunbar 39ea458b73 Support/PathV2: Fix namespace qualifier in make_absolute(), for Win32.
llvm-svn: 151685
2012-02-29 00:46:46 +00:00
Jakob Stoklund Olesen 8017d80505 Move the operand iterator into MachineInstrBundle.h where it belongs.
Extract a base class and provide four specific sub-classes for iterating
over const/non-const bundles/instructions.

This eliminates the mystery bool constructor argument.

llvm-svn: 151684
2012-02-29 00:33:41 +00:00
Daniel Dunbar b23158c3b7 Support/PathV2: Fix make_absolute() to match is_absolute() and not expect to
find root names on Unix.
 - This fixes make_absolute to not basically always call current_path() on
   Unix systems.
 - I think the API probably needs cleanup in this area, but I'll let Michael
   handle that.

llvm-svn: 151681
2012-02-29 00:20:37 +00:00
Daniel Dunbar beb342539c Fix some stray semi-colons.
llvm-svn: 151680
2012-02-29 00:20:33 +00:00
Derek Schuff 92ef975cc5 Fix PR12080 by ensuring that MaterializeModule actually reads all the bitcode
in the streaming case.

llvm-svn: 151676
2012-02-29 00:07:09 +00:00
Michael J. Spencer e646239e5e [PathV2] Fix bug in relative_path.
llvm-svn: 151675
2012-02-29 00:06:24 +00:00
Jim Grosbach 617f84ddbd ARM implement TargetInstrInfo::getNoopForMachoTarget()
Without this hook, functions w/ a completely empty body (including no
epilogue) will cause an MCEmitter assertion failure.

For example,
define internal fastcc void @empty_function() {
  unreachable
}

rdar://10947471

llvm-svn: 151673
2012-02-28 23:53:30 +00:00
Jakob Stoklund Olesen 3a184f903c Instructions inside a bundle have the same number as the bundle itself.
SlotIndexes are not assigned to instructions inside bundles, but it is
still valid to look up the index of those instructions.

The reverse getInstructionFromIndex() will return the first instruction
in the bundle.

llvm-svn: 151672
2012-02-28 23:52:31 +00:00
David Meyer 1df4b84db4 In the ObjectFile interface, replace isInternal(), isAbsolute(), isGlobal(), and isWeak(), with a bitset of flags.
llvm-svn: 151670
2012-02-28 23:47:53 +00:00
Rafael Espindola 42e94d11a1 Enable -Wcovered-switch-default again, but add -Werror to the checks to make
sure we don't use it with compilers that don't support it.

llvm-svn: 151665
2012-02-28 23:32:06 +00:00
Lang Hames 2fbad222e1 Kill off LiveRangeEdit::getNewVRegs and LiveRangeEdit::getUselessVRegs. These
methods are no longer needed now that LinearScan has gone away.

(Contains tweaks trivialSpillEverywhere to enable the removal of getNewVRegs).

llvm-svn: 151658
2012-02-28 22:07:24 +00:00
Rafael Espindola c22c85c29c On ELF, create relocations to the abbreviation and line sections when producing
debug info for assembly files. We were already doing the right thing when
producing debug info for C/C++.

ELF linkers don't know dwarf, so they depend on these relocations to produce
valid dwarf output.

llvm-svn: 151655
2012-02-28 21:13:05 +00:00
Chandler Carruth 0bd3913d96 Temporarily revert r151609, which enabled a new warning for LLVM and
Clang builds. The detection logic for compilers that support the warning
isn't working. Rafael is going to investigate it, but didn't want people
to have to wade through build spam until then.

llvm-svn: 151649
2012-02-28 19:26:56 +00:00
Jim Grosbach a0ec8896ac ARM vbit/vbif/vbsl assembly optional size suffix.
These instructions accept but do not require a size suffix.

rdar://10947225

llvm-svn: 151646
2012-02-28 19:11:07 +00:00
Evan Cheng 65f9d19c4f Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
llvm-svn: 151645
2012-02-28 18:51:51 +00:00
Benjamin Kramer f2e160c665 Fix off-by one in comment.
llvm-svn: 151644
2012-02-28 18:37:06 +00:00
Roman Divacky 34d4b9682b Properly MCize the section switch, removing a FIXME.
llvm-svn: 151639
2012-02-28 18:15:25 +00:00
Benjamin Kramer 0c281a7deb LegalizeIntegerTypes: Reenable the large shift with small amount optimization.
To avoid problems with zero shifts when getting the bits that move between words
we use a trick: first shift the by amount-1, then do another shift by one. When
amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32.

Also fix a latent bug that emitted the low and high words in the wrong order
when shifting right.

Fixes PR12113.

llvm-svn: 151637
2012-02-28 17:58:00 +00:00
Daniel Dunbar ee7b899343 Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
llvm-svn: 151630
2012-02-28 15:36:07 +00:00
Daniel Dunbar 9512c46cc3 Remove stray semi-colon.
llvm-svn: 151629
2012-02-28 15:35:52 +00:00
Nadav Rotem 1d666099be Code cleanup following CR by Duncan.
llvm-svn: 151627
2012-02-28 14:13:19 +00:00
Nadav Rotem 875e463b19 Fix a bug in the code that builds SDNodes from vector GEPs.
When the GEP index is a vector of pointers, the code that calculated the size
of the element started from the vector type, and not the contained pointer type.
As a result, instead of looking at the data element pointed by the vector, this
code used the size of the vector. This works for 32bit members (on 32bit
systems), but not for other types. Added code to peel the vector type and
added a test.

llvm-svn: 151626
2012-02-28 11:54:05 +00:00
Jia Liu f54f60f3ce remove blanks, and some code format
llvm-svn: 151625
2012-02-28 07:46:26 +00:00
Evan Cheng 87c7b09d8d Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.

Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.

rdar://8979299

llvm-svn: 151623
2012-02-28 06:42:03 +00:00
Craig Topper ccd651cac8 Convert generated intrinsic attributes to use an array lookup as Chris suggested in PR11951.
llvm-svn: 151622
2012-02-28 06:32:00 +00:00
Pete Cooper 39b5255df4 Reverted r152620 - DSE: Shorten memset when a later store overwrites the start of it. There were all sorts of buildbot issues
llvm-svn: 151621
2012-02-28 05:06:24 +00:00
Pete Cooper f3862f91de DSE: Shorten memset when a later store overwrites the start of it
llvm-svn: 151620
2012-02-28 04:27:10 +00:00
Bill Wendling d48b7783e8 Oops...Don't commit the other stuff..
llvm-svn: 151618
2012-02-28 04:01:21 +00:00
Bill Wendling 73799f68d8 Modify comment to reflect the importance of this code.
llvm-svn: 151617
2012-02-28 03:47:09 +00:00
Akira Hatanaka b2b980e628 Add comments.
llvm-svn: 151615
2012-02-28 03:18:43 +00:00
Akira Hatanaka b8a8e0c262 Do not reserve $gp as a dedicated global base register if the target ABI is not O32.
llvm-svn: 151614
2012-02-28 03:17:38 +00:00
Charles Davis e56294dbc6 Strip extraneous information, if present, from the linker version string on
Mac OS X. Patch by Fabian Groffen, with a slight tweak by me.

llvm-svn: 151612
2012-02-28 02:55:41 +00:00
Akira Hatanaka 330d901ce3 Add support for floating point base register + offset register addressing mode
load and store instructions.

llvm-svn: 151611
2012-02-28 02:55:02 +00:00
Jakob Stoklund Olesen 4c5ad2b812 Handle regmasks in MachineCSE.
Don't attempt to extend physreg live ranges across calls.

<rdar://problem/10942095>

llvm-svn: 151610
2012-02-28 02:08:50 +00:00
Rafael Espindola 334eaeae8e Enable -Wcovered-switch-default as it matches the switch style used in llvm.
llvm-svn: 151609
2012-02-28 02:01:55 +00:00
Jakob Stoklund Olesen 16c4a972db Handle regmasks in the machine code verifier.
llvm-svn: 151607
2012-02-28 01:42:41 +00:00
Jakob Stoklund Olesen 92c15b2b2c Enable ARM base pointer when calling functions with large arguments.
When an outgoing call takes more than 2k of arguments on the stack, we
don't allocate that call frame in the prolog, but adjust the stack
pointer immediately before the call instead.

This causes problems with the emergency spill slot because PEI can't
track stack pointer adjustments on the second pass, and if the outgoing
arguments are too big, SP can't be used to reach the emergency spill
slot at all.

Work around these problems by ensuring there is a base or frame pointer
that can be used to access the emergency spill slot.

<rdar://problem/10917166>

llvm-svn: 151604
2012-02-28 01:15:01 +00:00
Michael J. Spencer 8c4729fd44 [Object] Add {begin,end}_dynamic_symbols stubs and implementation for ELF.
Add -D option to llvm-nm to dump dynamic symbols.

Patch by David Meyer.

llvm-svn: 151600
2012-02-28 00:40:37 +00:00
Chad Rosier 248c29966c Fix 80-column violation.
llvm-svn: 151599
2012-02-28 00:23:01 +00:00
Hal Finkel c947412fae Allow llvm-stress to optionally generate the other floating-point types (half, ppcf128, mmx, etc.)
llvm-svn: 151596
2012-02-27 23:59:33 +00:00
Bill Wendling 2b3f61af18 Add back removed code. It still causes LLVM to miscompile. But not having it breaks other things.
llvm-svn: 151594
2012-02-27 23:48:30 +00:00
Preston Gurd a49ef92a76 This patch adds instruction latencies for the SSE instructions
to the instruction scheduler for the Intel Atom.

llvm-svn: 151590
2012-02-27 23:35:03 +00:00
Preston Gurd 43b2506e32 test commit.
llvm-svn: 151588
2012-02-27 23:31:51 +00:00
Eli Friedman 0774902a00 Duncan pointed out that if the alignment isn't explicitly specified, it defaults to the ABI alignment. Given that, make this code a bit more aggressive in such cases.
llvm-svn: 151584
2012-02-27 23:16:46 +00:00
Evandro Menezes cf95bb758c Delete incorrect reference to inexistent Hexagon architecture manuals.
llvm-svn: 151582
2012-02-27 23:00:52 +00:00
Bill Wendling 688793da4a Don't use #if 0. Just remove until I can address this.
llvm-svn: 151580
2012-02-27 22:55:40 +00:00
Bill Wendling 06e4818dd6 XFAIL test until <rdar://problem/10913281> is fixed.
llvm-svn: 151578
2012-02-27 22:53:42 +00:00
Bill Wendling 7b4646184b The code that cleans up multiple, isomorphic types has a subtle error that
manifests itself when building LLVM with LTO.
<rdar://problem/10913281>

llvm-svn: 151576
2012-02-27 22:34:19 +00:00
Michael J. Spencer 15a7b8e26a Remove duplicate copy of Object/ELF.h that somehow managed to get in.
Patch by David Meyer.

llvm-svn: 151575
2012-02-27 22:06:44 +00:00
Evan Cheng ddeb9d11fe Fix for PR12090: clear def maps of aliases when visiting a copy. e.g.
%S5<def> = COPY %S0<kill>
First clear def map of Q1, etc.

No small test case available.

llvm-svn: 151574
2012-02-27 21:46:42 +00:00
Jim Grosbach 7b811d30d9 ARM BL/BLX instruction fixups should use relocations.
We on the linker to resolve calls to the appropriate BL/BLX instruction
to make interworking function correctly. It uses the symbol in the
relocation to do that, so we need to be careful about being too clever.

To enable this for ARM mode, split the BL/BLX fixup kind off from the
unconditional-branch fixups.

rdar://10927209

llvm-svn: 151571
2012-02-27 21:36:23 +00:00
Argyrios Kyrtzidis 65545aa904 Move "clang/Analysis/Support/SaveAndRestore.h" to "llvm/ADT/SaveAndRestore.h"
to make it more widely available.

llvm-svn: 151564
2012-02-27 21:08:33 +00:00
Eli Friedman 8bc169c3c5 Teach BasicAA about the LLVM IR rules that allow reading past the end of an object given sufficient alignment. Fixes PR12098.
llvm-svn: 151553
2012-02-27 20:46:07 +00:00
Roman Divacky ded7f01062 Test the section specification.
llvm-svn: 151552
2012-02-27 20:42:19 +00:00
Derek Schuff e932a68575 Fix PR12089
http://llvm.org/bugs/show_bug.cgi?id=12089

llvm-svn: 151550
2012-02-27 20:31:47 +00:00
Roman Divacky 8fe40cd659 Reapply r151278 with fixes.
MCize function entry label emission on PowerPC64 properly.

llvm-svn: 151547
2012-02-27 20:20:47 +00:00
Chad Rosier a72393a3f9 Add q suffix aliases for the fistp and fisttp mnemonics.
rdar://10921670
PR11935

llvm-svn: 151543
2012-02-27 19:43:12 +00:00
Akira Hatanaka b260f206d2 Remove unnecessary template parameters.
llvm-svn: 151540
2012-02-27 19:17:53 +00:00
Akira Hatanaka 3c5cab4730 Fix instruction predicates that were not set correctly.
llvm-svn: 151538
2012-02-27 19:09:08 +00:00
Jakob Stoklund Olesen 5aafb56dc0 Update machine code verifier.
After the SlotIndex slot names were updated, it is possible to apply
stricter checks to live intervals.

Also treat bundles as bags of operands when checking live intervals.

llvm-svn: 151531
2012-02-27 18:24:30 +00:00
Kevin Enderby 1489b523c3 Fix the symbolic operand added for the C disassmbler API for the ARM bl
thumb instruction.  The PC adjustment is +4 in Thumb mode and +8 in ARM mode.

llvm-svn: 151530
2012-02-27 18:15:15 +00:00
Jakob Stoklund Olesen 1f152baef8 Add a MachineOperand iterator class.
The MIOperands iterator can visit operands on a single instruction, or
all operands in a bundle.  This simplifies code like the register
allocator that treats bundles as a set of operands.

llvm-svn: 151529
2012-02-27 18:09:36 +00:00
Benjamin Kramer 93887631d9 Plog a memleak in GlobalOpt.
Found by valgrind.

llvm-svn: 151525
2012-02-27 12:48:24 +00:00
Duncan Sands 9edea84420 Micro-optimization, no functionality change.
llvm-svn: 151524
2012-02-27 12:11:41 +00:00
Jay Foad 8e9d47c039 Help the compiler to eliminate some dead code when hashing an array of T
where sizeof (T) is a multiple of 4.

llvm-svn: 151523
2012-02-27 11:00:17 +00:00
Duncan Sands 1be25a78f7 The value numbering function is recursive, so it is possible for multiple new
value numbers to be assigned when calculating any particular value number.
Enhance the logic that detects new value numbers to take this into account,
for a tiny compile time speedup.  Fix a comment typo while there.

llvm-svn: 151522
2012-02-27 09:54:35 +00:00
Duncan Sands 27f459519d When performing a conditional branch depending on the value of a comparison
%cmp (eg: A==B) we already replace %cmp with "true" under the true edge, and
with "false" under the false edge.  This change enhances this to replace the
negated compare (A!=B) with "false" under the true edge and "true" under the
false edge.  Reported to improve perlbench results by 1%.

llvm-svn: 151517
2012-02-27 08:14:30 +00:00
Craig Topper 317640dfd0 Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen.
llvm-svn: 151514
2012-02-27 02:59:43 +00:00
Craig Topper 8e76068c6e Update tblgen command guide. Remove unused tblgen InstrEnumEmitter files.
llvm-svn: 151513
2012-02-27 02:31:09 +00:00
Jia Liu f6de2daf13 delete useless comment&blank
llvm-svn: 151512
2012-02-27 02:21:34 +00:00
Rafael Espindola 09a4201d3c Fix this assert. IP can point to an instruction with strange dominance
properties (invoke). Just assert that the instruction we return dominates
the insertion point.

llvm-svn: 151511
2012-02-27 02:13:03 +00:00
Craig Topper 6491c8020e X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo.
llvm-svn: 151510
2012-02-27 01:54:29 +00:00
Chad Rosier ce50eec7c6 Remove more GCC FE build stuff.
llvm-svn: 151507
2012-02-26 22:26:37 +00:00
Chad Rosier 579b40db6a Installing the GCC front end is no longer supported.
llvm-svn: 151506
2012-02-26 22:17:05 +00:00
Chad Rosier 2270b005bb Cleanup the LLVM Getting Started page.
llvm-svn: 151505
2012-02-26 22:12:59 +00:00
Chad Rosier 690a2b0902 Add href to clang in overview.
llvm-svn: 151503
2012-02-26 21:34:02 +00:00
Chad Rosier 233f147691 Remove references to llvm-gcc from overview and tutorial.
llvm-svn: 151502
2012-02-26 21:31:25 +00:00
Nadav Rotem e4972ddea4 Add support for random constant vectors.
Patch by Joey Gouly.

llvm-svn: 151489
2012-02-26 13:56:18 +00:00
Nadav Rotem 115ec82ec7 Style fix: Remove unneeded parentheses.
llvm-svn: 151488
2012-02-26 12:34:17 +00:00
Nadav Rotem 63ff91d22a Fix a bug in the code that checks if a store value is a vector of i1s
llvm-svn: 151487
2012-02-26 12:00:22 +00:00
Nadav Rotem dc497b6c1c Fix compilation on MSVC. Rename "_BB" to "Block"
Thanks zygoloid.

llvm-svn: 151481
2012-02-26 08:59:25 +00:00
Nadav Rotem 089cf4211c fix a copy-and-paste error in the docs
llvm-svn: 151480
2012-02-26 08:43:43 +00:00
Nadav Rotem 78bda89412 Add a random .LL file generator to stress-test different llvm components.
llvm-svn: 151479
2012-02-26 08:35:53 +00:00
Rafael Espindola a640db900a Add testcase for the previous commit.
llvm-svn: 151475
2012-02-26 05:49:57 +00:00
Rafael Espindola b660977c67 Don't call dominates on unreachable instructions. Should fix the dragonegg
build. Testcase is still reducing.

llvm-svn: 151474
2012-02-26 05:30:08 +00:00
Hal Finkel a1d6afeddf Default TargetData alignment information for 128-bit floating-point types.
llvm-svn: 151473
2012-02-26 04:13:31 +00:00
Rafael Espindola ae725715ef And update the comment...
llvm-svn: 151472
2012-02-26 02:36:56 +00:00
Rafael Espindola fa75542078 Enable the assert that got all this dominator work started.
llvm-svn: 151471
2012-02-26 02:29:18 +00:00
Rafael Espindola 654320a0bb Use the DT dominates function in the verifier.
llvm-svn: 151470
2012-02-26 02:23:37 +00:00
Rafael Espindola 94df267db3 Change the implementation of dominates(inst, inst) to one based on what the
verifier does. This correctly handles invoke.
Thanks to Duncan, Andrew and Chris for the comments.
Thanks to Joerg for the early testing.

llvm-svn: 151469
2012-02-26 02:19:19 +00:00
Rafael Espindola bfa7579801 Don't call dominates on unreachable instructions.
llvm-svn: 151468
2012-02-26 02:14:25 +00:00
Nick Lewycky 3db143ea8c Reinstate the optimization from r151449 with a fix to not turn 'gep %x' into
'gep null' when the icmp predicate is unsigned (or is signed without inbounds).

llvm-svn: 151467
2012-02-26 02:09:49 +00:00
Rafael Espindola c8c2b06a90 Don't call dominates on unreachable instructions.
llvm-svn: 151466
2012-02-26 01:50:14 +00:00
Nick Lewycky 7bbd72da46 Roll these back to r151448 until I figure out how they're breaking
MultiSource/Applications/lua.

llvm-svn: 151463
2012-02-25 23:01:19 +00:00
Nick Lewycky eeeffbb497 An argument and a local identified object (eg. a noalias call) could turn out
equal if both are null. In the test, scope type %t and global @y by adding a
'gep' prefix to them.

llvm-svn: 151452
2012-02-25 20:19:07 +00:00
Nick Lewycky 7b99bada0b Fix five-letter typo in comment.
llvm-svn: 151450
2012-02-25 19:12:58 +00:00
Nick Lewycky 51f2be8bff Teach instsimplify to be more aggressive when analyzing comparisons of pointers
by using llvm::isIdentifiedObject. Also teach it to handle GEPs that have
the same base pointer and constant operands. Fixes PR11238!

llvm-svn: 151449
2012-02-25 19:07:42 +00:00
Nick Lewycky 3f885b65a2 Move isKnownNonNull from private implementation detail of BasicAA to a public
function that others can use, next to llvm::isIdentifiedObject.

llvm-svn: 151446
2012-02-25 10:56:28 +00:00
Nick Lewycky d489edff7f Remove spurious emacs mode marker.
llvm-svn: 151440
2012-02-25 07:20:06 +00:00
Hal Finkel 6fd2b434bd Revert r151278, breaks static linking.
Reverting this because it breaks static linking on ppc64. Specifically, it may be linkonce_odr functions that are the problem.
With this patch, if you link statically, calls to some functions end up calling their descriptor addresses instead
of calling to their entry points. This causes the execution to fail with SIGILL (b/c the descriptor address just
has some pointers, not code).

llvm-svn: 151433
2012-02-25 03:40:11 +00:00
NAKAMURA Takumi bdf94879df Target/X86: Fix assertion failures and warnings caused by r151382 _ftol2 lowering for i386-*-win32 targets. Patch by Joe Groff.
[Joe Groff] Hi everyone. My previous patch applied as r151382 had a few problems:
Clang raised a warning, and X86 LowerOperation would assert out for
fptoui f64 to i32 because it improperly lowered to an illegal
BUILD_PAIR. Here's a patch that addresses these issues. Let me know if
any other changes are necessary. Thanks.

llvm-svn: 151432
2012-02-25 03:37:25 +00:00
Chad Rosier 50e0b81ea9 Add comment.
llvm-svn: 151431
2012-02-25 03:07:57 +00:00
Chad Rosier 07d37bc1ed Add support for disabling llvm.lifetime intrinsics in the AlwaysInliner. These
are optimization hints, but at -O0 we're not optimizing.  This becomes a problem
when the alwaysinline attribute is abused.
rdar://10921594

llvm-svn: 151429
2012-02-25 02:56:01 +00:00
Lang Hames d5862ce317 Make the peephole optimizer clear kill flags on a vreg if it's about to add new
uses of the vreg, since the old kills may no longer be valid.  This was causing
-verify-machineinstrs to complain about uses after kills, and could potentially
have been causing subtle register allocation issues, but I haven't come across a
test case yet.

llvm-svn: 151425
2012-02-25 02:01:00 +00:00
Chad Rosier e48e5d2945 Fix indentation.
llvm-svn: 151420
2012-02-25 01:10:59 +00:00
Eric Christopher 73dc95c5cd Grammar-o.
llvm-svn: 151418
2012-02-25 01:02:44 +00:00
Lang Hames 31bb57bc55 Fixed typo.
llvm-svn: 151417
2012-02-25 00:46:38 +00:00
Akira Hatanaka 60f7a8e710 Add definitions of floating point multiply add/sub and negative multiply
add/sub instructions.

llvm-svn: 151415
2012-02-25 00:21:52 +00:00
Akira Hatanaka b049aef2d1 Add an option to use a virtual register as the global base register instead of
reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register. 

example:

.cpload $25       // set $gp.
...
.cprestore 16     // store $gp to stack slot 16($sp).
...
jalr $25          // function call. clobbers $gp.
lw $gp, 16($sp)   // not emitted if callee-saved reg is chosen.
...
lw $2, 4($gp)
...
jalr $25          // function call.
lw $gp, 16($sp)   // not emitted if $gp is not live after this instruction.
...

llvm-svn: 151402
2012-02-24 22:34:47 +00:00
Benjamin Kramer 9fceb90175 Remove unused cl::opt, make another opt static.
llvm-svn: 151398
2012-02-24 22:09:25 +00:00
Jakob Stoklund Olesen 7f99142804 Add missing static
llvm-svn: 151396
2012-02-24 21:52:44 +00:00
Ahmed Charles 0dca5d8f8c Fix undefined behavior.
llvm-svn: 151385
2012-02-24 19:06:15 +00:00
Jim Grosbach 09b602d85c Thumb2 asm aliases for wide bitwise w/ immediate instructions.
llvm-svn: 151384
2012-02-24 19:06:05 +00:00
Chris Lattner 01990f0e1c fix PR12075, a regression in a recent transform I added. In unreachable code, gep chains can be infinite. Just like "stripPointerCasts", use a set to keep track of visited instructions so we don't recurse infinitely.
llvm-svn: 151383
2012-02-24 19:01:58 +00:00
Michael J. Spencer 248d65e78b Add WIN_FTOL_* psudo-instructions to model the unique calling convention
used by the Win32 _ftol2 runtime function. Patch by Joe Groff!

llvm-svn: 151382
2012-02-24 19:01:22 +00:00
Jakob Stoklund Olesen 0a0a9688c5 Add a -stress-regalloc=<N> option.
This will limit all register classes to N registers in order to stress
test register allocation.

llvm-svn: 151379
2012-02-24 18:34:20 +00:00
Hal Finkel a3e6ed2161 X11/X2 loads around indirect calls on ppc64 should not be deleted.
llvm-svn: 151374
2012-02-24 17:54:01 +00:00
Hal Finkel b9a3d61894 Don't crash when a glue node contains an internal CopyToReg
This is necessary to support the existing ppc lowering code for indirect calls.
Fixes PR12071.

llvm-svn: 151373
2012-02-24 17:53:59 +00:00
Duncan Sands 926d101640 Teach GVN that x+y is the same as y+x and that x<y is the same as y>x.
llvm-svn: 151365
2012-02-24 15:16:31 +00:00
Benjamin Kramer 6fe3e3d335 SDAGBuilder: Remove register sets that were never read and prune dead code surrounding it.
llvm-svn: 151364
2012-02-24 14:01:17 +00:00
Kristof Beyls b59291a8e6 test commit. removing unnecessary whitespace.
llvm-svn: 151363
2012-02-24 13:52:45 +00:00
NAKAMURA Takumi b2ef38b999 test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll: Fixup to add -march=x86.
-mcpu does not choose arch automatically, on non-x86 hosts.

llvm-svn: 151362
2012-02-24 13:29:50 +00:00
Richard Osborne de47462012 Remove dead code.
Patch by Ahmed Charles

llvm-svn: 151360
2012-02-24 11:49:08 +00:00
Duncan Sands 69d7a91334 Workaround a miscompilation by gcc-4.3 that showed up as a failure
of the StringRef.Split2 unittest on 32 bit machines.

llvm-svn: 151358
2012-02-24 09:01:34 +00:00
Nick Lewycky e839e2895f ScheduleDAGInstrs.h:155: warning: suggest parentheses around `&&' within `||'.
llvm-svn: 151355
2012-02-24 07:59:05 +00:00
Andrew Trick 9dbbd3e553 PostRA sched: speed up physreg tracking by not abusing SparseSet.
llvm-svn: 151348
2012-02-24 07:04:55 +00:00
Jim Grosbach 213039a5a1 ARM Thumb symbol references in assembly need the low bit set.
Add support for a missed case when the symbols in a difference
expression are in the same section but not the same fragment.

rdar://10924681

llvm-svn: 151345
2012-02-24 05:12:18 +00:00
Pete Cooper 682c76b7d4 Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove duplicate patterns for selecting the intrinsics
llvm-svn: 151342
2012-02-24 03:51:49 +00:00
Jia Liu 683f8fffcf comment fix
llvm-svn: 151341
2012-02-24 02:17:26 +00:00
Jia Liu 74aa025d68 some comment fix
llvm-svn: 151340
2012-02-24 02:15:57 +00:00
Jia Liu 13830229fd comment fix
llvm-svn: 151339
2012-02-24 02:15:21 +00:00
Jia Liu 9d2d2adc25 replace a balnk with -
llvm-svn: 151337
2012-02-24 02:05:28 +00:00
Eric Christopher da97054114 If the Address of a variable is an argument then treat the entire
variable declaration as an argument because we want that address
anyhow for our debug information.

This seems to fix rdar://9965111, at least we have more debug
information than before and from reading the assembly it appears
to be the correct location.

llvm-svn: 151335
2012-02-24 01:59:08 +00:00
Eric Christopher 219d51d649 Tabs, formatting and long lines oh my!
llvm-svn: 151334
2012-02-24 01:59:01 +00:00
Jia Liu 19b0c8244b 80 columns of Mips InstPrinter Makefile
llvm-svn: 151332
2012-02-24 01:47:01 +00:00
Jakob Stoklund Olesen fa7a53746c Switch ARM target to register masks.
I'll let the buildbots determine the compile time improvements from this
change, but 464.h264ref has 5% faster codegen at -O2.

This patch does cause some assembly changes.  Branch folding can make
different decisions about calls with dead return values.
CriticalAntiDepBreaker may choose different registers because its
liveness tracking is affected.  MachineCopyPropagation may sometimes
leave a dead copy behind.

llvm-svn: 151331
2012-02-24 01:19:29 +00:00
Jim Grosbach 3a21e2c33e Make sure the regs are low regs for tMUL size reduction.
llvm-svn: 151318
2012-02-24 00:53:11 +00:00
Jim Grosbach c01104dfbf Thumb2 size reduction fix for tied operands of tMUL.
The tied source operand of tMUL is the second source operand, not the
first like every other two-address thumb instruction. Special case it
in the size reduction pass to make sure we create the tMUL instruction
properly.

llvm-svn: 151315
2012-02-24 00:33:36 +00:00
NAKAMURA Takumi c5ea5d3fa1 EE/Interpreter/ExternalFunctions.cpp: Staticize lle_X_() entries. They can be mapped in FuncNames[] at the initialization.
llvm-svn: 151313
2012-02-24 00:20:08 +00:00
NAKAMURA Takumi 7fe000581e EE/Interpreter/ExternalFunctions.cpp: Prune "C" linkage to suppress warnings with -Wreturn-type (and MSC's w4190).
In historical reason, Interpreter's external entries had prefix "lle_X_" as C linkage, even for well-known entries in EE/Interpreter.
Now, at least on ToT, they are resolved via FuncNames[] mapper.
We will not need their symbols are expected to be exported any more.

Clang r150128 has introduced the warning <"%0 has C-linkage specified, but returns user-defined type %1 which is incompatible with C">.

llvm-svn: 151312
2012-02-24 00:19:58 +00:00
Dan Gohman d4a77c4682 When emitting a cmp with 0 for a lowered select, mask out the high
bits of the value carying the boolean condition, as their contents
are undefined. This fixes rdar://10887484.

llvm-svn: 151310
2012-02-24 00:09:36 +00:00
Jim Grosbach dfd306ea3c Release not for ARM integrated assembler support.
llvm-svn: 151308
2012-02-23 23:52:06 +00:00
Bill Wendling 38b31619f6 Allow an integer to be converted into an MMX type when it's used in an inline
asm.
<rdar://problem/10106006>

llvm-svn: 151303
2012-02-23 23:25:25 +00:00
Chad Rosier 563f620932 Typo.
llvm-svn: 151302
2012-02-23 23:21:22 +00:00
Michael J. Spencer b560d079df Emit global ctors into .CRT$XCU instead of .ctors on Win32. Patch by Joe Groff!
llvm-svn: 151289
2012-02-23 21:56:08 +00:00
Chad Rosier 6e220d5ad0 The LLVM Getting Started documentation is out of date. It would be nice if
someone could update this, but for now at least reference the Clang Getting
Started document, which is much more current.

llvm-svn: 151285
2012-02-23 21:23:24 +00:00
Benjamin Kramer 00b679c127 Bump SmallString to the minimum required amount for raw_ostream to avoid allocation.
It's is a bit annoying, we should hide this implementation detail better.

llvm-svn: 151284
2012-02-23 21:15:21 +00:00
Benjamin Kramer 92d7ff9d33 Replace a DenseSet with SmallPtrSet.
SmallSet of pointer is the same as SmallPtrSet, use the latter directly.

llvm-svn: 151281
2012-02-23 20:53:02 +00:00
Roman Divacky a2d3608f78 MCize function entry label emission on PowerPC64 properly.
llvm-svn: 151278
2012-02-23 20:28:39 +00:00
Benjamin Kramer ef8bf39575 BitVectorize loop.
llvm-svn: 151274
2012-02-23 19:29:25 +00:00
Benjamin Kramer 796fd46993 post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored two meaningful states.
Rename it to LiveRegs to make it more clear what's stored inside.

llvm-svn: 151273
2012-02-23 19:15:40 +00:00
Benjamin Kramer 21974b1fa6 post-ra-sched: Replace a std::set of regs with a bitvector.
Assuming that a single std::set node adds 3 control words, a bitvector
can store (3*8+4)*8=224 registers in the allocated memory of a single
element in the std::set (x86_64). Also we don't have to call malloc
for every register added.

llvm-svn: 151269
2012-02-23 18:28:32 +00:00
Kevin Enderby 6fbcd8d439 Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652

As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back.  If there is a
getOpInfo call back that is tried first and then if that gets no information
then the  SymbolLookUp is called.  I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo.  And also don't use any
values from the  LLVMOpInfo1 struct if getOpInfo returns 0.  And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683

For the X86 target also fixed bugs so the annotations get printed. 

Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions.  rdar://10878166

llvm-svn: 151267
2012-02-23 18:18:17 +00:00
Brendon Cahoon d5d166d4d4 Fix the numbering of some of the registers and reclassify a couple of them.
Also, some basic clean up.  Patch by Evandro Menezes.

llvm-svn: 151266
2012-02-23 18:17:17 +00:00
Jakob Stoklund Olesen a793a59fc3 Make calls scheduling boundaries post-ra.
Before register allocation, instructions can be moved across calls in
order to reduce register pressure.  After register allocation, we don't
gain a lot by moving callee-saved defs across calls.  In fact, since the
scheduler doesn't have a good idea how registers are used in the callee,
it can't really make good scheduling decisions.

This changes the schedule in two ways: 1. Latencies to call uses and
defs are no longer accounted for, causing some random shuffling around
calls.  This isn't really a problem since those uses and defs are
inaccurate proxies for what happens inside the callee.  They don't
represent registers used by the call instruction itself.

2. Instructions are no longer moved across calls.  This didn't happen
very often, and the scheduling decision was made on dubious information
anyway.

As with any scheduling change, benchmark numbers shift around a bit,
but there is no positive or negative trend from this change.

This makes the post-ra scheduler 5% faster for ARM targets.

The secret motivation for this patch is the introduction of register
mask operands representing call clobbers.  The most efficient way of
handling regmasks in ScheduleDAGInstrs is to model them as barriers for
physreg live ranges, but not for virtreg live ranges.  That's fine
pre-ra, but post-ra it would have the same effect as this patch.

llvm-svn: 151265
2012-02-23 17:54:21 +00:00
Benjamin Kramer 077e55252a Reflow code, no functionality change.
llvm-svn: 151262
2012-02-23 17:42:19 +00:00
Jakob Stoklund Olesen aae960d978 Make tests less sensitive to scheduling changes.
llvm-svn: 151260
2012-02-23 17:19:34 +00:00
Benjamin Kramer d53aa39f46 Strip a layer of boilerplate from the VLIWPacketizer by storing the scheduler as an opaque pointer.
llvm-svn: 151252
2012-02-23 13:39:13 +00:00
Duncan Sands a354d58f8d Remove unused variable.
llvm-svn: 151251
2012-02-23 11:01:22 +00:00
Anton Korobeynikov a22828e085 Fix to make sure that a comdat group gets generated correctly for a static member
of instantiated C++ templates.

Patch by Kristof Beyls!

llvm-svn: 151250
2012-02-23 10:36:04 +00:00
Jay Foad 585dda99f6 Update for the removal of Hashing.cpp.
llvm-svn: 151249
2012-02-23 09:33:44 +00:00
Jay Foad 529776c786 Reinstate r151049 now that GeneralHash is fixed.
llvm-svn: 151248
2012-02-23 09:17:40 +00:00
Jay Foad 5f77851a99 The implementation of GeneralHash::addBits broke C++ aliasing rules; fix
it with memcpy. This also fixes a problem on big-endian hosts, where
addUnaligned would return different results depending on the alignment
of the data.

llvm-svn: 151247
2012-02-23 09:16:04 +00:00
Craig Topper 243582995a Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that were added in r151038.
llvm-svn: 151246
2012-02-23 08:42:06 +00:00
Duncan Sands f320be8521 An easy case where GCC should really be able to work out that the value is only
used if IsInDevelopmentTree is 'true'.  But it doesn't, so help it out.

llvm-svn: 151244
2012-02-23 08:25:25 +00:00
Duncan Sands 1462633b40 GCC warns about a comparison between signed and unsigned values.
llvm-svn: 151243
2012-02-23 08:23:53 +00:00
Duncan Sands 4730cb9c7c GCC fails to understand that NextBB is always initialized if EvaluateBlock
returns 'true' and emits a warning.  Help it out.

llvm-svn: 151242
2012-02-23 08:23:06 +00:00
Rafael Espindola f35c789031 Fix typo.
llvm-svn: 151238
2012-02-23 05:38:51 +00:00
Eric Christopher 18c6be7132 More newline cleanups.
llvm-svn: 151235
2012-02-23 03:39:43 +00:00
Eric Christopher 5c45205b79 Add some handy-dandy newlines.
llvm-svn: 151234
2012-02-23 03:39:39 +00:00
Andrew Trick da6a15d90d misched: cleanup reaching def computation
Ignore undef uses completely.
Use a more explicit SlotIndex API.
Add more explicit comments.

llvm-svn: 151233
2012-02-23 03:16:24 +00:00
Evan Cheng f258a15bdf Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits
of x are zero. This optimizes rev + lsr 16 to rev16.

rdar://10750814

llvm-svn: 151230
2012-02-23 02:58:19 +00:00
Andrew Trick d675a4cec0 PostRASched: Convert physreg def/use tracking to Jakob's SparseSet.
Added array subscript to SparseSet for convenience.
Slight reorg to make it easier to manage the def/use sets.

llvm-svn: 151228
2012-02-23 01:52:38 +00:00
Jakob Stoklund Olesen 28d4803ade Handle regmasks in FixupKills.
llvm-svn: 151226
2012-02-23 01:22:15 +00:00
Evan Cheng e87681cf34 Optimize a couple of common patterns involving conditional moves where the false
value is zero. Instead of a cmov + op, issue an conditional op instead. e.g.
    cmp   r9, r4
    mov   r4, #0
    moveq r4, #1 
    orr   lr, lr, r4

should be:
    cmp   r9, r4
    orreq lr, lr, #1

That is, optimize (or x, (cmov 0, y, cond)) to (or.cond x, y). Similarly extend
this to xor as well as (and x, (cmov -1, y, cond)) => (and.cond x, y).

It's possible to extend this to ADD and SUB but I don't think they are common.

rdar://8659097

llvm-svn: 151224
2012-02-23 01:19:06 +00:00
Jakob Stoklund Olesen 38ce889cb6 Handle regmasks in CriticalAntiDepBreaker.
llvm-svn: 151223
2012-02-23 01:15:26 +00:00