llvm-project

Author	SHA1	Message	Date
Bernard Ogden	fce246f0c6	Test cleanup for v8 instructions Add some missing tests, factor out a test not specific to v8 into its own file. llvm-svn: 193611	2013-10-29 14:16:09 +00:00
Joey Gouly	ad98f1671d	[ARM] Introduce the 'sevl' instruction in ARMv8. This also removes the restriction on the immediate field of the 'hint' instruction. llvm-svn: 191744	2013-10-01 12:39:11 +00:00
Joey Gouly	926d3f5809	[ARMv8] Implement the new DMB/DSB operands. This removes the custom ISD Node: MEMBARRIER and replaces it with an intrinsic. llvm-svn: 190055	2013-09-05 15:35:24 +00:00
Richard Barton	8d519fe015	Add AArch32 DCPS{1,2,3} and HLT instructions. These were pretty straightforward instructions, with some assembly support required for HLT. The ARM assembler is keen to split the instruction mnemonic into a (non-existent) 'H' instruction with the LT condition code. An exception for HLT is needed. HLT follows the same rules as BKPT when in IT blocks, so the special BKPT hadling code has been adapted to handle HLT also. Regression tests added including diagnostic tests for out of range immediates and illegal condition codes, as well as negative tests for pre-ARMv8. llvm-svn: 190053	2013-09-05 14:14:19 +00:00