60431bd728
[VE] Support for PIC (global data and calls)
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Summary: Support for PIC with tests for global variables and function calls.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D74536
2020-02-14 09:50:02 +01:00
bcd24b2d43
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
2020-02-13 22:08:55 -08:00
42a16dacda
[VE] Bit operator isel
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Summary: Isel and tests for bswap,brev,ctpop,ctlz,ctty,rotl,rotr
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D74304
2020-02-12 09:02:13 +01:00
3ed12232b0
[VE] half fptrunc+store&load+fpext
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Summary:
fp16 (half) load+fpext and fptrunc+store isel legalization and tests.
Also, ExternalSymbolSDNode operand printing (tested by fp16 lowering).
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73899
2020-02-04 17:16:09 +01:00
be9fe6aa8b
[VE] (fp)trunc+store & load+(fp)ext isel
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Summary: load+sext/zext/fpext and (fp)trunc+store isel legalization and tests
Reviewers: arsenm, craig.topper, rengolin, k-ishizaka
Reviewed By: arsenm
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Tags: #ve, #llvm
Differential Revision: https://reviews.llvm.org/D73774
2020-02-03 16:55:44 +01:00
07c9f7574d
[VE] vaarg functions callers and callees
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Summary: Isel patterns and tests for vaarg functions as callers and callees.
Reviewers: arsenm, rengolin, k-ishizaka
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Tags: #ve, #llvm
Differential Revision: https://reviews.llvm.org/D73710
2020-02-03 16:26:44 +01:00
24215fec9a
[NFC][VE] format VEInstrInfo
2020-02-03 14:25:49 +01:00
fef80a2946
[VE] (conditional) branch modification & isel patterns
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Summary:
InstInfo for branch modification, (conditional) branch isel patterns and tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73632
2020-01-29 17:40:57 +01:00
0bec0e7151
[VE] udiv/sdiv/urem/srem/mul isel patterns
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Summary:
udiv/sdiv/urem/srem/mul integer isel patterns and tests.
Pretend for now that integer division were always cheap in HW.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73623
2020-01-29 15:59:50 +01:00
6b587ee23c
[VE] Isel patterns for fp32/64 and i32/64 conversion
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Summary:
fp32/64 <> signed/unsigned i32/64 conversion isel patterns and tests
(This patch depends on `fsub` implemented by https://reviews.llvm.org/D73540 )
Reviewers: arsenm, craig.topper, rengolin, k-ishizaka
Reviewed By: arsenm
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Tags: #ve, #llvm
Differential Revision: https://reviews.llvm.org/D73544
2020-01-29 14:10:22 +01:00
f6bb58542a
[VE] fp32/64 fadd/fsub/fdiv/fmul isel patterns
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Summary: fp32/64 fadd/fsub/fdiv/fmul isel patterns and tests.
Reviewers: arsenm, craig.topper, rengolin, k-ishizaka
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D73540
2020-01-29 11:00:56 +01:00
93bbe7b2b5
[VE][fix] (more) explicit StringRef to std::string
2020-01-29 10:46:59 +01:00
d53840ad39
[VE][fix] Explicit StringRef to std::string conversion
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Adapt to changes of "[ADT] Make StringRef's std::string conversion
operator explicit" (777180a32
2020-01-29 10:34:28 +01:00
92600c2ec8
[VE] call isel with stack passing
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Summary:
Function calls and stack-passing of function arguments.
Custom lowering, isel patterns and tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73461
2020-01-28 10:55:47 +01:00
422dfea577
[VE] enable unaligned load/store isel
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Summary: Enable unaligned load/store isel for iN and fp32/64 and tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73448
2020-01-28 09:53:37 +01:00
0fca35c652
[VE] global variable isel patterns
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Summary: Asm expr fixups, isel patterns and tests for global variables addresses.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73355
2020-01-24 17:35:14 +01:00
08ebd8c79e
[VE] aligned load/store isel patterns
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Summary:
Aligned load/store isel patterns and tests for
i1/i8/16/32/64 (including extension and truncation) and fp32/64.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73276
2020-01-24 15:16:54 +01:00
784204fd7e
[VE] add, sub, left/right shift isel patterns
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Summary: Add, sub, left/right shift isel patterns and tests for i32/i64 and fp32/fp64.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73207
2020-01-23 16:00:37 +01:00
9187073f3e
[VE][NFC] re-write RR* isel class using null_frag
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Summary: Re-write RR* using null_frag to avoid duplication in upcoming patches.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73259
2020-01-23 15:17:45 +01:00
83b67526d5
[VE] select and selectcc patterns
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Summary: select and selectcc isel patterns and tests for i32/i64 and fp32/fp64.
Includes optimized selectcc patterns for fmin/fmax/maxs/mins.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73195
2020-01-22 16:30:38 +01:00
dc69265eea
[VE] setcc isel patterns
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Summary: SETCC isel patterns and tests for i32/64 and fp32/64 comparison
Reviewers: arsenm, rengolin, craig.topper, k-ishizaka
Reviewed By: arsenm
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Tags: #ve, #llvm
Differential Revision: https://reviews.llvm.org/D73171
2020-01-22 15:45:57 +01:00
3a906a9f4e
[VE] i<N> and fp32/64 arguments, return values and constants
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Summary:
Support for i<N> and fp32/64 arguments (in register), return values
and constants along with tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73092
2020-01-22 09:17:44 +01:00
773ae62ff8
[VE] i64 arguments, return values and constants
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Summary: Support for i64 arguments (in register), return values and constants along with tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D72776
2020-01-16 10:09:50 +01:00
064859bde7
[VE] Minimal codegen for empty functions
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Summary:
This patch implements minimal VE code generation for empty function bodies (no args, no value return).
Contents
* empty function code generation test.
* Minimal function prologue & epilogue emission
* Instruction formats and instruction definitions as far as required for the empty function prologue & epilogue.
* I64 register class definitions.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D72598
2020-01-15 09:55:16 +01:00
00c6e98409
[VE] Target stub for NEC SX-Aurora
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Summary:
This patch registers the 've' target: the NEC SX-Aurora TSUBASA Vector Engine.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D69103
2020-01-09 11:17:35 +01:00
Kazushi (Jam) Marukawa