20f0811fc0
Clean up comments, fix up some confusing code logic.
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Predsimplify fails llvm-gcc bootstrap.
llvm-svn: 40815
2007-08-04 18:45:32 +00:00
7d382f7680
fix a logic bug where we wouldn't promote single store allocas if the
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stored value was a non-instruction value. Doh.
This increase the # single store allocas from 8982 to 9026, and
speeds up mem2reg on the testcase in PR1432 from 2.17 to 2.13s.
llvm-svn: 40813
2007-08-04 02:45:02 +00:00
1b215f0661
When we do the single-store optimization, delete both the store
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and the alloca so they don't get reprocessed.
This speeds up PR1432 from 2.20s to 2.17s.
llvm-svn: 40812
2007-08-04 02:38:38 +00:00
862f125457
Three improvements:
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1. Check for revisiting a block before checking domination, which is faster.
2. If the stored value isn't an instruction, we don't have to check for domination.
3. If we have a value used in the same block more than once, make sure to remove the
block from the UsingBlocks vector. Not doing so forces us to go through the slow
path for the alloca.
The combination of these improvements increases the number of allocas on the fastpath
from 8935 to 8982 on PR1432. This speeds it up from 2.90s to 2.20s (31%)
llvm-svn: 40811
2007-08-04 02:32:22 +00:00
ae1e00eb36
switch from using a std::set to using a SmallPtrSet. This speeds up the
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testcase in PR1432 from 6.33s to 2.90s (2.22x)
llvm-svn: 40810
2007-08-04 02:21:22 +00:00
9181801bb7
In mem2reg, when handling the single-store case, make sure to remove
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a using block from the list if we handle it. Not doing this caused us
to not be able to promote (with the fast path) allocas which have uses (whoops).
This increases the # allocas hitting this fastpath from 4042 to 8935 on the
testcase in PR1432, speeding up mem2reg by 2.6x
llvm-svn: 40809
2007-08-04 02:15:24 +00:00
450f95c857
Regenerating.
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llvm-svn: 40808
2007-08-04 01:56:21 +00:00
7132e00de7
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
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This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
2007-08-04 01:51:18 +00:00
886a41a007
split rewriting of single-store allocas into its own
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method.
llvm-svn: 40806
2007-08-04 01:47:41 +00:00
3cede09c67
refactor some code to shrink PromoteMem2Reg::run a bit
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llvm-svn: 40805
2007-08-04 01:41:18 +00:00
d524537fe9
add a typedef, no other change.
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llvm-svn: 40804
2007-08-04 01:19:38 +00:00
df138be527
avoid an unneeded vector copy. This speeds up mem2reg on the testcase
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in PR1432 by 6%
llvm-svn: 40803
2007-08-04 01:07:49 +00:00
fd838f0770
make RenamePassWorkList a local var instead of an ivar.
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llvm-svn: 40802
2007-08-04 01:04:40 +00:00
b0c7585f2d
Make x86 long double alignment 32 for everything but
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Darwin (which makes size within a struct==96)
llvm-svn: 40796
2007-08-03 22:46:15 +00:00
65c8a9ee9a
long double patch 3 of N. Add to MVT.
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llvm-svn: 40793
2007-08-03 20:51:37 +00:00
c5283ecd6f
long double patch 2 of N. Handle it in TargetData.
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(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
llvm-svn: 40792
2007-08-03 20:20:50 +00:00
2d19aae4ca
Fix a subtle miscompilation. This allows 197.parser to be compiled correctly.
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llvm-svn: 40791
2007-08-03 19:59:35 +00:00
774761c503
Fix a subtle iterator invalidation bug in a recursive algorithm.
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llvm-svn: 40776
2007-08-03 11:03:26 +00:00
d8a382f66d
Prepare for "core" website.
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llvm-svn: 40775
2007-08-03 05:43:35 +00:00
ff4c3be741
Long double, part 1 of N. Support in IR.
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llvm-svn: 40774
2007-08-03 01:03:46 +00:00
99fbf13dc3
add an observation
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llvm-svn: 40772
2007-08-03 00:17:42 +00:00
1f70816c73
Fix an accidental commit.
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llvm-svn: 40758
2007-08-02 21:33:36 +00:00
5f6a9da530
More explicit keywords.
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llvm-svn: 40757
2007-08-02 21:21:54 +00:00
8932bff7fe
Fix the alignment requirements of several unpck and shuf instructions.
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Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.
llvm-svn: 40756
2007-08-02 21:17:01 +00:00
4d436e2b7d
Fix pastos in vector arithmetic intrinsics.
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llvm-svn: 40754
2007-08-02 21:06:40 +00:00
a8ba659976
Fix 80 col. violations.
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llvm-svn: 40751
2007-08-02 18:20:52 +00:00
9699a6ea03
Fix 80 col. violations.
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llvm-svn: 40750
2007-08-02 18:16:06 +00:00
e3590584b9
Fix 80 col. violations.
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llvm-svn: 40749
2007-08-02 18:11:11 +00:00
3ffe7187db
don't redefine a parameter
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llvm-svn: 40748
2007-08-02 18:08:16 +00:00
0ac1fc8ac1
Fix a bug that was causing several miscompilations on SPEC.
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llvm-svn: 40746
2007-08-02 17:56:05 +00:00
531f260ac0
Implement review feedback.
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llvm-svn: 40745
2007-08-02 17:52:00 +00:00
9ea0287e25
I don't have time to restore this functionality right now.
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llvm-svn: 40743
2007-08-02 17:43:39 +00:00
dc2cf228ce
Replacing a cast with another one does not reduce the number of
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casts in the input.
llvm-svn: 40741
2007-08-02 17:23:38 +00:00
498137dbfc
Reduced testcase for PR1594
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llvm-svn: 40740
2007-08-02 17:11:24 +00:00
222b214be7
Disable an xform that causes an infinite loop. This fixes PR1594
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llvm-svn: 40739
2007-08-02 16:56:32 +00:00
2740694450
wrap some long lines. Major offenders that are left include
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gvn, gvnpre, dse, and predsimplify. To see these, use:
make check-line-length
llvm-svn: 40738
2007-08-02 16:53:43 +00:00
a882328e61
Update dominator info for the middle blocks created while spliting
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exit edge to preserve LCSSA.
Fix dominance frontier update during loop unswitch. This fixes PR 1589, again
llvm-svn: 40737
2007-08-02 15:25:57 +00:00
fa3eeeedc0
Mark the SSE and MMX load instructions that
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X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.
llvm-svn: 40736
2007-08-02 14:27:55 +00:00
b0418fc607
Enhance instcombine to be more aggressive about folding casts of
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operations of casts. This implements InstCombine/zext-fold.ll
llvm-svn: 40726
2007-08-02 06:11:14 +00:00
af8908451e
Fix bug spotted by Chris.
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llvm-svn: 40725
2007-08-02 06:05:19 +00:00
cac9c624a1
Add extend and extOrTrunc methods that do sign or zero extension depending on whether the integer is signed or not
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llvm-svn: 40724
2007-08-02 06:00:13 +00:00
473c5111c3
Switch some multiplication instructions over to the new scheme for testing.
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llvm-svn: 40723
2007-08-02 05:48:35 +00:00
358c3d1dac
Do not emit copies for physical register output if it's not used.
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llvm-svn: 40722
2007-08-02 05:29:38 +00:00
824693c87a
Fix test.
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llvm-svn: 40721
2007-08-02 05:04:16 +00:00
d7cb625a9e
Fix PR1575 and test/Transforms/CondProp/2007-08-01-InvalidRead.ll
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llvm-svn: 40720
2007-08-02 04:47:05 +00:00
e621b07e5e
Adjust for new CallInst constructor interface.
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This fixes test/Feature/llvm2cpp.ll
llvm-svn: 40714
2007-08-02 03:30:26 +00:00
5b80ecbcf5
Style police: Expand the tabs to spaces!
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llvm-svn: 40712
2007-08-02 02:22:46 +00:00
1a80201426
Teach BasicAA about noalias parameter attributes, but do it correctly this time.
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llvm-svn: 40711
2007-08-02 01:18:14 +00:00
c5549fc3a0
Instead of adding copyfromreg's to handle physical definitions. Now isel can
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simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)
Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)
And let scheduledag emit the move from X86::EAX to a virtual register.
llvm-svn: 40710
2007-08-02 00:28:15 +00:00
c9de9cec18
Added TargetInstrDescriptor::numDefs - num of results.
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llvm-svn: 40709
2007-08-02 00:20:17 +00:00
Nick Lewycky