b7c01f5f48
Update ARM Insn encoding to get endian-ness to match the documentation (31-0 left to right)
...
llvm-svn: 57524
2008-10-14 20:36:24 +00:00
9c4b7d5c4f
Fix command-line option printing to print two spaces where needed,
...
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
llvm-svn: 57521
2008-10-14 20:25:08 +00:00
c36231b95e
Fix indentation.
...
llvm-svn: 57508
2008-10-14 17:15:39 +00:00
56b6885104
When doing the very-late shift-and address-mode optimization,
...
create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.
If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.
This fixes PR2849.
llvm-svn: 57465
2008-10-13 20:52:04 +00:00
46a9c01fff
Update size of inst correctly with segment override.
...
llvm-svn: 57414
2008-10-12 10:30:11 +00:00
2753955fc0
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
...
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
llvm-svn: 57385
2008-10-11 22:08:30 +00:00
23ee981e8e
Fix comment typo.
...
llvm-svn: 57381
2008-10-11 19:34:24 +00:00
2589777f3f
Add ability to override segment (mostly for code emitter purposes).
...
llvm-svn: 57380
2008-10-11 19:09:15 +00:00
05b54c2af4
Fix SSE4.1 roundss, roundsd. While the instructions have
...
the same pattern as roundpd/roundps, the Intel compiler
builtins do not: rounds* has an extra operand. Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c
llvm-svn: 57370
2008-10-10 23:51:03 +00:00
58deb69040
Fix a thinko and unbreak sparc default CC
...
llvm-svn: 57368
2008-10-10 21:47:37 +00:00
f8a4a0e959
Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc.
...
llvm-svn: 57364
2008-10-10 20:30:14 +00:00
b80b485264
Ignore extra 'r' modifier for now
...
llvm-svn: 57363
2008-10-10 20:29:50 +00:00
76baad1ffc
Use expand for smul_lohi for now
...
llvm-svn: 57362
2008-10-10 20:29:31 +00:00
281cf247a5
Add rudimentary support for 'r' register operand
...
llvm-svn: 57359
2008-10-10 20:28:10 +00:00
b8736566c2
Cleanup
...
llvm-svn: 57358
2008-10-10 20:27:31 +00:00
3db2173021
Add rudimentary asmprinter support for printing inline asm operands for sparc.
...
llvm-svn: 57346
2008-10-10 10:15:03 +00:00
9aaaa4035e
Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether it is correct, however :)
...
llvm-svn: 57345
2008-10-10 10:14:47 +00:00
1f9487b916
Cleanup
...
llvm-svn: 57344
2008-10-10 10:14:15 +00:00
4f0bd68cfe
Add a "loses information" return value to APFloat::convert
...
and APFloat::convertToInteger. Restore return value to
IEEE754. Adjust all users accordingly.
llvm-svn: 57329
2008-10-09 23:00:39 +00:00
54306fe499
Rename APFloat::convertToAPInt to bitcastToAPInt to
...
make it clearer what the function does. No functional
change.
llvm-svn: 57325
2008-10-09 18:53:47 +00:00
1a84f86271
get CodeGen/Alpha/mul128.ll to work.
...
llvm-svn: 57318
2008-10-09 04:50:56 +00:00
66e08292aa
(re)Put const weak strings in appropriate section on Darwin.
...
g++dg/abi/key2.C
llvm-svn: 57309
2008-10-08 21:49:47 +00:00
d83529e8c4
Comment to be explicit that the enumeration values for CondCodes matter.
...
llvm-svn: 57295
2008-10-08 16:24:35 +00:00
32052e8272
Use template to distinguish between function variants.
...
GCC 4.4.0 gives an error on the "int" declaration for example
saying that it has already been declared (using the "short"
one). Using templates here allow the compiler to distinguish
between the function to choose.
Also, "llvm/Support/DataTypes.h" was not included, leading to
error messages about not knowing "uint32_t" for example.
Patch by Samuel Tardieu.
llvm-svn: 57292
2008-10-08 07:44:52 +00:00
26ff6f9c54
Add <cstdio> include where needed by gcc-4.4.
...
Patch by Samuel Tardieu.
llvm-svn: 57291
2008-10-08 07:23:46 +00:00
b3ba449cfb
Add MBB successors and physreg Uses in the same order that
...
SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.
llvm-svn: 57266
2008-10-07 22:10:33 +00:00
d3917157d5
Instead of emitting an implicit use for the super-register of
...
X86::CL that was used, emit an EXTRACT_SUBREG from the CL
super-register to CL. This more precisely describes how the
CL register is being used.
llvm-svn: 57264
2008-10-07 21:50:36 +00:00
f311fe142c
Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits.
...
llvm-svn: 57262
2008-10-07 21:08:09 +00:00
b53acd8caa
need ARM.h for ARMCC definition
...
llvm-svn: 57261
2008-10-07 21:01:51 +00:00
1d338fc6a4
Add an option to enable StrongPHIElimination, for ease of testing.
...
llvm-svn: 57259
2008-10-07 20:22:28 +00:00
c084e84028
Encode the conditional execution predicate when JITing.
...
llvm-svn: 57258
2008-10-07 19:05:35 +00:00
422ef88f31
Model hardwired inputs & outputs of x86 8-bit divides correctly.
...
Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0.
llvm-svn: 57257
2008-10-07 18:54:28 +00:00
2fb5c3938b
Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly
...
llvm-svn: 57252
2008-10-07 17:42:09 +00:00
1d54d4f375
Fix Opcode values of CMP and CMN
...
llvm-svn: 57251
2008-10-07 17:40:46 +00:00
1699ad9030
Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction.
...
llvm-svn: 57246
2008-10-07 16:14:11 +00:00
64861a7181
Note that ADDC and company don't actually expand yet (missing in legalize
...
llvm-svn: 57226
2008-10-07 02:10:26 +00:00
94d14f2d45
Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.
...
llvm-svn: 57210
2008-10-06 21:13:08 +00:00
c0f3b52e65
It is possible that all functions in one module are not being
...
optimized for size. Set OptForSize for each function separately.
llvm-svn: 57182
2008-10-06 18:03:39 +00:00
ab379c905b
Remove unncessary isDeclaration() checks.
...
llvm-svn: 57179
2008-10-06 17:30:07 +00:00
37e560cde1
Emit type-correct constant null. Also fix a typo.
...
Patch by Robert G. Jakabosky!
llvm-svn: 57110
2008-10-05 15:07:06 +00:00
d2aded08ac
Fix weird think-o and unbreak build on all gcc-3.4.x-based platforms (e.g. mingw)
...
llvm-svn: 57106
2008-10-05 08:53:29 +00:00
f9325e5f67
this case is matched now.
...
llvm-svn: 57096
2008-10-05 02:16:12 +00:00
b52ef06c8c
Revert r56675 - it breaks unwinding runtime everywhere.
...
llvm-svn: 57048
2008-10-04 11:09:36 +00:00
8c36a1c09c
Make atomic Swap work, 64-bit on x86-32.
...
Make it all work in non-pic mode.
llvm-svn: 57034
2008-10-03 22:25:52 +00:00
5d60c1ebb1
Pass MemOperand through for 64-bit atomics on 32-bit,
...
incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
llvm-svn: 57027
2008-10-03 19:41:08 +00:00
2c836cf187
Avoid creating two TargetLowering objects for each target.
...
Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.
llvm-svn: 57016
2008-10-03 16:55:19 +00:00
eae96ce3ec
Remove an unused field.
...
llvm-svn: 57014
2008-10-03 16:17:33 +00:00
332ad5e016
Indexing off by one resulted in errant encoding of source register for
...
reg->reg moves.
llvm-svn: 57011
2008-10-03 15:53:56 +00:00
af929abc01
NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub
...
for global relocations that do need them (libc calls, for example).
llvm-svn: 57010
2008-10-03 15:52:42 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
...
isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
b01a9c94d4
Fix X86FastISel to handle dynamic allocas that have avoided
...
getting inserted into the ValueMap. This avoids infinite
recursion in some rare cases.
llvm-svn: 56989
2008-10-03 01:27:49 +00:00
1ab1d31f7a
Optimize conditional branches in X86FastISel. This replaces
...
sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
llvm-svn: 56969
2008-10-02 22:15:21 +00:00
867d549fce
Handle some 64-bit atomics on x86-32, some of the time.
...
llvm-svn: 56963
2008-10-02 18:53:47 +00:00
b158fd751c
Work around an interaction between fast-isel and regalloc=local. The
...
local register allocator's physreg liveness doesn't recognize subregs,
so it doesn't know that defs of %ecx that are immediately followed by
uses of %cl aren't dead. This comes up due to the way fast-isel emits
shift instructions.
This is a temporary workaround. Arguably, local regalloc should
handle subreg references correctly. On the other hand, perhaps
fast-isel should use INSERT_SUBREG instead of just assigning to the
most convenient super-register of %cl when lowering shifts.
This fixes MultiSource/Benchmarks/MallocBench/espresso,
MultiSource/Applications/hexxagon, and others, under -fast.
llvm-svn: 56947
2008-10-02 14:56:12 +00:00
b04e6edba9
"The original bug was a complaint that _mm_srli_si128 mis-compiled when passed
...
a constant vector ("{0x123, 0x456}" syntax). The fix is to simplify the
_mm_srli_si128 macro, and move the "* 8" from the macro into the compiler
back-end. I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!
llvm-svn: 56944
2008-10-02 05:56:52 +00:00
1b76f2c40b
Remove OptimizeForSize global. Use function attribute optsize.
...
llvm-svn: 56937
2008-10-01 23:18:38 +00:00
6388dde98e
Split x86's ADJCALLSTACK instructions into 32-bit and 64-bit forms.
...
This allows the 64-bit forms to use+def RSP instead of ESP. This
doesn't fix any real bugs today, but it is more precise and it
makes the debug dumps on x86-64 look more consistent.
Also, add some comments describing the CALL instructions' physreg
operand uses and defs.
llvm-svn: 56925
2008-10-01 18:28:06 +00:00
3dc0a3bce3
Fix typo s/ther/there/
...
llvm-svn: 56924
2008-10-01 18:16:49 +00:00
bb3c5019f8
Mark CALL instructions as having a Use of ESP/RSP.
...
llvm-svn: 56911
2008-10-01 04:14:30 +00:00
68f12ee567
Implement the -fno-builtin option in the front-end, not in the back-end.
...
llvm-svn: 56900
2008-10-01 00:59:58 +00:00
1782584f56
Just don't transform this memset into "bzero" if no-builtin is specified.
...
llvm-svn: 56888
2008-09-30 22:05:33 +00:00
bd09262e97
Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
...
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.
llvm-svn: 56885
2008-09-30 21:22:07 +00:00
86aa16a69a
Optimize SelectionDAG's AssignTopologicalOrder even further.
...
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.
Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.
This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.
llvm-svn: 56867
2008-09-30 18:30:35 +00:00
8392f0c75d
Fix X86FastISel's output for x86-32 PIC constant pool addresses.
...
llvm-svn: 56829
2008-09-30 01:21:32 +00:00
6ebe734ca6
Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp
...
and X86FastISel.cpp into X86MachineFunction.h, so that it
can be shared, instead of having each selector keep track
of its own.
llvm-svn: 56825
2008-09-30 00:58:23 +00:00
5033136825
Disable all x87 usage, including f32 and f64 when the subtarget
...
doesn't have SSE(2), with X86FastISel.
llvm-svn: 56823
2008-09-30 00:48:39 +00:00
f61a84ec43
Remove misuse of ReplaceNodeResults for atomics with
...
valid types. No functional change.
llvm-svn: 56808
2008-09-29 22:25:26 +00:00
c02dbf451e
Fix an over-pessimization about GlobalVariable addresses in X86FastISel.
...
llvm-svn: 56802
2008-09-29 21:13:15 +00:00
82237f2f42
Fix PR2835. Do not change the width of a volatile load.
...
llvm-svn: 56792
2008-09-29 17:26:18 +00:00
08d91178e9
Rename isWeakForLinker to mayBeOverridden. Use it
...
instead of hasWeakLinkage in a bunch of optimization
passes.
llvm-svn: 56782
2008-09-29 11:25:42 +00:00
3774b2f292
Re-apply 56683 with fixes.
...
llvm-svn: 56748
2008-09-27 01:56:22 +00:00
1d5e766016
Unbreak build.
...
llvm-svn: 56727
2008-09-27 00:22:09 +00:00
9eb525d4f9
Implement function notes as function attributes.
...
llvm-svn: 56716
2008-09-26 23:51:19 +00:00
7d6fa97567
Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless optimizing for code size.
...
llvm-svn: 56711
2008-09-26 23:41:32 +00:00
c966a737c5
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
...
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...
llvm-svn: 56703
2008-09-26 22:10:44 +00:00
6e0548336a
Rename ConstantSDNode's getSignExtended to getSExtValue, for
...
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
llvm-svn: 56700
2008-09-26 21:54:37 +00:00
7e922aa35d
Mark lea fi# as being really rematerializable.
...
llvm-svn: 56698
2008-09-26 21:30:20 +00:00
30f5494efb
unpckhps requires sse1, punpckhdq requires sse2.
...
llvm-svn: 56697
2008-09-26 21:26:30 +00:00
2564b900ce
Fix X86FastISel's address folding to check displacement
...
values for overflow.
llvm-svn: 56686
2008-09-26 20:04:15 +00:00
d77cbe8947
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
...
llvm-svn: 56683
2008-09-26 19:48:35 +00:00
9e3f7dbeda
CMake: Builds all examples. Corrected name of CBackend target.
...
llvm-svn: 56682
2008-09-26 19:48:03 +00:00
0e32a2c935
Add "inreg" field to CallSDNode (doesn't increase
...
its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
llvm-svn: 56677
2008-09-26 19:31:26 +00:00
007a6bb9b9
Factor out the code for determining when symblic addresses
...
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.
llvm-svn: 56676
2008-09-26 19:15:30 +00:00
994dd0bbec
Avoid spilling EBP / RBP twice in the prologue.
...
llvm-svn: 56675
2008-09-26 19:14:21 +00:00
001ffdd36b
X86 address displacement field must be interpreted as a 32-bit value.
...
llvm-svn: 56665
2008-09-26 16:58:16 +00:00
cdc95498f5
CMake: Builds all targets.
...
llvm-svn: 56641
2008-09-26 04:40:32 +00:00
839105d254
Disable support for x86_f80 in X86FastISel. Supporting it would
...
require more work.
llvm-svn: 56637
2008-09-26 01:39:32 +00:00
374d7f2b16
If we have a function with an unreachable statement such that the ending debug
...
information is in an unreachable block, then it's possible that the high/low pc
values won't be set for the dwarf information. E.g., this function:
void abort(void) __attribute__((__noreturn__));
void dead_beef(void) __attribute__ ((noreturn));
int *b;
void dead_beef(void) {
*b=0xdeadbeef;
abort();
}
has a call to "@llvm.dbg.region.end" only in the unreachable block:
define void @dead_beef() noreturn nounwind {
entry:
call void @llvm.dbg.func.start(...)
call void @llvm.dbg.stoppoint(...)
...
call void @abort( ) noreturn nounwind
unreachable
return: ; No predecessors!
call void @llvm.dbg.stoppoint(...)
call void @llvm.dbg.region.end(...)
ret void
}
The dwarf information emitted is something like:
0x00000084: TAG_subprogram [5]
AT_name( "dead_beef" )
AT_external( 0x01 )
AT_prototyped( 0x01 )
AT_decl_file( 0x01 )
AT_decl_line( 0x08 )
Note that this is *not* the best fix for this problem, but a band-aid for an
gaping wound. This code needs to be changed when we revamp our debugging
information.
llvm-svn: 56628
2008-09-26 00:28:12 +00:00
9dbe45c000
Prefer movlhps over punpcklqdq, etc. in more cases.
...
llvm-svn: 56627
2008-09-25 23:35:16 +00:00
0c1b884df1
Fix a bug in which address displacements were being added to the
...
load from the stub, instead of the result of the load from the stub.
llvm-svn: 56626
2008-09-25 23:34:02 +00:00
4c758ea3e0
Large mechanical patch.
...
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
llvm-svn: 56622
2008-09-25 21:00:45 +00:00
87001fd6fd
Reapply 56585:56589 with proper fix for some gcc versions
...
llvm-svn: 56621
2008-09-25 21:00:33 +00:00
74c9ed91b0
With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps
...
llvm-svn: 56620
2008-09-25 20:50:48 +00:00
c50ada2f56
Accept 'inreg' attribute on x86 functions as
...
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0). Update documentation
to reflect reality.
llvm-svn: 56619
2008-09-25 20:47:45 +00:00
3691d507c4
PIC support in X86FastISel.
...
llvm-svn: 56608
2008-09-25 15:24:26 +00:00
84301390ae
Temporarily backing out 56585:56589 to unbreak the build.
...
llvm-svn: 56607
2008-09-25 07:38:08 +00:00
7b5a6afb44
pmovsxbq etc. requires sse4.1.
...
llvm-svn: 56600
2008-09-25 00:49:51 +00:00
f8ead16b50
Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD.
...
llvm-svn: 56594
2008-09-24 23:27:55 +00:00
4751549f9b
X86ISD::VZEXT_LOAD should produce and fold a chain.
...
llvm-svn: 56593
2008-09-24 23:26:36 +00:00
3097c10347
Minor cleanup
...
llvm-svn: 56588
2008-09-24 22:22:54 +00:00
a9163feefe
Get rid of virtual inheritance for ARM TAI
...
llvm-svn: 56587
2008-09-24 22:22:27 +00:00
237f087eb9
Get rid of virtual inheritance for PPC TAI
...
llvm-svn: 56586
2008-09-24 22:22:03 +00:00
77aa975bdd
Use crazy template-based inheritance instead of virtual one.
...
llvm-svn: 56585
2008-09-24 22:21:39 +00:00
8e7b93938d
Get rid of ReadOnlySection duplicate
...
llvm-svn: 56582
2008-09-24 22:20:27 +00:00
91a6705839
Use named sections, where they should be
...
llvm-svn: 56581
2008-09-24 22:19:13 +00:00
5906234c1d
Get rid of now unused {Four,Eight,Sixteen}ByteConstantSection
...
llvm-svn: 56580
2008-09-24 22:18:54 +00:00
41573b2131
Cleanup
...
llvm-svn: 56578
2008-09-24 22:17:27 +00:00
22db30548d
Get rid of duplicate char*/Section* stuff for TLS sections
...
llvm-svn: 56577
2008-09-24 22:17:06 +00:00
1f365bbf55
Cleanup, no functionality change
...
llvm-svn: 56576
2008-09-24 22:16:33 +00:00
7497762606
Get rid of duplicate char*/Section* DataSection
...
llvm-svn: 56575
2008-09-24 22:16:16 +00:00
f8dc8aac3c
Get rid of duplicate char*/Section* TextSection
...
llvm-svn: 56574
2008-09-24 22:15:21 +00:00
076e905b94
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.
...
llvm-svn: 56573
2008-09-24 22:14:23 +00:00
69ff51baa0
Drop obsolete hook and change all usage to new interface
...
llvm-svn: 56572
2008-09-24 22:13:07 +00:00
8ac1127ed6
SPU section handling is really huge mess. Replace remaining TAI calls for sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday.
...
llvm-svn: 56570
2008-09-24 22:11:42 +00:00
69721aa85c
Remove dead code for PIC16 (preparation to switch to new section handling stuff)
...
llvm-svn: 56569
2008-09-24 22:11:26 +00:00
ffecb087a3
XMM6-XMM15 are callee-saved on Win64. Patch by Nicolas Capens!
...
llvm-svn: 56568
2008-09-24 22:03:04 +00:00
6402c7236f
s/ParamAttrsWithIndex/FnAttributeWithIndex/g
...
llvm-svn: 56535
2008-09-24 00:55:02 +00:00
e15607b7bb
Put FN_NOTE_AlwaysInline and others in FnAttr namespace.
...
llvm-svn: 56527
2008-09-24 00:06:15 +00:00
e0add20c1b
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
...
llvm-svn: 56526
2008-09-24 00:05:32 +00:00
e87abd26ba
Move FN_NOTE_AlwaysInline and other out of ParamAttrs namespace.
...
Do not check isDeclaration() in hasNote(). It is clients' responsibility.
llvm-svn: 56524
2008-09-23 23:52:03 +00:00
ba3fa6c6e1
s/ParameterAttributes/Attributes/g
...
llvm-svn: 56513
2008-09-23 23:03:40 +00:00
82fed6702b
Use parameter attribute store (soon to be renamed) for
...
Function Notes also. Function notes are stored at index ~0.
llvm-svn: 56511
2008-09-23 22:35:17 +00:00
918fe08a56
Arrange for FastISel code to have access to the MachineModuleInfo
...
object. This will be needed to support debug info.
llvm-svn: 56508
2008-09-23 21:53:34 +00:00
ed1cf1a8f1
Fix these enums' starting values to reflect the way that
...
instruction opcodes are now numbered. No functionality change.
llvm-svn: 56497
2008-09-23 18:42:32 +00:00
e64c9944f6
Delete an unused function.
...
llvm-svn: 56495
2008-09-23 18:26:47 +00:00
2430073657
Move the code for initializing the global base reg out of
...
X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.
llvm-svn: 56494
2008-09-23 18:22:58 +00:00
bdb215d338
Fix indendation.
...
llvm-svn: 56486
2008-09-23 08:54:41 +00:00
9e9426cb82
Support x86 specific inline asm modifier 'J'.
...
llvm-svn: 56483
2008-09-22 23:57:37 +00:00
329fe728b5
Add hasNote() to check note associated with a function.
...
llvm-svn: 56477
2008-09-22 22:32:29 +00:00
962c2cf17a
Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators.
...
llvm-svn: 56475
2008-09-22 22:21:38 +00:00
7a74e71489
Make log, log2, log10, exp, exp2 use Expand by
...
default.
llvm-svn: 56471
2008-09-22 21:57:32 +00:00
168f8f3916
Mark several codegen passes as preserving all analysis.
...
llvm-svn: 56469
2008-09-22 20:58:04 +00:00
8807bddf08
CMake build system: support for parallel builds.
...
llvm-svn: 56453
2008-09-22 18:21:51 +00:00
796a271c5f
Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.
...
llvm-svn: 56436
2008-09-22 14:50:07 +00:00
a229b3c9a7
Initial support for the CMake build system.
...
llvm-svn: 56419
2008-09-22 01:08:49 +00:00
f1280cf744
Fold immediates into X86 shifts with fast isel. This generates:
...
sarl $3, %ecx
instead of:
movl $3, %ecx
sarl %cl, %edx
This shrinks fast isel 176.gcc by about 2000 instructions (.3%)
llvm-svn: 56413
2008-09-21 21:44:29 +00:00
dfc19e6c01
Instead of building a list and sorting it just to find a maximum element,
...
compute the maximum element directly.
llvm-svn: 56411
2008-09-21 21:01:49 +00:00
9a8eb0d534
add a note
...
llvm-svn: 56391
2008-09-20 19:17:53 +00:00
4730522235
No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.
...
llvm-svn: 56378
2008-09-20 00:13:45 +00:00
9d917beba6
80 column violation.
...
llvm-svn: 56377
2008-09-20 00:13:08 +00:00
098786e9f7
Fix a FastISel GlobalVariable CSE bug.
...
llvm-svn: 56376
2008-09-19 23:42:04 +00:00
9801ba451a
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
...
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
llvm-svn: 56371
2008-09-19 22:16:54 +00:00
6e005fdc8d
Address-mode folding for X86FastISel. It's pretty basic, but it
...
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.
llvm-svn: 56320
2008-09-18 23:23:44 +00:00
e91edeb61c
Simplify this code. The FastISel class has its own TD member.
...
llvm-svn: 56311
2008-09-18 18:26:43 +00:00
933b392f65
Duh. Default to ARMCC::AL (always).
...
llvm-svn: 56301
2008-09-18 07:28:19 +00:00
5e3ac187d9
Clean up.
...
llvm-svn: 56300
2008-09-18 07:27:23 +00:00
bc0d0eccf3
Cosmetic.
...
llvm-svn: 56299
2008-09-18 07:24:33 +00:00
af13bf1ebd
FastISel: For calls, prefer using the callee's address as a constant
...
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.
This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.
llvm-svn: 56292
2008-09-17 21:18:49 +00:00
7848cfcd77
Fix addrmode1 instruction encodings; fix bx_ret encoding.
...
llvm-svn: 56277
2008-09-17 07:53:38 +00:00
937569afe3
Specify instruction encoding using range list to avoid endianess issues.
...
llvm-svn: 56276
2008-09-17 07:16:21 +00:00
173aa8602d
Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw
...
up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.
llvm-svn: 56270
2008-09-17 01:39:10 +00:00
95e1af217f
Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"
...
function with appropriate parameters. This allows us to support blocks on PPC.
llvm-svn: 56267
2008-09-17 00:30:57 +00:00
24c79f28b1
Reverting r56249. On further investigation, this functionality isn't needed.
...
Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
8bc392fb1d
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
...
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
233785daae
Fixed Bug 2751
...
http://llvm.org/bugs/show_bug.cgi?id=2751
Abicall was enabled even when static code model was provided
in the command line.
The correct behavior is to disable abicall when static is
specified.
llvm-svn: 56228
2008-09-15 21:06:55 +00:00
38453eebdc
Remove isImm(), isReg(), and friends, in favor of
...
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
a5804effed
Fix random abort.
...
llvm-svn: 56184
2008-09-13 01:55:59 +00:00
d3fe174c53
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
...
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
llvm-svn: 56183
2008-09-13 01:54:27 +00:00
380482ac46
Typo.
...
llvm-svn: 56182
2008-09-13 01:44:01 +00:00
ba28161103
Rely on instruction format to determine so_reg operand for now.
...
llvm-svn: 56181
2008-09-13 01:38:29 +00:00
12134701ec
Revert 56176. All those instruction formats are still needed.
...
llvm-svn: 56180
2008-09-13 01:35:33 +00:00
db6571a2c7
Accidentially flipped the condition.
...
llvm-svn: 56179
2008-09-13 01:29:57 +00:00
25a39094f8
Add debug dumps.
...
llvm-svn: 56178
2008-09-13 01:15:21 +00:00
c5c74f36fd
Eliminate unnecessary instruction formats.
...
llvm-svn: 56176
2008-09-12 23:15:39 +00:00
d1424c4eca
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
...
llvm-svn: 56172
2008-09-12 22:45:55 +00:00
33fa89c6fb
Rewrite address mode 1 code emission routines.
...
llvm-svn: 56171
2008-09-12 22:01:15 +00:00
effb894453
Rename ConstantSDNode::getValue to getZExtValue, for consistency
...
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
llvm-svn: 56159
2008-09-12 16:56:44 +00:00
a7cd7bc353
udpate header comment: s/VP/VFP/
...
llvm-svn: 56126
2008-09-11 21:41:29 +00:00
dd45bc25ac
When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case.
...
llvm-svn: 56119
2008-09-11 20:28:43 +00:00
453564bfba
Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel.
...
llvm-svn: 56117
2008-09-11 19:44:55 +00:00
58d084c05b
The version of AtomicSDNode::AtomicSDNode used (only) for
...
cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional. Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.
From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out. I
cannot test on that platform.
llvm-svn: 56091
2008-09-11 03:12:59 +00:00
41baf8b22a
If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on
...
X86-64 in fast isel.
llvm-svn: 56088
2008-09-11 02:41:37 +00:00
e5ca04e70d
Succumb utterly to compatibility and implement
...
__sync_fetch_and_nand as ANDC, even though that's
not what nand means.
llvm-svn: 56087
2008-09-11 02:15:03 +00:00
bf646f2986
X86FastISel support for double->float and float->double casts.
...
llvm-svn: 56070
2008-09-10 21:02:08 +00:00
39d82f902a
Add X86FastISel support for static allocas, and refences
...
to static allocas. As part of this change, refactor the
address mode code for laods and stores.
llvm-svn: 56066
2008-09-10 20:11:02 +00:00
710c3cf36a
Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc.
...
llvm-svn: 56061
2008-09-10 18:25:29 +00:00
4cc893bab6
Handle new intrinsics with vector arguments.
...
Patch by Paul Redmond.
llvm-svn: 56059
2008-09-10 17:31:40 +00:00
6d6a65310b
Fix name.
...
llvm-svn: 56055
2008-09-10 13:22:10 +00:00
83e45acc25
Add trampoline support for the new FastCC calling
...
convention (not related to recent Ada testsuite
failures).
llvm-svn: 56054
2008-09-10 13:11:09 +00:00
536c399579
Turn off the new FastCC for the moment. It causes
...
a slew of Ada testsuite failures on x86-32 linux.
Seems to be related to the use of float.
llvm-svn: 56053
2008-09-10 13:09:24 +00:00
abb1e7770b
Move the uglier parts of deciding not to emit a
...
UsedDirective for some symbols in llvm.used into
Darwin-specific code. I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.
llvm-svn: 56024
2008-09-09 22:29:13 +00:00
1a1140429e
Make safer variant of alias resolution routine to be default
...
llvm-svn: 56005
2008-09-09 20:05:04 +00:00
4fcccd8d66
Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move.
...
It's already special-cased and treated as rematerializable within
LiveIntervals; this allows it to be handled by other passes
such as TwoAddressInstrctionPass.
llvm-svn: 55999
2008-09-09 18:25:28 +00:00
6acb2219b6
Replace explicit pointer-size constants to TargetData query.
...
No functionality change.
llvm-svn: 55996
2008-09-09 18:22:57 +00:00
1e97901388
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
...
llvm-svn: 55975
2008-09-09 01:26:59 +00:00
f080225490
Fix logic for not emitting no-dead-strip for some
...
objects in llvm.used (thanks Anton). Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).
llvm-svn: 55973
2008-09-09 01:21:22 +00:00
177eda0505
Reapply 55901: Drop unused variable
...
llvm-svn: 55957
2008-09-08 21:13:33 +00:00
524820fef7
Reapply 55900: We do support EH on x86-64!
...
llvm-svn: 55956
2008-09-08 21:13:08 +00:00
2fd24e7713
Reapply 55899: First draft of EH support on x86/64-linux
...
Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.
llvm-svn: 55955
2008-09-08 21:12:47 +00:00
4112634ca6
Reapply blindly reverted 55898: Implement FRAME_TO_ARGS_OFFSET for x86-64
...
llvm-svn: 55954
2008-09-08 21:12:11 +00:00
3871441861
Reverting r55898 as well. This wasn't reverted in the original revert...
...
llvm-svn: 55938
2008-09-08 19:42:32 +00:00
6fe5fe4209
Accidental commit of partial 'stack canaries' code
...
llvm-svn: 55937
2008-09-08 18:12:00 +00:00
99b83712f3
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
...
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8
llvm-svn: 55928
2008-09-08 17:59:12 +00:00
d172048b59
Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit.
...
llvm-svn: 55925
2008-09-08 17:15:42 +00:00
fd18d630bc
i128 and f80 are implemented for x86-64 now.
...
llvm-svn: 55920
2008-09-08 16:42:56 +00:00
8f658bac2f
Fix copy+pastos in comments.
...
llvm-svn: 55918
2008-09-08 16:31:35 +00:00
4d5b5fe812
Delete an unused variable.
...
llvm-svn: 55915
2008-09-08 16:28:17 +00:00
b55688d27d
Drop unused variable
...
llvm-svn: 55901
2008-09-08 14:22:38 +00:00
0316b797ea
We do support EH on x86-64!
...
llvm-svn: 55900
2008-09-08 14:22:16 +00:00
82b9540046
First draft of EH support on x86/64-linux
...
llvm-svn: 55899
2008-09-08 14:21:53 +00:00
cb0655d626
Implement FRAME_TO_ARGS_OFFSET for x86-64
...
llvm-svn: 55898
2008-09-08 14:21:10 +00:00
6500d1711a
Add support to extend call operands when needed. Enable x86 fastisel call support.
...
llvm-svn: 55891
2008-09-08 06:35:17 +00:00
6c8f55c841
Initial fastisel call support for C, Fast, and X86_FastCall calling conventions. It's meant to handle "simple" calls, i.e. no byval, structret, etc. It doesn't support multi-result returns either.
...
Not yet turned on, it needs to support sext / zext of arguments and result.
llvm-svn: 55882
2008-09-07 09:09:33 +00:00
6f343bd543
Some code clean up.
...
llvm-svn: 55881
2008-09-07 09:07:23 +00:00
b928669409
Handle x86 truncate to i8 with target hook for now.
...
llvm-svn: 55877
2008-09-07 08:47:42 +00:00
d41c7160d0
Fix constant pool loads, and remove broken versions of addConstantPoolReference.
...
llvm-svn: 55868
2008-09-06 01:11:01 +00:00
9519fb3f50
Fix the X86 addConstantPoolReference, which had the operands in the wrong order.
...
llvm-svn: 55867
2008-09-06 00:50:00 +00:00
a9c52c8219
Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x
...
i32>. This is a little messy, but it works.
We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.
llvm-svn: 55864
2008-09-05 23:07:03 +00:00
db06a99239
Fix X86FastISel's shift and select code to reject illegal types.
...
llvm-svn: 55857
2008-09-05 21:27:34 +00:00
e556018dc0
Fix the opcodes used by X86FastISel for shifts and conditional moves.
...
llvm-svn: 55855
2008-09-05 21:13:04 +00:00
f5bc7e57bc
Factor out code that emits load and store instructions.
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llvm-svn: 55854
2008-09-05 21:00:03 +00:00
ffcc884c77
Rename method.
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llvm-svn: 55853
2008-09-05 20:49:33 +00:00
7d7a26df65
X86FastISel support for shifts and conditional moves.
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llvm-svn: 55844
2008-09-05 18:30:08 +00:00
4f0d21592a
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
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llvm-svn: 55840
2008-09-05 17:24:07 +00:00
09faf81b6c
Check a comparion's operand type for legality before
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expanding its operands.
llvm-svn: 55820
2008-09-05 01:33:56 +00:00
ffd89d40d2
Fix X86FastISel code for comparisons and conditional branches
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to check the result of getRegForValue before using it, and
to check for illegal operand types.
llvm-svn: 55819
2008-09-05 01:15:35 +00:00
a5753b31be
X86FastISel support for conditional branches.
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llvm-svn: 55816
2008-09-05 01:06:14 +00:00
50288e3c99
Add initial support for selecting constant materializations that require constant
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pool loads on X86 in fast isel. This isn't actually used yet.
llvm-svn: 55814
2008-09-05 00:06:23 +00:00
09fdbcf400
X86FastISel support for ICmpInst and FCmpInst.
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llvm-svn: 55811
2008-09-04 23:26:51 +00:00
6c94b99c62
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
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llvm-svn: 55807
2008-09-04 22:59:58 +00:00
b9d5e02811
If function notes say optimize for size, then adjust alignment.
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llvm-svn: 55794
2008-09-04 21:03:41 +00:00
a79db30d28
Tidy up several unbeseeming casts from pointer to intptr_t.
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llvm-svn: 55779
2008-09-04 17:05:41 +00:00
b8c7ba228f
Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
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llvm-svn: 55777
2008-09-04 16:48:33 +00:00
634412fe35
Clean up uses of TargetLowering::getTargetMachine.
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llvm-svn: 55769
2008-09-04 15:39:15 +00:00
4f948bd87a
Add a first attempt at implementing stores for X86 fast isel using target hooks.
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Dan or Evan, please review.
llvm-svn: 55764
2008-09-04 07:08:58 +00:00
8d8f47d50b
Load from GV stub should be locally CSE'd.
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llvm-svn: 55763
2008-09-04 06:18:33 +00:00
3152edf474
Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support!
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llvm-svn: 55756
2008-09-04 01:04:15 +00:00
da2d80688b
Add intrinsics for log, log2, log10, exp, exp2.
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No functional change (and no FE change to generate them).
llvm-svn: 55753
2008-09-04 00:47:13 +00:00
7bda51f5a4
Create HandlePHINodesInSuccessorBlocksFast, a version of
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HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
llvm-svn: 55746
2008-09-03 23:12:08 +00:00
a41ee2974b
Add X86 target hook to implement load (even from GlobalAddress).
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llvm-svn: 55693
2008-09-03 06:44:39 +00:00
2175b55dc7
Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems.
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llvm-svn: 55687
2008-09-03 02:54:11 +00:00
8f23ec96b0
Unbreak fast isel.
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llvm-svn: 55685
2008-09-03 01:04:47 +00:00
24422d4928
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
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llvm-svn: 55679
2008-09-03 00:03:49 +00:00
bc69829b22
Fix some bugs in the code sequences for atomics.
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llvm-svn: 55643
2008-09-02 20:30:23 +00:00
df8cdc3717
Add Mac OS X compatible JIT callback routine.
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llvm-svn: 55625
2008-09-02 07:49:03 +00:00
3be5b728b1
Revamp ARM JIT.
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llvm-svn: 55624
2008-09-02 06:52:38 +00:00
34f3a962b0
Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
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llvm-svn: 55623
2008-09-02 06:51:36 +00:00
fa558788e7
Control flow instruction encodings.
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llvm-svn: 55601
2008-09-01 08:25:56 +00:00
c288cc0572
ldm / stm instruction encodings.
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llvm-svn: 55599
2008-09-01 07:48:18 +00:00
c37532b24a
AXI2 and AXI3 instruction encodings.
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llvm-svn: 55598
2008-09-01 07:34:13 +00:00
a282723499
Reorganize instruction formats again; AXI1 encoding.
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llvm-svn: 55597
2008-09-01 07:19:00 +00:00
169eccc24e
addrmode3 instruction encodings.
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llvm-svn: 55596
2008-09-01 07:00:14 +00:00
624844b4dd
Reorganize some instruction format definitions. No functionality change.
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llvm-svn: 55594
2008-09-01 01:51:14 +00:00
cccca875b1
Rest of addrmode2 instruction encodings.
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llvm-svn: 55593
2008-09-01 01:27:33 +00:00
01fd3f129a
Addr2 word / byte load encodings.
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llvm-svn: 55591
2008-08-31 19:02:21 +00:00
5b6c931e1f
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
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llvm-svn: 55590
2008-08-31 18:32:16 +00:00
81d6a38434
fix a bunch of 80-col violations
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llvm-svn: 55588
2008-08-31 15:37:04 +00:00
aebd2662d3
Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
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instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.
llvm-svn: 55582
2008-08-31 02:59:23 +00:00
62cf24343c
Expand for ROTR with MVT::i64.
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Dale, Could you please review this?
llvm-svn: 55581
2008-08-31 02:53:19 +00:00
a719239719
fix some 80-col violations
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llvm-svn: 55565
2008-08-30 10:09:02 +00:00
Jim Grosbach