Commit Graph

9268 Commits

Author SHA1 Message Date
Evan Cheng 9f3058f3be Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.
llvm-svn: 58949
2008-11-10 01:08:07 +00:00
Anton Korobeynikov cfb3bc4a45 Typo fix
llvm-svn: 58928
2008-11-09 02:54:13 +00:00
Anton Korobeynikov 9833d8c369 Temporary revert my last commit: it seems it's triggering some subtle bug in backend
and breaks llvm-gcc

llvm-svn: 58926
2008-11-08 23:05:05 +00:00
Oscar Fuentes 4829941a51 CMake: corrected library target name for dependency: LLVMCellSPU ->
LLVMCellSPUCodeGen.

llvm-svn: 58925
2008-11-08 21:23:15 +00:00
Oscar Fuentes 676e5194d0 CMake: Reflected changes on the CellSPU target build. May require a
clean start.

llvm-svn: 58924
2008-11-08 20:37:19 +00:00
Oscar Fuentes b200b648c4 Fixed a pasto.
llvm-svn: 58923
2008-11-08 20:34:18 +00:00
Scott Michel a872e5af8a CellSPU: Bring SPU's assembly printer more in-line with current LLVM code
structure. Assembly printer now outputs the correct section for strings.

llvm-svn: 58921
2008-11-08 18:59:02 +00:00
Anton Korobeynikov 09f51d1fd4 Factor out offset printing code into generic AsmPrinter.
FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?

llvm-svn: 58917
2008-11-08 17:21:38 +00:00
Nicolas Geoffray 5a48f232f7 The Index field of an AttributeWithIndex is of type unsigned, not uint16_t.
llvm-svn: 58908
2008-11-08 15:36:01 +00:00
Anton Korobeynikov 09991ada2d StoreInst does not produce any result thus it's useless to create new
variable for it. This greatly reduces amount of unused variables in
llvm2cpp-generated code

llvm-svn: 58905
2008-11-08 12:58:07 +00:00
Evan Cheng 436bdcdcca Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub.
llvm-svn: 58899
2008-11-08 08:16:49 +00:00
Evan Cheng b31a717527 Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.
llvm-svn: 58897
2008-11-08 08:02:53 +00:00
Evan Cheng 98161f5f34 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
llvm-svn: 58896
2008-11-08 07:38:22 +00:00
Evan Cheng bb373c4637 Fix relocation for calls to external symbols.
llvm-svn: 58893
2008-11-08 07:22:33 +00:00
Scott Michel 1ccbbc3d07 CellSPU: Fix prologue/epilogue emission when function contains calls but
theframe size is 0; the prologue and epilogue should be emitted in this case.

llvm-svn: 58890
2008-11-08 05:16:20 +00:00
Evan Cheng 077c8f8832 Skip over two-address use operands.
llvm-svn: 58883
2008-11-08 01:44:13 +00:00
Evan Cheng ffdd91e3b8 Handle ARM machine constantpool entry with non-lazy ptr.
llvm-svn: 58882
2008-11-08 01:31:27 +00:00
Evan Cheng 454ff53d58 Use ARMFunctionInfo to track number of constpool entries and jumptables.
llvm-svn: 58877
2008-11-08 00:51:41 +00:00
Evan Cheng ef4d78ba67 More code clean up.
llvm-svn: 58872
2008-11-07 22:57:53 +00:00
Dale Johannesen 160be0ffda Make FP tests requiring two compares work on PPC (PR 642).
This is Chris' patch from the PR, modified to realize that
SETUGT/SETULT occur legitimately with integers, plus
two fixes in LegalizeDAG to pass a valid result type into
LegalizeSetCC.  The argument of TLI.getSetCCResultType is
ignored on PPC, but I think I'm following usage elsewhere.

llvm-svn: 58871
2008-11-07 22:54:33 +00:00
Evan Cheng 8467e2459a Get PIC jump table working.
llvm-svn: 58869
2008-11-07 22:30:53 +00:00
Dan Gohman cb0df597e0 Flush the raw_ostream after emitting the assembly for a function.
This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.

llvm-svn: 58859
2008-11-07 19:49:17 +00:00
Richard Osborne 3219819ffe Fix compile warnings.
llvm-svn: 58840
2008-11-07 11:21:09 +00:00
Scott Michel 3395d4485d CellSPU: Ensure that C strings are always put in the .rodata section
llvm-svn: 58839
2008-11-07 11:06:44 +00:00
Richard Osborne ca08e0645a Add XCore backend.
llvm-svn: 58838
2008-11-07 10:59:00 +00:00
Evan Cheng 7095cd2af2 Jump table JIT support. Work in progress.
llvm-svn: 58836
2008-11-07 09:06:08 +00:00
Scott Michel 34d93f8572 Teach CellSPU about ELF sections and new section emitter classes.
NB: This is likely to need more work.
llvm-svn: 58832
2008-11-07 04:36:25 +00:00
Evan Cheng 98dc53e926 Encode misc arithmetic instructions.
llvm-svn: 58828
2008-11-07 01:41:35 +00:00
Evan Cheng 49d665218c Encode extend instructions; more clean up.
llvm-svn: 58818
2008-11-06 22:15:19 +00:00
Evan Cheng aa03cd3336 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
- Consolidate instruction formats.
- Other clean up.

llvm-svn: 58808
2008-11-06 17:48:05 +00:00
Evan Cheng 47b546d75f Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
llvm-svn: 58800
2008-11-06 08:47:38 +00:00
Mon P Wang 9a8d60a7c0 Widening cleanup
llvm-svn: 58796
2008-11-06 05:31:54 +00:00
Evan Cheng 36ae40342f Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
llvm-svn: 58793
2008-11-06 03:35:07 +00:00
Evan Cheng b870fd8874 Fix so_imm encoding bug; add support for MOVi2pieces.
llvm-svn: 58790
2008-11-06 02:25:39 +00:00
Evan Cheng 2686c8fb34 Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.
llvm-svn: 58789
2008-11-06 01:21:28 +00:00
Evan Cheng fd2adbfa28 Encode pic load / store instructions; fix some encoding bugs.
llvm-svn: 58780
2008-11-05 23:22:34 +00:00
Evan Cheng 81889d010c Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
llvm-svn: 58764
2008-11-05 18:35:52 +00:00
Dan Gohman 7a638a8c7e Reintroduce a comment that was removed with the AddToISelQueue
changes.

llvm-svn: 58760
2008-11-05 17:16:24 +00:00
Richard Osborne bfd58d87f3 Test commit, add Makefile for XCore target, more to follow.
llvm-svn: 58755
2008-11-05 09:53:58 +00:00
Evan Cheng 27889ab29f Add more vector move low and zero-extend patterns.
llvm-svn: 58752
2008-11-05 06:04:51 +00:00
Evan Cheng 3cd5e8c97b Indentation.
llvm-svn: 58750
2008-11-05 06:03:38 +00:00
Dan Gohman f14b77ebf1 Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.

The impact on most targets is that AddToISelQueue calls can be simply removed.

In the x86 target, there are two additional notable changes.

The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.

Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.

llvm-svn: 58748
2008-11-05 04:14:16 +00:00
Dan Gohman fd820528ab Use getTargetConstant instead of getConstant for nodes that should not be visited
by isel and potentially forced into registers.

llvm-svn: 58747
2008-11-05 02:06:09 +00:00
Evan Cheng 132de1983f Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X
indirect gv reference. Please don't call it lazy.

llvm-svn: 58746
2008-11-05 01:50:32 +00:00
Evan Cheng e3827d9061 Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls.
llvm-svn: 58725
2008-11-04 22:19:55 +00:00
Evan Cheng 297b32a367 Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes.
llvm-svn: 58714
2008-11-04 19:57:48 +00:00
Evan Cheng 4eaff40147 Debug output tweak.
llvm-svn: 58708
2008-11-04 17:58:53 +00:00
Evan Cheng 453844c352 LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR.
llvm-svn: 58707
2008-11-04 17:57:07 +00:00
Evan Cheng 9340be4641 For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements.
This is a short term workaround. The current solution is for the JIT memory manager to manage code and data memory separately.

llvm-svn: 58688
2008-11-04 09:30:48 +00:00
Evan Cheng 2299c99d79 Stylistic change.
llvm-svn: 58683
2008-11-04 06:10:06 +00:00
Evan Cheng 6dd08b6604 Handle ARM machine constantpool entries.
llvm-svn: 58671
2008-11-04 00:50:32 +00:00
Dan Gohman b9110e7fbb The ANDMask node folds to a constant, and isn't the node that needs to
have its node id set. The new and and shift nodes are the nodes that need
the IDs. This fixes PR2982.

llvm-svn: 58655
2008-11-03 23:43:55 +00:00
Evan Cheng f60e5aaaac Remove a dead switch statement.
llvm-svn: 58644
2008-11-03 21:26:52 +00:00
Evan Cheng 3620e685b5 Minor code restructuring. No functionality change.
llvm-svn: 58643
2008-11-03 21:02:39 +00:00
Jim Grosbach 4d0549e3be Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there.
llvm-svn: 58626
2008-11-03 18:38:31 +00:00
Dan Gohman ac41d9f5d8 Refactor various TargetAsmInfo subclasses' TargetMachine members away
adding a TargetMachine member to the base TargetAsmInfo class instead.

llvm-svn: 58624
2008-11-03 18:22:42 +00:00
Bill Wendling 03f5122c6c Whitespace fixes. No functionality change.
llvm-svn: 58539
2008-10-31 21:26:08 +00:00
Evan Cheng 83bf3de134 Add comment.
llvm-svn: 58533
2008-10-31 19:56:03 +00:00
Evan Cheng 20dbb3bcad Use better data structure for ConstPoolId2AddrMap.
llvm-svn: 58532
2008-10-31 19:55:13 +00:00
Evan Cheng 44994e0c77 Actually make debug output understandable.
llvm-svn: 58529
2008-10-31 19:15:52 +00:00
Mon P Wang ef89465c9f x86_64 rip-relative and magic mode address
llvm-svn: 58528
2008-10-31 19:13:42 +00:00
Evan Cheng 8fce66a47c Forgot this in last commit.
llvm-svn: 58527
2008-10-31 19:11:09 +00:00
Evan Cheng 467e6e8093 Encode PICADD; some code clean up.
llvm-svn: 58526
2008-10-31 19:10:44 +00:00
Bill Wendling d2bc13380f Revert r58489. It isn't correct for all cases.
llvm-svn: 58523
2008-10-31 18:30:19 +00:00
Evan Cheng 7e8202fce4 Change x86 register allocation ordering to match that of gcc. Otherwise some tools get confused by prologue generated by llvm.
llvm-svn: 58517
2008-10-31 16:52:57 +00:00
Bill Wendling 6d70df0b05 Don't skip over all "terminator" instructions when determining where to put the
callee-saved restore code. It could skip over conditional jumps
accidentally. Instead, just skip the "return" instructions.

llvm-svn: 58489
2008-10-31 04:00:23 +00:00
Dan Gohman 99cdf8893e Use MOVSSmr instead of EXTRACTPSmr in the case of extracting
vector element 0 for a store, as it's smaller and faster.

llvm-svn: 58483
2008-10-31 00:57:24 +00:00
Evan Cheng c696ef9b11 I think we got non-machine specific constpool entries covered.
llvm-svn: 58474
2008-10-30 23:43:36 +00:00
Duncan Sands 1310574b0f Shift amounts should have type getShiftAmountTy
(i32 for PPC, not i8).  Correct this, and some
formatting while there.

llvm-svn: 58451
2008-10-30 19:28:32 +00:00
Duncan Sands 0852f48d1d Shift amounts should have the type given by
getShiftAmountTy (i32 in the case of CellSPU).

llvm-svn: 58449
2008-10-30 19:24:28 +00:00
Evan Cheng 66cff408ff ARM JIT should observe -relocation-model command line option.
llvm-svn: 58433
2008-10-30 16:10:54 +00:00
Mon P Wang 58c3794c27 Add initial support for vector widening. Logic is set to widen for X86.
One will only see an effect if legalizetype is not active.  Will move
support to LegalizeType soon.

llvm-svn: 58426
2008-10-30 08:01:45 +00:00
Scott Michel 487c43412d Resolve bug 2947: vararg-marked functions must spill registers R3-R79 to stack
so that va_start/va_arg/et.al. will walk arguments correctly for Cell SPU.

N.B.: Because neither clang nor llvm-gcc-4.2 can be built for CellSPU, this is
still unexorcised code.

llvm-svn: 58415
2008-10-30 01:51:48 +00:00
Evan Cheng 19d64ba8bf Correct way to handle CONSTPOOL_ENTRY instructions.
llvm-svn: 58409
2008-10-29 23:55:43 +00:00
Evan Cheng de9dbc5584 Add debugging support.
llvm-svn: 58408
2008-10-29 23:55:17 +00:00
Nate Begeman 534ac08ebd Fix PEXTRQ encoding
llvm-svn: 58403
2008-10-29 23:07:17 +00:00
Dale Johannesen 98aa9d3e49 Add a RM pseudoreg for the rounding mode, which
allows ppcf128->int conversion to work with
DeadInstructionElimination.  This is now turned
off but RM is harmless.  It does not do a complete
job of modeling the rounding mode.

Revert marking MFCR as using all 7 CR subregisters;
while correct, this caused the problem in PR 2964,
plus the local RA crash noted in the comments.
This was needed to make DeadInstructionElimination,
but as we are not running that, it is backed out
for now.  Eventually it should go back in and the
other problems fixed where they're broken.

llvm-svn: 58391
2008-10-29 18:26:45 +00:00
Jim Grosbach ff2b4948ce Support for constant islands in the ARM JIT.
Since the ARM constant pool handling supercedes the standard LLVM constant
pool entirely, the JIT emitter does not allocate space for the constants,
nor initialize the memory. The constant pool is considered part of the 
instruction stream.

Likewise, when resolving relocations into the constant pool, a hook into
the target back end is used to resolve from the constant ID# to the
address where the constant is stored.

For now, the support in the ARM emitter is limited to 32-bit integer. Future
patches will expand this to the full range of constants necessary.

llvm-svn: 58338
2008-10-28 18:25:49 +00:00
Duncan Sands 4068a7f31e Fix darwin ppc llvm-gcc build breakage: intercept
ppcf128 to i32 conversion and expand it into a code
sequence like in LegalizeDAG.  This needs custom
ppc lowering of FP_ROUND_INREG, so turn that on and
make it work with LegalizeTypes.  Probably PPC should
simply custom lower the original conversion.

llvm-svn: 58329
2008-10-28 15:00:32 +00:00
Chris Lattner 38461f6b2f Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized
a memset using 16-byte XMM stores, but where the stack realignment code
didn't work.  Until it does (PR2962) disable use of xmm regs in memcpy
and memset formation for linux and other targets with insufficiently
aligned stacks.

This is part of PR2888

llvm-svn: 58317
2008-10-28 05:49:35 +00:00
David Greene ce2a938186 Have TableGen emit setSubgraphColor calls under control of a -gen-debug
flag.  Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like.  This really helps when debugging instruction selection.

llvm-svn: 58278
2008-10-27 21:56:29 +00:00
Evan Cheng f713722975 For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them.
llvm-svn: 58230
2008-10-27 07:14:50 +00:00
Dan Gohman 191453174d Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.

In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.

llvm-svn: 58144
2008-10-25 17:46:52 +00:00
Nicolas Geoffray 5457ce9ac3 Support for allocation of TLS variables in the JIT. Allocation of a global
variable is moved to the execution engine. The JIT calls the TargetJITInfo
to allocate thread local storage. Currently, only linux/x86 knows how to
allocate thread local global variables.

llvm-svn: 58142
2008-10-25 15:41:43 +00:00
Nicolas Geoffray db30612fc4 Generate code for TLS instructions.
llvm-svn: 58141
2008-10-25 15:22:06 +00:00
Oscar Fuentes 9ba4650b76 CMake: lib/Target/ARM/AsmPrinter/CMakeLists.txt added.
llvm-svn: 58133
2008-10-25 03:40:32 +00:00
Dale Johannesen 71f361e758 Mark MFCR as reading all condition code registers.
Prevents some more overzealous deletions (mostly
in AltiVec code).

llvm-svn: 58121
2008-10-24 22:08:01 +00:00
Dale Johannesen 3863f8e725 Rewrite logic to figure out whether LR needs to
be saved/restored in the prolog/epilog.  We need
to do this iff something in the function stores
into it.

llvm-svn: 58116
2008-10-24 21:24:23 +00:00
Torok Edwin 33986d8f17 move the note to the correct README
llvm-svn: 58104
2008-10-24 19:23:07 +00:00
Torok Edwin fcaae54669 add note about va_arg code on x86 and x86-64
llvm-svn: 58103
2008-10-24 19:20:05 +00:00
Duncan Sands 014f5bbaad Fix translateX86CC: if SetCCOpcode is SETULE and
LHS is a foldable load, then LHS and RHS are swapped
and SetCCOpcode is changed to SETUGT.  But the later
code is expecting operands to be the wrong way round
for SETUGT, but they are not in this case, resulting
in an inverted compare.  The solution is to move the
load normalization before the correction for SETUGT.
This bug was tickled by LegalizeTypes which happened
to legalize the testcase slightly differently to
LegalizeDAG.

llvm-svn: 58092
2008-10-24 13:03:10 +00:00
Dan Gohman 712886f561 Fix constant-offset emission for x86-64 absolute addresses. This
fixes a bunch of test-suite JIT failures on x86-64 in
-relocation-model=static mode.

llvm-svn: 58066
2008-10-24 01:57:54 +00:00
Dale Johannesen e395d78657 Mark defs and uses of CTR and LR correctly.
Prevents DeadMachineInstructionElim from thinking
things like MTCTR are dead (fixes massive
testsuite breakage at -O0).

llvm-svn: 58043
2008-10-23 20:41:28 +00:00
Jim Grosbach 1ecf1fd5c8 remove extraneous #ifdef's
llvm-svn: 58006
2008-10-22 22:27:51 +00:00
Dale Johannesen f6655a9e79 Remove allocation of unused stack slot.
llvm-svn: 57987
2008-10-22 17:26:06 +00:00
Duncan Sands 5ee1dde8fa Get this working with LegalizeTypes: (1) don't
assume that i64 has been turned into a BUILD_PAIR
node (when called from LegalizeTypes this hasn't
happened yet) and don't use a vector shuffle mask
with an illegal element type.

llvm-svn: 57972
2008-10-22 11:24:12 +00:00
Chris Lattner 35b40f8c2f Fix PR2907 by digging through constant expressions to find FP constants that
are their operands.

llvm-svn: 57956
2008-10-22 04:53:16 +00:00
Oscar Fuentes f3c03b02dc CMake: Turned some libraries into partially linked objects. Corrected
names of LLVMCore and ARMCodeGen.

llvm-svn: 57943
2008-10-22 02:51:53 +00:00
Dale Johannesen cf4607fcce Adjust comments for pedantic satisfaction.
llvm-svn: 57940
2008-10-22 00:02:32 +00:00
Dale Johannesen 3d7ece1acb Add comments to explain uint64->f64 algorithm,
well, sort of.  (Algorithm by Ian Ollmann.)

llvm-svn: 57932
2008-10-21 23:07:49 +00:00