Commit Graph

79367 Commits

Author SHA1 Message Date
Eli Friedman 206ca569aa Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.
llvm-svn: 148240
2012-01-16 16:42:21 +00:00
Eli Friedman 75e3db4c7a Get rid of unused codegen-only instruction.
llvm-svn: 148239
2012-01-16 16:29:35 +00:00
Joe Abbey 36cd89e7bd Adding a Hexagon cell for segmented stacks, as they have been implemented for X86 and not Sparc...
Committed as obvious

llvm-svn: 148237
2012-01-16 13:16:05 +00:00
Craig Topper db8890aedd Give priority to AVX over SSE for 128-bit floating point unpck instructions.
llvm-svn: 148233
2012-01-16 09:56:42 +00:00
Eli Bendersky 1b0cd0f1b1 A fix for the previous commit: "integer constant is too large for ‘long’ type" error on some 32-bit bots
llvm-svn: 148232
2012-01-16 09:31:10 +00:00
Eli Bendersky 4c647587b1 Adding a basic ELF dynamic loader and MC-JIT for ELF. Functionality is currently basic and will be enhanced with future patches.
Patch developed by Andy Kaylor and Daniel Malea. Reviewed on llvm-commits.

llvm-svn: 148231
2012-01-16 08:56:09 +00:00
David Blaikie 5d8e42755c Refactor variables unused under non-assert builds (& remove two entirely unused variables).
llvm-svn: 148230
2012-01-16 05:17:39 +00:00
Pete Cooper e85b95d754 Changed intrinsic ID operand to a target constant as its not used in any arithmetic so should not be checked in legalisation
llvm-svn: 148228
2012-01-16 04:08:12 +00:00
Nadav Rotem 57935243bd [AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.

Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.

llvm-svn: 148225
2012-01-15 19:27:55 +00:00
Benjamin Kramer 339ced4e34 Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through CodeGen.
llvm-svn: 148218
2012-01-15 13:16:05 +00:00
Benjamin Kramer 5a377e28da DAGCombiner: Deduplicate code.
llvm-svn: 148217
2012-01-15 11:50:43 +00:00
Stepan Dyatkovskiy 7ec12e431a Cosmetic patch for r148215.
llvm-svn: 148216
2012-01-15 09:45:11 +00:00
Stepan Dyatkovskiy cb2adbacf8 Fixup for r148132. Type replacement for LoopsProperties: from DenseMap to std::map, since we need to keep a valid pointer to properties of current loop.
Message for r148132:
LoopUnswitch: All helper data that is collected during loop-unswitch iterations was moved to separated class (LUAnalysisCache).

llvm-svn: 148215
2012-01-15 09:44:07 +00:00
Chandler Carruth fd63436553 Relax the FileCheck assertion a bit -- all we really care about is that
we're loading from the global array, not how it is spelled in the asm.
This should fix the MSVC bots.

llvm-svn: 148214
2012-01-15 09:38:59 +00:00
Chandler Carruth 4bb2eb15d4 FileCheck-ize a test, make it more specific to directly test the shift
removal desired.

llvm-svn: 148213
2012-01-15 09:32:57 +00:00
Chandler Carruth da22f30e72 Remove SetWorkingDirectory from the Process interface. Nothing in LLVM
or Clang is using this, and it would be hard to use it correctly given
the thread hostility of the function. Also, it never checked the return
which is rather dangerous with chdir. If someone was in fact using this,
please let me know, as well as what the usecase actually is so that
I can add it back and make it more correct and secure to use. (That
said, it's never going to be "safe" per-se, but we could at least
document the risks...)

llvm-svn: 148211
2012-01-15 08:41:35 +00:00
David Blaikie fdcd669bc6 Remove dead code.
llvm-svn: 148206
2012-01-15 01:09:13 +00:00
Craig Topper 201c1a3505 Truncate of undef is just undef of smaller size.
llvm-svn: 148205
2012-01-15 01:05:11 +00:00
Craig Topper c10e1abaf3 Fix the memop type on a couple 256-bit AVX instructions that were using f128mem instead of f256mem.
llvm-svn: 148196
2012-01-14 18:29:57 +00:00
Craig Topper d78429f850 Add a bunch of AVX instructions to the folding tables. Also fixed the alignment on 256-bit AVX2 instructions.
llvm-svn: 148194
2012-01-14 18:14:53 +00:00
Duncan Sands 90212bde1f Speculatively revert commit 148175 (rafael), to see if this fixes
non-determinism in the 32 bit dragonegg buildbot.  Original commit
message:
Only emit the Leh_func_endN symbol when needed.

llvm-svn: 148191
2012-01-14 17:16:48 +00:00
Andrew Trick 23ef0d6c40 Fix a corner case hit by redundant phi elimination running after LSR.
Fixes PR11761: bad IR w/ redundant Phi elim

llvm-svn: 148177
2012-01-14 03:17:23 +00:00
Rafael Espindola dfde7631fa Only emit the Leh_func_endN symbol when needed.
llvm-svn: 148175
2012-01-14 02:36:51 +00:00
Andrew Trick 59ac4fb706 misched: Initial code for building an MI level scheduling DAG
llvm-svn: 148174
2012-01-14 02:17:18 +00:00
Andrew Trick dbee9d8900 Move physreg dependency generation into aptly named addPhysRegDeps.
llvm-svn: 148173
2012-01-14 02:17:15 +00:00
Andrew Trick 1d028a364d misched: Added ScheduleDAGInstrs::IsPostRA
llvm-svn: 148172
2012-01-14 02:17:12 +00:00
Andrew Trick 7e120f4e66 misched: Invoke the DAG builder on each sequence of schedulable instructions.
llvm-svn: 148171
2012-01-14 02:17:09 +00:00
Andrew Trick 6344087e17 Move things around to make the file navigable, even though it will probably be split up later.
llvm-svn: 148170
2012-01-14 02:17:06 +00:00
Evan Cheng 6bb95253eb After r147827 and r147902, it's now possible for unallocatable registers to be
live across BBs before register allocation. This miscompiled 197.parser
when a cmp + b are optimized to a cbnz instruction even though the CPSR def
is live-in a successor.
        cbnz    r6, LBB89_12
...
LBB89_12:
        ble     LBB89_1

The fix consists of two parts. 1) Teach LiveVariables that some unallocatable
registers might be liveouts so don't mark their last use as kill if they are.
2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional
branch does not kill CPSR.

rdar://10676853

llvm-svn: 148168
2012-01-14 01:53:46 +00:00
Chad Rosier 71a185c5c6 Fix pasto from r146196.
llvm-svn: 148167
2012-01-14 01:50:21 +00:00
Chad Rosier d027d528b5 Cleanup test case by adding checks for test names.
llvm-svn: 148166
2012-01-14 01:46:51 +00:00
Jakob Stoklund Olesen b3c18a691b Add TRI::getCallPreservedMask() hook.
The hook returns a bit-mask of call-preserved registers that will
eventually replace the current list of implicit defs on call
instructions.  This will make it possible to support multiple calling
conventions without duplicating call instruction descriptors.

The call-preserved mask is slightly different from the list returned by
the getCalleeSavedRegs() hook, it includes all aliases that are
preserved by calls.

The hook takes a CallingConv::ID argument instead of a MachineFunction
pointer, so it can provide information about calls to extern functions,
and even indirect function calls.

TRI::getCalleeSavedRegs() returns information about the function
currently being compiled. TRI::getCallPreservedMask() returns
information about the functions it is calling.

llvm-svn: 148165
2012-01-14 01:45:25 +00:00
Dan Gohman 4cf362acc1 Fix an unused variable warning that Chad noticed.
llvm-svn: 148164
2012-01-14 00:47:44 +00:00
Rafael Espindola 78a6477b28 Add a test showing how the Leh_func_endN symbol is used.
llvm-svn: 148161
2012-01-14 00:12:59 +00:00
Rafael Espindola a693128778 Remove previous commit while I debug the bot failures.
llvm-svn: 148156
2012-01-13 23:28:50 +00:00
Jakob Stoklund Olesen 35545421c8 Use RegisterTuples to generate pseudo-registers.
The QQ and QQQQ registers are not 'real', they are pseudo-registers used
to model some vld and vst instructions.

This makes the call clobber lists longer, but I intend to get rid of
those soon.

llvm-svn: 148151
2012-01-13 22:55:42 +00:00
Rafael Espindola cef42c30a7 Remove label that is not used anymore.
llvm-svn: 148150
2012-01-13 22:41:58 +00:00
Eli Friedman d476fdc392 Speculatively revert r148132+r148133 to try and fix a buildbot failure.
llvm-svn: 148149
2012-01-13 22:34:39 +00:00
Jakob Stoklund Olesen 071c69cd7c Skip the NAME field when forming tuples.
llvm-svn: 148147
2012-01-13 22:23:50 +00:00
Andrew Trick f35c84032d Remove pointless mode line in .cpp file.
llvm-svn: 148143
2012-01-13 22:04:16 +00:00
Duncan Sands df9d781510 Try to clarify a little how exception handling works.
llvm-svn: 148136
2012-01-13 19:59:16 +00:00
Devang Patel 7066d28043 Revert r148131, it was committed before it was ready.
llvm-svn: 148134
2012-01-13 19:28:58 +00:00
Stepan Dyatkovskiy 0a920fa210 Cosmetic patch for r148132.
llvm-svn: 148133
2012-01-13 19:27:22 +00:00
Stepan Dyatkovskiy cbcbdb237f LoopUnswitch: All helper data that is collected during loop-unswitch iterations was moved to separated class (LUAnalysisCache).
llvm-svn: 148132
2012-01-13 19:13:54 +00:00
Devang Patel 7ecdc6d4f5 Refactor.
llvm-svn: 148131
2012-01-13 19:12:18 +00:00
Devang Patel 5d85276e30 Add new test.
llvm-svn: 148128
2012-01-13 18:45:31 +00:00
Pete Cooper 97aafd5f18 Fixed comment. Thanks Duncan!
llvm-svn: 148123
2012-01-13 17:52:01 +00:00
Craig Topper e52d86a740 Convert SHUFPD with the same register for both sources to PSHUFD if it would prevent a register copy. Similar to SHUFPS, but requires the mask to be converted.
llvm-svn: 148112
2012-01-13 09:21:41 +00:00
Craig Topper b1c2ebf6ee use v8i32 as optimal mem type over v8f32 if AVX2 is enabled. Similar to SSE2 vs SSE1.
llvm-svn: 148109
2012-01-13 08:32:21 +00:00
Craig Topper cb7e13d7c0 Make X86 instruction selection use 256-bit VPXOR for build_vector of all ones if AVX2 is enabled. This gives the ExeDepsFix pass a chance to choose FP vs int as appropriate. Also use v8i32 as the type for getZeroVector if AVX2 is enabled. This is consistent with SSE2 using prefering v4i32.
llvm-svn: 148108
2012-01-13 08:12:35 +00:00