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3 Commits

Author SHA1 Message Date
Kazushi (Jam) Marukawa 0d989cb6ab [VE] Support lowering to NND instruction 
Summary:
Support NND instruction of Aurora VE.  Add hasAndNot function also
for optimization.

Differential Revision: https://reviews.llvm.org/D81383
 2020-06-09 10:18:14 +02:00
Kazushi (Jam) Marukawa e981a46a77 [VE] Update lea/load/store instructions 
Summary:
Modify lea/load/store instructions to accept `disp(index, base)`
style addressing mode (called ASX format).  Also, uniform the
number of DAG nodes to have 3 operands for this ASX format
instructions, and update selectADDR functions to lower
appropriate MI.

Reviewers: arsenm, simoll, k-ishizaka

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D76822
 2020-04-06 11:49:46 +02:00
Kazushi (Jam) Marukawa 42a16dacda [VE] Bit operator isel 
Summary: Isel and tests for bswap,brev,ctpop,ctlz,ctty,rotl,rotr

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D74304
 2020-02-12 09:02:13 +01:00